include/configs/warp7.h

   1 /*
   2  * Copyright (C) 2016 NXP Semiconductors
   3  *
   4  * Configuration settings for the i.MX7S Warp board.
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __WARP7_CONFIG_H
  10 #define __WARP7_CONFIG_H
  11
  12 #include "mx7_common.h"
  13
  14 #define PHYS_SDRAM_SIZE                 SZ_512M
  15
  16 #define CONFIG_MXC_UART_BASE            UART1_IPS_BASE_ADDR
  17
  18 /* Size of malloc() pool */
  19 #define CONFIG_SYS_MALLOC_LEN           (32 * SZ_1M)
  20
  21 #define CONFIG_BOARD_EARLY_INIT_F
  22
  23 /* MMC Config*/
  24 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC3_BASE_ADDR
  25 #define CONFIG_SUPPORT_EMMC_BOOT
  26 #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
  27 #define CONFIG_SYS_MMC_IMG_LOAD_PART    1
  28
  29 #define CONFIG_DFU_ENV_SETTINGS \
  30         "dfu_alt_info=image raw 0 0x800000;"\
  31                 "u-boot raw 0 0x4000;"\
  32                 "bootimg part 0 1;"\
  33                 "rootfs part 0 2\0" \
  34
  35 #define CONFIG_EXTRA_ENV_SETTINGS \
  36         CONFIG_DFU_ENV_SETTINGS \
  37         "script=boot.scr\0" \
  38         "image=zImage\0" \
  39         "console=ttymxc0\0" \
  40         "fdt_high=0xffffffff\0" \
  41         "initrd_high=0xffffffff\0" \
  42         "fdt_file=imx7d-warp.dtb\0" \
  43         "fdt_addr=0x83000000\0" \
  44         "boot_fdt=try\0" \
  45         "ip_dyn=yes\0" \
  46         "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
  47         "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  48         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  49         "mmcargs=setenv bootargs console=${console},${baudrate} " \
  50                 "root=${mmcroot}\0" \
  51         "loadbootscript=" \
  52                 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  53         "bootscript=echo Running bootscript from mmc ...; " \
  54                 "source\0" \
  55         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  56         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  57         "mmcboot=echo Booting from mmc ...; " \
  58                 "run mmcargs; " \
  59                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  60                         "if run loadfdt; then " \
  61                                 "bootz ${loadaddr} - ${fdt_addr}; " \
  62                         "else " \
  63                                 "if test ${boot_fdt} = try; then " \
  64                                         "bootz; " \
  65                                 "else " \
  66                                         "echo WARN: Cannot load the DT; " \
  67                                 "fi; " \
  68                         "fi; " \
  69                 "else " \
  70                         "bootz; " \
  71                 "fi;\0" \
  72
  73 #define CONFIG_BOOTCOMMAND \
  74            "mmc dev ${mmcdev};" \
  75            "mmc dev ${mmcdev}; if mmc rescan; then " \
  76                    "if run loadbootscript; then " \
  77                            "run bootscript; " \
  78                    "else " \
  79                            "if run loadimage; then " \
  80                                    "run mmcboot; " \
  81                            "fi; " \
  82                    "fi; " \
  83            "fi"
  84
  85 #define CONFIG_SYS_MEMTEST_START        0x80000000
  86 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + 0x20000000)
  87
  88 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
  89 #define CONFIG_SYS_HZ                   1000
  90
  91 #define CONFIG_STACKSIZE                SZ_128K
  92
  93 /* Physical Memory Map */
  94 #define CONFIG_NR_DRAM_BANKS            1
  95 #define PHYS_SDRAM                      MMDC0_ARB_BASE_ADDR
  96
  97 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
  98 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
  99 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
 100
 101 #define CONFIG_SYS_INIT_SP_OFFSET \
 102         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 103 #define CONFIG_SYS_INIT_SP_ADDR \
 104         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 105
 106 /* FLASH and environment organization */
 107 #define CONFIG_SYS_NO_FLASH
 108 #define CONFIG_ENV_SIZE                 SZ_8K
 109 #define CONFIG_ENV_IS_IN_MMC
 110
 111 #define CONFIG_ENV_OFFSET               (8 * SZ_64K)
 112 #define CONFIG_SYS_FSL_USDHC_NUM        1
 113
 114 #define CONFIG_SYS_MMC_ENV_DEV          0
 115 #define CONFIG_SYS_MMC_ENV_PART         0
 116 #define CONFIG_MMCROOT                  "/dev/mmcblk2p2"
 117
 118 /* USB Configs */
 119 #define CONFIG_USB_EHCI
 120 #define CONFIG_USB_EHCI_MX7
 121 #define CONFIG_USB_STORAGE
 122 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 123
 124 #define CONFIG_MXC_USB_PORTSC           (PORT_PTS_UTMI | PORT_PTS_PTW)
 125 #define CONFIG_MXC_USB_FLAGS            0
 126 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG1 port enabled */
 127
 128 #define CONFIG_IMX_THERMAL
 129
 130 #define CONFIG_CI_UDC
 131 #define CONFIG_USBD_HS
 132 #define CONFIG_USB_GADGET_DUALSPEED
 133
 134 #define CONFIG_USB_GADGET
 135 #define CONFIG_USB_FUNCTION_MASS_STORAGE
 136 #define CONFIG_USB_GADGET_DOWNLOAD
 137 #define CONFIG_USB_GADGET_VBUS_DRAW     2
 138
 139 #define CONFIG_G_DNL_VENDOR_NUM         0x0525
 140 #define CONFIG_G_DNL_PRODUCT_NUM        0xa4a5
 141 #define CONFIG_G_DNL_MANUFACTURER       "FSL"
 142
 143 /* USB Device Firmware Update support */
 144 #define CONFIG_USB_FUNCTION_DFU
 145 #define CONFIG_DFU_MMC
 146 #define CONFIG_SYS_DFU_DATA_BUF_SIZE    SZ_16M
 147 #define DFU_DEFAULT_POLL_TIMEOUT        300
 148
 149 #endif