include/configs/xilinx_zynqmp_r5.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * (C) Copyright 2018 Xilinx, Inc. (Michal Simek)
   4  */
   5
   6 #ifndef __CONFIG_ZYNQMP_R5_H
   7 #define __CONFIG_ZYNQMP_R5_H
   8
   9 #define CONFIG_EXTRA_ENV_SETTINGS
  10
  11 /* CPU clock */
  12 #define CONFIG_CPU_FREQ_HZ      500000000
  13
  14 /* Serial drivers */
  15 /* The following table includes the supported baudrates */
  16 #define CONFIG_SYS_BAUDRATE_TABLE  \
  17         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
  18
  19 /* Allow to overwrite serial and ethaddr */
  20 #define CONFIG_ENV_OVERWRITE
  21
  22 /* Boot configuration */
  23 #define CONFIG_SYS_LOAD_ADDR            0 /* default? */
  24
  25 #define CONFIG_SYS_MAXARGS              32 /* max number of command args */
  26
  27 #define CONFIG_SYS_MALLOC_LEN           0x1400000
  28
  29 #define CONFIG_SYS_INIT_RAM_ADDR        0xFFFF0000
  30 #define CONFIG_SYS_INIT_RAM_SIZE        0x1000
  31 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
  32                                         CONFIG_SYS_INIT_RAM_SIZE - \
  33                                         GENERATED_GBL_DATA_SIZE)
  34
  35 /* Extend size of kernel image for uncompression */
  36 #define CONFIG_SYS_BOOTM_LEN    (60 * 1024 * 1024)
  37
  38 #define CONFIG_SKIP_LOWLEVEL_INIT
  39
  40 #endif /* __CONFIG_ZYNQ_ZYNQMP_R5_H */