include/configs/yellowstone.h

   1 /*
   2  *
   3  * See file CREDITS for list of people who contributed to this
   4  * project.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; either version 2 of
   9  * the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19  * MA 02111-1307 USA
  20  */
  21
  22 /************************************************************************
  23  * yellowstone.h - configuration for YELLOWSTONE board
  24  ***********************************************************************/
  25 #ifndef __CONFIG_H
  26 #define __CONFIG_H
  27
  28 /*-----------------------------------------------------------------------
  29  * High Level Configuration Options
  30  *----------------------------------------------------------------------*/
  31 #define CONFIG_YELLOWSTONE                      1       /* Board is BAMBOO           */
  32 #define CONFIG_440GR                            1       /* Specific PPC440GR support */
  33
  34 #define CONFIG_4xx                                      1       /* ... PPC4xx family    */
  35 #define CONFIG_BOARD_EARLY_INIT_F       1   /* Call board_early_init_f  */
  36 #undef  CFG_DRAM_TEST                                   /* disable - takes long time! */
  37 #define CONFIG_SYS_CLK_FREQ     66666666    /* external freq to pll     */
  38
  39 /*-----------------------------------------------------------------------
  40  * Base addresses -- Note these are effective addresses where the
  41  * actual resources get mapped (not physical addresses)
  42  *----------------------------------------------------------------------*/
  43 #define CFG_SDRAM_BASE      0x00000000      /* _must_ be 0                  */
  44 #define CFG_FLASH_BASE      0xf0000000      /* start of FLASH           */
  45 #define CFG_MONITOR_BASE    TEXT_BASE       /* start of monitor         */
  46 #define CFG_PCI_MEMBASE     0xa0000000      /* mapped pci memory        */
  47 #define CFG_PCI_MEMBASE1    CFG_PCI_MEMBASE  + 0x10000000
  48 #define CFG_PCI_MEMBASE2    CFG_PCI_MEMBASE1 + 0x10000000
  49 #define CFG_PCI_MEMBASE3    CFG_PCI_MEMBASE2 + 0x10000000
  50
  51
  52 /*Don't change either of these*/
  53 #define CFG_PERIPHERAL_BASE 0xef600000      /* internal peripherals     */
  54 #define CFG_PCI_BASE        0xe0000000      /* internal PCI regs        */
  55 /*Don't change either of these*/
  56
  57 #define CFG_USB_DEVICE 0x50000000
  58 #define CFG_NVRAM_BASE_ADDR 0x80000000
  59 #define CFG_BCSR_BASE       (CFG_NVRAM_BASE_ADDR | 0x2000)
  60
  61 /*-----------------------------------------------------------------------
  62  * Initial RAM & stack pointer (placed in SDRAM)
  63  *----------------------------------------------------------------------*/
  64 #define CFG_INIT_RAM_ADDR         0xf0000000            /* DCache */
  65 #define CFG_INIT_RAM_END        0x2000
  66 #define CFG_GBL_DATA_SIZE       256                     /* num bytes initial data       */
  67 #define CFG_GBL_DATA_OFFSET     (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
  68 #define CFG_INIT_SP_OFFSET      CFG_GBL_DATA_OFFSET
  69
  70 #define CFG_MONITOR_LEN     (256 * 1024)    /* Reserve 256 kB for Mon   */
  71 #define CFG_MALLOC_LEN      (128 * 1024)    /* Reserve 128 kB for malloc*/
  72 #define CFG_KBYTES_SDRAM        ( 128 * 1024)   /* 128MB                     */
  73 #define CFG_SDRAM_BANKS     (2)
  74 /*-----------------------------------------------------------------------
  75  * Serial Port
  76  *----------------------------------------------------------------------*/
  77 #undef  CONFIG_SERIAL_SOFTWARE_FIFO
  78 #define CFG_EXT_SERIAL_CLOCK    11059200 /* use external 11.059MHz clk  */
  79 #define CONFIG_BAUDRATE                 9600
  80 #define CONFIG_SERIAL_MULTI   1
  81 /*define this if you want console on UART1*/
  82 #undef CONFIG_UART1_CONSOLE
  83
  84 #define CFG_BAUDRATE_TABLE  \
  85     {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
  86
  87 /*-----------------------------------------------------------------------
  88  * NVRAM/RTC
  89  *
  90  * NOTE: The RTC registers are located at 0x7FFF0 - 0x7FFFF
  91  * The DS1558 code assumes this condition
  92  *
  93  *----------------------------------------------------------------------*/
  94 #define CFG_NVRAM_SIZE      (0x2000 - 0x10) /* NVRAM size(8k)- RTC regs */
  95 #define CONFIG_RTC_DS1556       1                        /* DS1556 RTC          */
  96
  97 /*-----------------------------------------------------------------------
  98  * FLASH related
  99  *----------------------------------------------------------------------*/
 100 #define CFG_MAX_FLASH_BANKS     1                   /* number of banks      */
 101 #define CFG_MAX_FLASH_SECT      256                 /* sectors per device   */
 102
 103 #undef  CFG_FLASH_CHECKSUM
 104 #define CFG_FLASH_ERASE_TOUT    120000  /* Timeout for Flash Erase (in ms)      */
 105 #define CFG_FLASH_WRITE_TOUT    120000      /* Timeout for Flash Write (in ms)  */
 106
 107 /*-----------------------------------------------------------------------
 108  * DDR SDRAM
 109  *----------------------------------------------------------------------*/
 110 #undef CONFIG_SPD_EEPROM               /* Don't use SPD EEPROM for setup    */
 111
 112 /*-----------------------------------------------------------------------
 113  * I2C
 114  *----------------------------------------------------------------------*/
 115 #define CONFIG_HARD_I2C         1           /* I2C with hardware support        */
 116 #undef  CONFIG_SOFT_I2C                     /* I2C bit-banged           */
 117 #define CFG_I2C_SPEED           400000  /* I2C speed and slave address  */
 118 #define CFG_I2C_SLAVE           0x7F
 119
 120
 121 /*-----------------------------------------------------------------------
 122  * Environment
 123  *----------------------------------------------------------------------*/
 124 #undef  CFG_ENV_IS_IN_NVRAM                 /*No NVRAM on board*/
 125 #undef  CFG_ENV_IS_IN_FLASH                 /* ... not in flash         */
 126 #define CFG_ENV_IS_IN_EEPROM 1
 127
 128 /* Define to allow the user to overwrite serial and ethaddr */
 129 #define CONFIG_ENV_OVERWRITE
 130
 131 #define CFG_I2C_MULTI_EEPROMS
 132 #define CFG_ENV_SIZE            0x200       /* Size of Environment vars */
 133 #define CFG_ENV_OFFSET          0x0
 134 #define CFG_I2C_EEPROM_ADDR     (0xa8>>1)
 135 #define CFG_I2C_EEPROM_ADDR_LEN 1
 136 #define CFG_EEPROM_PAGE_WRITE_ENABLE
 137 #define CFG_EEPROM_PAGE_WRITE_BITS 3
 138 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
 139
 140 #define CONFIG_BOOTCOMMAND      "bootm 0xfe000000"    /* autoboot command */
 141 #define CONFIG_BOOTDELAY        3                   /* disable autoboot */
 142
 143 #define CONFIG_LOADS_ECHO               1       /* echo on for serial download  */
 144 #define CFG_LOADS_BAUD_CHANGE   1       /* allow baudrate change        */
 145
 146 #define CONFIG_MII                      1       /* MII PHY management           */
 147 #define CONFIG_NET_MULTI    1   /* required for netconsole  */
 148 #define CONFIG_PHY1_ADDR    3
 149 #define CONFIG_HAS_ETH1         1       /* add support for "eth1addr"   */
 150 #define CONFIG_PHY_ADDR         1       /* PHY address, See schematics  */
 151 #define CONFIG_NETMASK          255.255.255.0
 152 #define CONFIG_IPADDR           10.0.4.251
 153 #define CONFIG_ETHADDR          00:10:EC:00:12:34
 154 #define CONFIG_ETH1ADDR         00:10:EC:00:12:35
 155
 156 #define CFG_RX_ETH_BUFFER       32        /* Number of ethernet rx buffers & descriptors */
 157 #define CONFIG_SERVERIP         10.0.4.115
 158
 159 /* Partitions */
 160 #define CONFIG_MAC_PARTITION
 161 #define CONFIG_DOS_PARTITION
 162 #define CONFIG_ISO_PARTITION
 163
 164 #ifdef CONFIG_440EP
 165 /* USB */
 166 #define CONFIG_USB_OHCI
 167 #define CONFIG_USB_STORAGE
 168
 169 /*Comment this out to enable USB 1.1 device*/
 170 #define USB_2_0_DEVICE
 171 #endif /*CONFIG_440EP*/
 172
 173 #ifdef DEBUG
 174 #define CONFIG_PANIC_HANG
 175 #else
 176 #define CONFIG_HW_WATCHDOG                      /* watchdog */
 177 #endif
 178
 179 #ifdef CONFIG_440EP
 180         /* Need to define POST */
 181 #define CONFIG_COMMANDS        ((CONFIG_CMD_DFL | \
 182                         CFG_CMD_DATE    |   \
 183                         CFG_CMD_DHCP    |   \
 184                         CFG_CMD_DIAG    |   \
 185                         CFG_CMD_ECHO    |   \
 186                         CFG_CMD_EEPROM  |   \
 187                         CFG_CMD_ELF     |   \
 188     /*      CFG_CMD_EXT2    |*/ \
 189         /*              CFG_CMD_FAT             |*/     \
 190                         CFG_CMD_I2C     |       \
 191         /*              CFG_CMD_IDE             |*/     \
 192                         CFG_CMD_IRQ     |       \
 193     /*          CFG_CMD_KGDB    |*/     \
 194                         CFG_CMD_MII     |   \
 195                         CFG_CMD_PCI             |       \
 196                         CFG_CMD_PING    |       \
 197                         CFG_CMD_REGINFO |       \
 198                         CFG_CMD_SDRAM   |   \
 199                         CFG_CMD_FLASH   |   \
 200         /*              CFG_CMD_SPI             |*/     \
 201                         CFG_CMD_USB     |       \
 202                         0 ) & ~CFG_CMD_IMLS)
 203 #else
 204 #define CONFIG_COMMANDS        ((CONFIG_CMD_DFL | \
 205                         CFG_CMD_DATE    |   \
 206                         CFG_CMD_DHCP    |   \
 207                         CFG_CMD_DIAG    |   \
 208                         CFG_CMD_ECHO    |   \
 209                         CFG_CMD_EEPROM  |   \
 210                         CFG_CMD_ELF     |   \
 211     /*      CFG_CMD_EXT2    |*/ \
 212         /*              CFG_CMD_FAT             |*/     \
 213                         CFG_CMD_I2C     |       \
 214         /*              CFG_CMD_IDE             |*/     \
 215                         CFG_CMD_IRQ     |       \
 216     /*          CFG_CMD_KGDB    |*/     \
 217                         CFG_CMD_MII     |   \
 218                         CFG_CMD_PCI             |       \
 219                         CFG_CMD_PING    |       \
 220                         CFG_CMD_REGINFO |       \
 221                         CFG_CMD_SDRAM   |   \
 222                         CFG_CMD_FLASH   |   \
 223         /*              CFG_CMD_SPI             |*/     \
 224                         0 ) & ~CFG_CMD_IMLS)
 225 #endif
 226
 227 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 228 #include <cmd_confdefs.h>
 229
 230 /*
 231  * Miscellaneous configurable options
 232  */
 233 #define CFG_LONGHELP                    /* undef to save memory         */
 234 #define CFG_PROMPT      "=> "           /* Monitor Command Prompt       */
 235 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
 236 #define CFG_CBSIZE      1024            /* Console I/O Buffer Size      */
 237 #else
 238 #define CFG_CBSIZE      256             /* Console I/O Buffer Size      */
 239 #endif
 240 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
 241 #define CFG_MAXARGS     16              /* max number of command args   */
 242 #define CFG_BARGSIZE    CFG_CBSIZE      /* Boot Argument Buffer Size    */
 243
 244 #define CFG_MEMTEST_START       0x0400000       /* memtest works on     */
 245 #define CFG_MEMTEST_END         0x0C00000       /* 4 ... 12 MB in DRAM  */
 246
 247 #define CFG_LOAD_ADDR           0x100000        /* default load address */
 248 #define CFG_EXTBDINFO               1   /* To use extended board_into (bd_t) */
 249 #define CONFIG_LYNXKDI          1   /* support kdi files */
 250
 251 #define CFG_HZ          1000            /* decrementer freq: 1 ms ticks */
 252
 253 /*-----------------------------------------------------------------------
 254  * PCI stuff
 255  *-----------------------------------------------------------------------
 256  */
 257 /* General PCI */
 258 #define CONFIG_PCI                                  /* include pci support              */
 259 #undef  CONFIG_PCI_PNP                          /* do (not) pci plug-and-play         */
 260 #define CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup  */
 261 #define CFG_PCI_TARGBASE    0x80000000  /* PCIaddr mapped to CFG_PCI_MEMBASE */
 262
 263 /* Board-specific PCI */
 264 #define CFG_PCI_PRE_INIT                /* enable board pci_pre_init()  */
 265 #define CFG_PCI_TARGET_INIT
 266 #define CFG_PCI_MASTER_INIT
 267
 268 #define CFG_PCI_SUBSYS_VENDORID 0x1014  /* IBM */
 269 #define CFG_PCI_SUBSYS_ID 0xcafe        /* Whatever */
 270
 271 /*
 272  * For booting Linux, the board info and command line data
 273  * have to be in the first 8 MB of memory, since this is
 274  * the maximum mapped by the Linux kernel during initialization.
 275  */
 276 #define CFG_BOOTMAPSZ           (8 << 20)       /* Initial Memory map for Linux */
 277 /*-----------------------------------------------------------------------
 278  * Cache Configuration
 279  */
 280 #define CFG_DCACHE_SIZE         8192    /* For IBM 405 CPUs                     */
 281 #define CFG_CACHELINE_SIZE      32      /* ...                  */
 282 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
 283 #define CFG_CACHELINE_SHIFT     5       /* log base 2 of the above value        */
 284 #endif
 285
 286 /*
 287  * Internal Definitions
 288  *
 289  * Boot Flags
 290  */
 291 #define BOOTFLAG_COLD   0x01            /* Normal Power-On: Boot from FLASH     */
 292 #define BOOTFLAG_WARM   0x02            /* Software reboot                      */
 293
 294 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
 295 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 296 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
 297 #endif
 298 #endif  /* __CONFIG_H */