include/configs/yosemite.h

   1 /*
   2  * (C) Copyright 2005-2007
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /************************************************************************
  25  * yosemite.h - configuration for Yosemite & Yellowstone boards
  26  ***********************************************************************/
  27 #ifndef __CONFIG_H
  28 #define __CONFIG_H
  29
  30 /*-----------------------------------------------------------------------
  31  * High Level Configuration Options
  32  *----------------------------------------------------------------------*/
  33 /* This config file is used for Yosemite (440EP) and Yellowstone (440GR)*/
  34 #ifndef CONFIG_YELLOWSTONE
  35 #define CONFIG_440EP            1       /* Specific PPC440EP support    */
  36 #define CONFIG_HOSTNAME         yosemite
  37 #else
  38 #define CONFIG_440GR            1       /* Specific PPC440GR support    */
  39 #define CONFIG_HOSTNAME         yellowstone
  40 #endif
  41 #define CONFIG_440              1       /* ... PPC440 family            */
  42 #define CONFIG_4xx              1       /* ... PPC4xx family            */
  43 #define CONFIG_SYS_CLK_FREQ     66666666    /* external freq to pll     */
  44
  45 #define CONFIG_BOARD_EARLY_INIT_F 1     /* Call board_early_init_f      */
  46 #define CONFIG_MISC_INIT_R      1       /* call misc_init_r()           */
  47 #define CONFIG_BOARD_RESET      1       /* call board_reset()           */
  48
  49 /*-----------------------------------------------------------------------
  50  * Base addresses -- Note these are effective addresses where the
  51  * actual resources get mapped (not physical addresses)
  52  *----------------------------------------------------------------------*/
  53 #define CFG_MONITOR_LEN         (512 * 1024)    /* Reserve 512 kB for Monitor   */
  54 #define CFG_MALLOC_LEN          (256 * 1024)    /* Reserve 256 kB for malloc()  */
  55 #define CFG_MONITOR_BASE        (-CFG_MONITOR_LEN)
  56 #define CFG_SDRAM_BASE          0x00000000          /* _must_ be 0      */
  57 #define CFG_FLASH_BASE          0xfc000000          /* start of FLASH   */
  58 #define CFG_PCI_MEMBASE         0xa0000000          /* mapped pci memory*/
  59 #define CFG_PCI_MEMBASE1        CFG_PCI_MEMBASE  + 0x10000000
  60 #define CFG_PCI_MEMBASE2        CFG_PCI_MEMBASE1 + 0x10000000
  61 #define CFG_PCI_MEMBASE3        CFG_PCI_MEMBASE2 + 0x10000000
  62
  63 /*Don't change either of these*/
  64 #define CFG_PERIPHERAL_BASE     0xef600000          /* internal peripherals*/
  65 #define CFG_PCI_BASE            0xe0000000          /* internal PCI regs*/
  66 /*Don't change either of these*/
  67
  68 #define CFG_USB_DEVICE          0x50000000
  69 #define CFG_NVRAM_BASE_ADDR     0x80000000
  70 #define CFG_BCSR_BASE           (CFG_NVRAM_BASE_ADDR | 0x2000)
  71 #define CFG_BOOT_BASE_ADDR      0xf0000000
  72
  73 /*-----------------------------------------------------------------------
  74  * Initial RAM & stack pointer (placed in SDRAM)
  75  *----------------------------------------------------------------------*/
  76 #define CFG_INIT_RAM_DCACHE     1               /* d-cache as init ram  */
  77 #define CFG_INIT_RAM_ADDR       0x70000000              /* DCache       */
  78 #define CFG_INIT_RAM_END        (4 << 10)
  79 #define CFG_GBL_DATA_SIZE       256                     /* num bytes initial data*/
  80 #define CFG_GBL_DATA_OFFSET     (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
  81 #define CFG_INIT_SP_OFFSET      CFG_GBL_DATA_OFFSET
  82
  83 /*-----------------------------------------------------------------------
  84  * Serial Port
  85  *----------------------------------------------------------------------*/
  86 #define CFG_EXT_SERIAL_CLOCK    11059200 /* use external 11.059MHz clk  */
  87 #define CONFIG_BAUDRATE         115200
  88 #define CONFIG_SERIAL_MULTI     1
  89 /*define this if you want console on UART1*/
  90 #undef CONFIG_UART1_CONSOLE
  91
  92 #define CFG_BAUDRATE_TABLE  \
  93     {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
  94
  95 /*-----------------------------------------------------------------------
  96  * Environment
  97  *----------------------------------------------------------------------*/
  98 /*
  99  * Define here the location of the environment variables (FLASH or EEPROM).
 100  * Note: DENX encourages to use redundant environment in FLASH.
 101  */
 102 #if 1
 103 #define CFG_ENV_IS_IN_FLASH     1       /* use FLASH for environment vars       */
 104 #else
 105 #define CFG_ENV_IS_IN_EEPROM    1       /* use EEPROM for environment vars      */
 106 #endif
 107
 108 /*-----------------------------------------------------------------------
 109  * FLASH related
 110  *----------------------------------------------------------------------*/
 111 #define CFG_FLASH_CFI                           /* The flash is CFI compatible  */
 112 #define CFG_FLASH_CFI_DRIVER                    /* Use common CFI driver        */
 113 #define CFG_FLASH_CFI_AMD_RESET 1               /* AMD RESET for STM 29W320DB!  */
 114
 115 #define CFG_MAX_FLASH_BANKS     1       /* max number of memory banks           */
 116 #define CFG_MAX_FLASH_SECT      512     /* max number of sectors on one chip    */
 117
 118 #define CFG_FLASH_ERASE_TOUT    120000  /* Timeout for Flash Erase (in ms)      */
 119 #define CFG_FLASH_WRITE_TOUT    500     /* Timeout for Flash Write (in ms)      */
 120
 121 #define CFG_FLASH_USE_BUFFER_WRITE 1    /* use buffered writes (20x faster)     */
 122
 123 #define CFG_FLASH_EMPTY_INFO            /* print 'E' for empty sector on flinfo */
 124
 125 #ifdef CFG_ENV_IS_IN_FLASH
 126 #define CFG_ENV_SECT_SIZE       0x20000 /* size of one complete sector          */
 127 #define CFG_ENV_ADDR            (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
 128 #define CFG_ENV_SIZE            0x2000  /* Total Size of Environment Sector     */
 129
 130 /* Address and size of Redundant Environment Sector     */
 131 #define CFG_ENV_ADDR_REDUND     (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
 132 #define CFG_ENV_SIZE_REDUND     (CFG_ENV_SIZE)
 133 #endif /* CFG_ENV_IS_IN_FLASH */
 134
 135 /*-----------------------------------------------------------------------
 136  * DDR SDRAM
 137  *----------------------------------------------------------------------*/
 138 #undef CONFIG_SPD_EEPROM               /* Don't use SPD EEPROM for setup    */
 139 #define CFG_KBYTES_SDRAM        (128 * 1024)    /* 128MB                    */
 140 #define CFG_SDRAM_BANKS         (2)
 141
 142
 143 /*-----------------------------------------------------------------------
 144  * Device tree support (Linux-2.6.26+)
 145  *----------------------------------------------------------------------*/
 146
 147 /* pass open firmware flat tree */
 148 #define CONFIG_OF_LIBFDT        1
 149 #define CONFIG_OF_BOARD_SETUP   1
 150
 151 /*-----------------------------------------------------------------------
 152  * I2C
 153  *----------------------------------------------------------------------*/
 154 #define CONFIG_HARD_I2C         1           /* I2C with hardware support        */
 155 #undef  CONFIG_SOFT_I2C                     /* I2C bit-banged           */
 156 #define CFG_I2C_SPEED           400000  /* I2C speed and slave address  */
 157 #define CFG_I2C_SLAVE           0x7F
 158
 159 #define CFG_I2C_MULTI_EEPROMS
 160 #define CFG_I2C_EEPROM_ADDR     (0xa8>>1)
 161 #define CFG_I2C_EEPROM_ADDR_LEN 1
 162 #define CFG_EEPROM_PAGE_WRITE_ENABLE
 163 #define CFG_EEPROM_PAGE_WRITE_BITS 3
 164 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
 165
 166 #ifdef CFG_ENV_IS_IN_EEPROM
 167 #define CFG_ENV_SIZE            0x200       /* Size of Environment vars */
 168 #define CFG_ENV_OFFSET          0x0
 169 #endif /* CFG_ENV_IS_IN_EEPROM */
 170
 171 /* I2C SYSMON (LM75, AD7414 is almost compatible)                       */
 172 #define CONFIG_DTT_LM75         1               /* ON Semi's LM75       */
 173 #define CONFIG_DTT_AD7414       1               /* use AD7414           */
 174 #define CONFIG_DTT_SENSORS      {0}             /* Sensor addresses     */
 175 #define CFG_DTT_MAX_TEMP        70
 176 #define CFG_DTT_LOW_TEMP        -30
 177 #define CFG_DTT_HYSTERESIS      3
 178
 179 #define CONFIG_PREBOOT  "echo;" \
 180         "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
 181         "echo"
 182
 183 #undef  CONFIG_BOOTARGS
 184
 185 /* Setup some board specific values for the default environment variables */
 186 #ifndef CONFIG_YELLOWSTONE
 187 #define CONFIG_HOSTNAME         yosemite
 188 #define CFG_BOOTFILE            "bootfile=/tftpboot/yosemite/uImage\0"
 189 #define CFG_ROOTPATH            "rootpath=/opt/eldk/ppc_4xxFP\0"
 190 #else
 191 #define CONFIG_HOSTNAME         yellowstone
 192 #define CFG_BOOTFILE            "bootfile=/tftpboot/yellowstone/uImage\0"
 193 #define CFG_ROOTPATH            "rootpath=/opt/eldk/ppc_4xx\0"
 194 #endif
 195
 196 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 197         CFG_BOOTFILE                                                    \
 198         CFG_ROOTPATH                                                    \
 199         "netdev=eth0\0"                                                 \
 200         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 201                 "nfsroot=${serverip}:${rootpath}\0"                     \
 202         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 203         "addip=setenv bootargs ${bootargs} "                            \
 204                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 205                 ":${hostname}:${netdev}:off panic=1\0"                  \
 206         "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
 207         "flash_nfs=run nfsargs addip addtty;"                           \
 208                 "bootm ${kernel_addr}\0"                                \
 209         "flash_self=run ramargs addip addtty;"                          \
 210                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
 211         "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;"     \
 212                 "bootm\0"                                               \
 213         "bootfile=/tftpboot/${hostname}/uImage\0"                       \
 214         "kernel_addr=fc000000\0"                                        \
 215         "ramdisk_addr=fc180000\0"                                       \
 216         "load=tftp 200000 /tftpboot/${hostname}/u-boot.bin\0"           \
 217         "update=protect off fff80000 ffffffff;era fff80000 ffffffff;"   \
 218                 "cp.b 200000 fff80000 80000;"                           \
 219                 "setenv filesize;saveenv\0"                             \
 220         "upd=run load update\0"                                         \
 221         ""
 222 #define CONFIG_BOOTCOMMAND      "run flash_self"
 223
 224 #if 0
 225 #define CONFIG_BOOTDELAY        -1      /* autoboot disabled            */
 226 #else
 227 #define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds     */
 228 #endif
 229
 230 #define CONFIG_BAUDRATE         115200
 231
 232 #define CONFIG_LOADS_ECHO       1       /* echo on for serial download  */
 233 #define CFG_LOADS_BAUD_CHANGE   1       /* allow baudrate change        */
 234
 235 #define CONFIG_MII              1       /* MII PHY management           */
 236 #define CONFIG_NET_MULTI        1       /* required for netconsole      */
 237 #define CONFIG_PHY1_ADDR        3
 238 #define CONFIG_HAS_ETH0         1       /* add support for "ethaddr"    */
 239 #define CONFIG_HAS_ETH1         1       /* add support for "eth1addr"   */
 240 #define CONFIG_PHY_ADDR         1       /* PHY address, See schematics  */
 241
 242 #define CFG_RX_ETH_BUFFER       32      /* Number of ethernet rx buffers & descriptors */
 243
 244 #define CONFIG_NETCONSOLE               /* include NetConsole support   */
 245
 246 /* Partitions */
 247 #define CONFIG_MAC_PARTITION
 248 #define CONFIG_DOS_PARTITION
 249 #define CONFIG_ISO_PARTITION
 250
 251 #ifdef CONFIG_440EP
 252 /* USB */
 253 #define CONFIG_USB_OHCI_NEW
 254 #define CONFIG_USB_STORAGE
 255 #define CFG_OHCI_BE_CONTROLLER
 256
 257 #undef CFG_USB_OHCI_BOARD_INIT
 258 #define CFG_USB_OHCI_CPU_INIT   1
 259 #define CFG_USB_OHCI_REGS_BASE  (CFG_PERIPHERAL_BASE | 0x1000)
 260 #define CFG_USB_OHCI_SLOT_NAME  "ppc440"
 261 #define CFG_USB_OHCI_MAX_ROOT_PORTS     15
 262
 263 /* Comment this out to enable USB 1.1 device */
 264 #define USB_2_0_DEVICE
 265
 266 #define CONFIG_SUPPORT_VFAT
 267 #endif /* CONFIG_440EP */
 268
 269 #ifdef DEBUG
 270 #define CONFIG_PANIC_HANG
 271 #else
 272 #define CONFIG_HW_WATCHDOG                      /* watchdog */
 273 #endif
 274
 275
 276 /*
 277  * BOOTP options
 278  */
 279 #define CONFIG_BOOTP_BOOTFILESIZE
 280 #define CONFIG_BOOTP_BOOTPATH
 281 #define CONFIG_BOOTP_GATEWAY
 282 #define CONFIG_BOOTP_HOSTNAME
 283
 284
 285 /*
 286  * Command line configuration.
 287  */
 288 #include <config_cmd_default.h>
 289
 290 #define CONFIG_CMD_ASKENV
 291 #define CONFIG_CMD_DHCP
 292 #define CONFIG_CMD_DIAG
 293 #define CONFIG_CMD_DTT
 294 #define CONFIG_CMD_ELF
 295 #define CONFIG_CMD_EEPROM
 296 #define CONFIG_CMD_I2C
 297 #define CONFIG_CMD_IRQ
 298 #define CONFIG_CMD_MII
 299 #define CONFIG_CMD_NET
 300 #define CONFIG_CMD_NFS
 301 #define CONFIG_CMD_PCI
 302 #define CONFIG_CMD_PING
 303 #define CONFIG_CMD_REGINFO
 304 #define CONFIG_CMD_SDRAM
 305
 306 #ifdef CONFIG_440EP
 307     #define CONFIG_CMD_USB
 308     #define CONFIG_CMD_FAT
 309     #define CONFIG_CMD_EXT2
 310 #endif
 311
 312
 313 /*
 314  * Miscellaneous configurable options
 315  */
 316 #define CFG_LONGHELP                    /* undef to save memory         */
 317 #define CFG_PROMPT              "=> "   /* Monitor Command Prompt       */
 318 #if defined(CONFIG_CMD_KGDB)
 319 #define CFG_CBSIZE              1024    /* Console I/O Buffer Size      */
 320 #else
 321 #define CFG_CBSIZE              256     /* Console I/O Buffer Size      */
 322 #endif
 323 #define CFG_PBSIZE              (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
 324 #define CFG_MAXARGS             16      /* max number of command args   */
 325 #define CFG_BARGSIZE            CFG_CBSIZE /* Boot Argument Buffer Size */
 326
 327 #define CFG_MEMTEST_START       0x0400000 /* memtest works on           */
 328 #define CFG_MEMTEST_END         0x0C00000 /* 4 ... 12 MB in DRAM        */
 329
 330 #define CFG_LOAD_ADDR           0x100000        /* default load address */
 331 #define CFG_EXTBDINFO           1       /* To use extended board_into (bd_t) */
 332 #define CONFIG_LYNXKDI          1       /* support kdi files            */
 333
 334 #define CFG_HZ                  1000    /* decrementer freq: 1 ms ticks */
 335
 336 #define CONFIG_CMDLINE_EDITING  1       /* add command line history     */
 337 #define CONFIG_LOOPW            1       /* enable loopw command         */
 338 #define CONFIG_MX_CYCLIC        1       /* enable mdc/mwc commands      */
 339 #define CONFIG_ZERO_BOOTDELAY_CHECK     /* check for keypress on bootdelay==0 */
 340 #define CONFIG_VERSION_VARIABLE 1       /* include version env variable */
 341
 342 /*-----------------------------------------------------------------------
 343  * PCI stuff
 344  *-----------------------------------------------------------------------
 345  */
 346 /* General PCI */
 347 #define CONFIG_PCI                      /* include pci support          */
 348 #undef  CONFIG_PCI_PNP                  /* do (not) pci plug-and-play   */
 349 #define CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup  */
 350 #define CFG_PCI_TARGBASE        0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
 351
 352 /* Board-specific PCI */
 353 #define CFG_PCI_TARGET_INIT
 354 #define CFG_PCI_MASTER_INIT
 355
 356 #define CFG_PCI_SUBSYS_VENDORID 0x10e8  /* AMCC */
 357 #define CFG_PCI_SUBSYS_ID       0xcafe  /* Whatever */
 358
 359 /*
 360  * For booting Linux, the board info and command line data
 361  * have to be in the first 8 MB of memory, since this is
 362  * the maximum mapped by the Linux kernel during initialization.
 363  */
 364 #define CFG_BOOTMAPSZ           (8 << 20)       /* Initial Memory map for Linux */
 365
 366 /*-----------------------------------------------------------------------
 367  * External Bus Controller (EBC) Setup
 368  *----------------------------------------------------------------------*/
 369 #define CFG_FLASH               CFG_FLASH_BASE
 370 #define CFG_CPLD                0x80000000
 371
 372 /* Memory Bank 0 (NOR-FLASH) initialization                                     */
 373 #define CFG_EBC_PB0AP           0x03017300
 374 #define CFG_EBC_PB0CR           (CFG_FLASH | 0xda000)
 375
 376 /* Memory Bank 2 (CPLD) initialization                                          */
 377 #define CFG_EBC_PB2AP           0x04814500
 378 #define CFG_EBC_PB2CR           (CFG_CPLD | 0x18000)
 379
 380 #define CFG_BCSR5_PCI66EN       0x80
 381
 382 /*
 383  * Internal Definitions
 384  *
 385  * Boot Flags
 386  */
 387 #define BOOTFLAG_COLD   0x01            /* Normal Power-On: Boot from FLASH     */
 388 #define BOOTFLAG_WARM   0x02            /* Software reboot                      */
 389
 390 #if defined(CONFIG_CMD_KGDB)
 391 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 392 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
 393 #endif
 394
 395 #endif  /* __CONFIG_H */