include/configs/zeus.h

   1 /*
   2  * (C) Copyright 2007
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /************************************************************************
  25  * zeus.h - configuration for Zeus board
  26  ***********************************************************************/
  27 #ifndef __CONFIG_H
  28 #define __CONFIG_H
  29
  30 /*-----------------------------------------------------------------------
  31  * High Level Configuration Options
  32  *----------------------------------------------------------------------*/
  33 #define CONFIG_ZEUS             1               /* Board is Zeus        */
  34 #define CONFIG_4xx              1               /* ... PPC4xx family    */
  35 #define CONFIG_405EP            1               /* Specifc 405EP support*/
  36
  37 #define CONFIG_SYS_TEXT_BASE    0xFFFC0000
  38
  39 #define CONFIG_SYS_CLK_FREQ     33000000 /* external frequency to pll   */
  40
  41 #define CONFIG_BOARD_EARLY_INIT_F 1             /* Call board_early_init_f */
  42 #define CONFIG_MISC_INIT_R      1               /* Call misc_init_r     */
  43
  44 #define PLLMR0_DEFAULT          PLLMR0_333_111_55_111
  45 #define PLLMR1_DEFAULT          PLLMR1_333_111_55_111
  46
  47 #define CONFIG_ENV_IS_IN_FLASH     1    /* use FLASH for environment vars       */
  48
  49 #define CONFIG_OVERWRITE_ETHADDR_ONCE   1
  50
  51 #define CONFIG_PPC4xx_EMAC
  52 #define CONFIG_MII              1       /* MII PHY management           */
  53 #define CONFIG_PHY_ADDR         0x01    /* PHY address                  */
  54 #define CONFIG_HAS_ETH1         1
  55 #define CONFIG_PHY1_ADDR        0x11    /* EMAC1 PHY address            */
  56 #define CONFIG_SYS_RX_ETH_BUFFER        16      /* Number of ethernet rx buffers & descriptors */
  57 #define CONFIG_PHY_RESET        1
  58 #define CONFIG_PHY_RESET_DELAY  300     /* PHY RESET recovery delay     */
  59
  60 /*
  61  * BOOTP options
  62  */
  63 #define CONFIG_BOOTP_BOOTFILESIZE
  64 #define CONFIG_BOOTP_BOOTPATH
  65 #define CONFIG_BOOTP_GATEWAY
  66 #define CONFIG_BOOTP_HOSTNAME
  67
  68 /*
  69  * Command line configuration.
  70  */
  71 #include <config_cmd_default.h>
  72
  73 #define CONFIG_CMD_ASKENV
  74 #define CONFIG_CMD_CACHE
  75 #define CONFIG_CMD_DHCP
  76 #define CONFIG_CMD_DIAG
  77 #define CONFIG_CMD_EEPROM
  78 #define CONFIG_CMD_ELF
  79 #define CONFIG_CMD_I2C
  80 #define CONFIG_CMD_IRQ
  81 #define CONFIG_CMD_LOG
  82 #define CONFIG_CMD_MII
  83 #define CONFIG_CMD_NET
  84 #define CONFIG_CMD_NFS
  85 #define CONFIG_CMD_PING
  86 #define CONFIG_CMD_REGINFO
  87
  88 /* POST support */
  89 #define CONFIG_POST             (CONFIG_SYS_POST_MEMORY   | \
  90                                  CONFIG_SYS_POST_CPU       | \
  91                                  CONFIG_SYS_POST_CACHE     | \
  92                                  CONFIG_SYS_POST_UART      | \
  93                                  CONFIG_SYS_POST_ETHER)
  94
  95 #define CONFIG_SYS_POST_ETHER_EXT_LOOPBACK      /* eth POST using ext loopack connector */
  96
  97 /* Define here the base-addresses of the UARTs to test in POST */
  98 #define CONFIG_SYS_POST_UART_TABLE      { CONFIG_SYS_NS16550_COM1 }
  99
 100 #define CONFIG_LOGBUFFER
 101 #define CONFIG_SYS_POST_CACHE_ADDR      0x00800000 /* free virtual address      */
 102
 103 #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
 104
 105 #undef CONFIG_WATCHDOG                  /* watchdog disabled            */
 106
 107 /*-----------------------------------------------------------------------
 108  * SDRAM
 109  *----------------------------------------------------------------------*/
 110 /*
 111  * SDRAM configuration (please see cpu/ppc/sdram.[ch])
 112  */
 113 #define CONFIG_SDRAM_BANK0      1       /* init onboard SDRAM bank 0 */
 114 #define CONFIG_SDRAM_BANK1      1       /* init onboard SDRAM bank 1 */
 115
 116 /* SDRAM timings used in datasheet */
 117 #define CONFIG_SYS_SDRAM_CL            3        /* CAS latency */
 118 #define CONFIG_SYS_SDRAM_tRP           20       /* PRECHARGE command period */
 119 #define CONFIG_SYS_SDRAM_tRC           66       /* ACTIVE-to-ACTIVE command period */
 120 #define CONFIG_SYS_SDRAM_tRCD          20       /* ACTIVE-to-READ delay */
 121 #define CONFIG_SYS_SDRAM_tRFC           66      /* Auto refresh period */
 122
 123 /*-----------------------------------------------------------------------
 124  * Serial Port
 125  *----------------------------------------------------------------------*/
 126 #define CONFIG_CONS_INDEX       1
 127 #define CONFIG_SYS_NS16550
 128 #define CONFIG_SYS_NS16550_SERIAL
 129 #define CONFIG_SYS_NS16550_REG_SIZE     1
 130 #define CONFIG_SYS_NS16550_CLK          get_serial_clock()
 131 #undef  CONFIG_SYS_EXT_SERIAL_CLOCK                     /* external serial clock */
 132 #define CONFIG_SYS_BASE_BAUD    691200
 133 #define CONFIG_BAUDRATE         115200
 134 #define CONFIG_SERIAL_MULTI
 135
 136 #define CONFIG_SYS_BAUDRATE_TABLE  \
 137     {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
 138
 139 /*-----------------------------------------------------------------------
 140  * Miscellaneous configurable options
 141  *----------------------------------------------------------------------*/
 142 #define CONFIG_SYS_LONGHELP                     /* undef to save memory         */
 143 #define CONFIG_SYS_PROMPT               "=> "   /* Monitor Command Prompt       */
 144 #if defined(CONFIG_CMD_KGDB)
 145 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size      */
 146 #else
 147 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size      */
 148 #endif
 149 #define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 150 #define CONFIG_SYS_MAXARGS              16      /* max number of command args   */
 151 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size  */
 152
 153 #define CONFIG_SYS_MEMTEST_START        0x0400000 /* memtest works on           */
 154 #define CONFIG_SYS_MEMTEST_END          0x0C00000 /* 4 ... 12 MB in DRAM        */
 155
 156 #define CONFIG_SYS_LOAD_ADDR            0x100000  /* default load address       */
 157 #define CONFIG_SYS_EXTBDINFO            1       /* To use extended board_into (bd_t) */
 158
 159 #define CONFIG_SYS_HZ                   1000    /* decrementer freq: 1 ms ticks */
 160
 161 #define CONFIG_LOADS_ECHO       1       /* echo on for serial download  */
 162 #define CONFIG_SYS_LOADS_BAUD_CHANGE    1       /* allow baudrate change        */
 163
 164 #define CONFIG_CMDLINE_EDITING  1       /* add command line history     */
 165 #define CONFIG_LOOPW            1       /* enable loopw command         */
 166 #define CONFIG_MX_CYCLIC        1       /* enable mdc/mwc commands      */
 167 #define CONFIG_ZERO_BOOTDELAY_CHECK     /* check for keypress on bootdelay==0 */
 168 #define CONFIG_VERSION_VARIABLE 1       /* include version env variable */
 169
 170 /*-----------------------------------------------------------------------
 171  * I2C
 172  *----------------------------------------------------------------------*/
 173 #define CONFIG_HARD_I2C         1               /* I2C with hardware support    */
 174 #undef  CONFIG_SOFT_I2C                         /* I2C bit-banged               */
 175 #define CONFIG_PPC4XX_I2C               /* use PPC4xx driver            */
 176 #define CONFIG_SYS_I2C_SPEED            400000          /* I2C speed and slave address  */
 177 #define CONFIG_SYS_I2C_SLAVE            0x7F
 178
 179 /* these are for the ST M24C02 2kbit serial i2c eeprom */
 180 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50            /* base address */
 181 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1               /* bytes of address */
 182 /* mask of address bits that overflow into the "EEPROM chip address"    */
 183 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW     0x07
 184
 185 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       3       /* 8 byte write page size */
 186 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* and takes up to 10 msec */
 187
 188 /*
 189  * The layout of the I2C EEPROM, used for bootstrap setup and for board-
 190  * specific values, like ethaddr... that can be restored via the sw-reset
 191  * button
 192  */
 193 #define FACTORY_RESET_I2C_EEPROM        0x50
 194 #define FACTORY_RESET_ENV_OFFS          0x80
 195 #define FACTORY_RESET_ENV_SIZE          0x80
 196
 197 /*-----------------------------------------------------------------------
 198  * Start addresses for the final memory configuration
 199  * (Set up by the startup code)
 200  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 201  */
 202 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 203 #define CONFIG_SYS_FLASH_BASE           0xFF000000
 204 #define CONFIG_SYS_MONITOR_LEN          (256 * 1024)    /* Reserve 256 kB for Monitor   */
 205 #define CONFIG_SYS_MALLOC_LEN           (128 * 1024)    /* Reserve 128 kB for malloc()  */
 206 #define CONFIG_SYS_MONITOR_BASE (-CONFIG_SYS_MONITOR_LEN)
 207
 208 /*
 209  * For booting Linux, the board info and command line data
 210  * have to be in the first 8 MB of memory, since this is
 211  * the maximum mapped by the Linux kernel during initialization.
 212  */
 213 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)       /* Initial Memory map for Linux */
 214
 215 /*-----------------------------------------------------------------------
 216  * FLASH organization
 217  */
 218 #define CONFIG_SYS_FLASH_CFI                            /* The flash is CFI compatible  */
 219 #define CONFIG_FLASH_CFI_DRIVER                 /* Use common CFI driver        */
 220
 221 #define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE }
 222
 223 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks           */
 224 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* max number of sectors on one chip    */
 225
 226 #define CONFIG_SYS_FLASH_ERASE_TOUT     120000  /* Timeout for Flash Erase (in ms)      */
 227 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Timeout for Flash Write (in ms)      */
 228
 229 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1     /* use buffered writes (20x faster)     */
 230 #define CONFIG_SYS_FLASH_PROTECTION     1       /* use hardware flash protection        */
 231
 232 #define CONFIG_SYS_FLASH_EMPTY_INFO             /* print 'E' for empty sector on flinfo */
 233 #define CONFIG_SYS_FLASH_QUIET_TEST     1       /* don't warn upon unknown flash        */
 234
 235 #ifdef CONFIG_ENV_IS_IN_FLASH
 236 #define CONFIG_ENV_SECT_SIZE    0x20000 /* size of one complete sector          */
 237 #define CONFIG_ENV_ADDR         ((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE)
 238 #define CONFIG_ENV_SIZE         0x2000  /* Total Size of Environment Sector     */
 239
 240 /* Address and size of Redundant Environment Sector     */
 241 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
 242 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
 243 #endif
 244
 245 /*-----------------------------------------------------------------------
 246  * Definitions for initial stack pointer and data area (in data cache)
 247  */
 248 /* use on chip memory (OCM) for temperary stack until sdram is tested */
 249 #define CONFIG_SYS_TEMP_STACK_OCM       1
 250
 251 /* On Chip Memory location */
 252 #define CONFIG_SYS_OCM_DATA_ADDR        0xF8000000
 253 #define CONFIG_SYS_OCM_DATA_SIZE        0x1000
 254 #define CONFIG_SYS_INIT_RAM_ADDR        CONFIG_SYS_OCM_DATA_ADDR /* inside of OCM               */
 255 #define CONFIG_SYS_INIT_RAM_SIZE        CONFIG_SYS_OCM_DATA_SIZE /* Size of used area in RAM    */
 256
 257 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 258 /* reserve some memory for POST and BOOT limit info */
 259 #define CONFIG_SYS_INIT_SP_OFFSET       (CONFIG_SYS_GBL_DATA_OFFSET - 16)
 260
 261 /* extra data in OCM */
 262 #define CONFIG_SYS_POST_MAGIC           \
 263                 (CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 8)
 264 #define CONFIG_SYS_POST_VAL             \
 265                 (CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 12)
 266
 267 /*-----------------------------------------------------------------------
 268  * External Bus Controller (EBC) Setup
 269  */
 270
 271 /* Memory Bank 0 (Flash 16M) initialization                                     */
 272 #define CONFIG_SYS_EBC_PB0AP            0x05815600
 273 #define CONFIG_SYS_EBC_PB0CR            0xFF09A000  /* BAS=0xFF0,BS=16MB,BU=R/W,BW=16bit  */
 274
 275 /*-----------------------------------------------------------------------
 276  * Definitions for GPIO setup (PPC405EP specific)
 277  *
 278  * GPIO0[0]     - External Bus Controller BLAST output
 279  * GPIO0[1-9]   - Instruction trace outputs
 280  * GPIO0[10-13] - External Bus Controller CS_1 - CS_4 outputs
 281  * GPIO0[14-16] - External Bus Controller ABUS3-ABUS5 outputs
 282  * GPIO0[17-23] - External Interrupts IRQ0 - IRQ6 inputs
 283  * GPIO0[24-27] - UART0 control signal inputs/outputs
 284  * GPIO0[28-29] - UART1 data signal input/output
 285  * GPIO0[30-31] - EMAC0 and EMAC1 reject packet inputs
 286  */
 287 #define CONFIG_SYS_GPIO0_OSRL           0x15555550      /* Chip selects */
 288 #define CONFIG_SYS_GPIO0_OSRH           0x00000110      /* UART_DTR-pin 27 alt out */
 289 #define CONFIG_SYS_GPIO0_ISR1L          0x10000041      /* Pin 2, 12 is input */
 290 #define CONFIG_SYS_GPIO0_ISR1H          0x15505440      /* OUT: LEDs 22/23; IN: pin12,2, NVALID# */
 291 #define CONFIG_SYS_GPIO0_TSRL           0x00000000
 292 #define CONFIG_SYS_GPIO0_TSRH           0x00000000
 293 #define CONFIG_SYS_GPIO0_TCR            0xBFF68317      /* 3-state OUT: 22/23/29; 12,2 is not 3-state */
 294 #define CONFIG_SYS_GPIO0_ODR            0x00000000
 295
 296 #define CONFIG_SYS_GPIO_SW_RESET        1
 297 #define CONFIG_SYS_GPIO_ZEUS_PE 12
 298 #define CONFIG_SYS_GPIO_LED_RED 22
 299 #define CONFIG_SYS_GPIO_LED_GREEN       23
 300
 301 /* Time in milli-seconds */
 302 #define CONFIG_SYS_TIME_POST            5000
 303 #define CONFIG_SYS_TIME_FACTORY_RESET   10000
 304
 305 #if defined(CONFIG_CMD_KGDB)
 306 #define CONFIG_KGDB_BAUDRATE    230400          /* speed to run kgdb serial port */
 307 #define CONFIG_KGDB_SER_INDEX   2               /* which serial port to use */
 308 #endif
 309
 310 /*
 311  * Pass open firmware flat tree
 312  */
 313 #define CONFIG_OF_LIBFDT
 314 #define CONFIG_OF_BOARD_SETUP
 315
 316 /* ENVIRONMENT VARS */
 317
 318 #define CONFIG_PREBOOT          "echo;echo Welcome to Bulletendpoints board v1.1;echo"
 319 #define CONFIG_IPADDR           192.168.1.10
 320 #define CONFIG_SERVERIP         192.168.1.100
 321 #define CONFIG_GATEWAYIP        192.168.1.100
 322 #define CONFIG_ETHADDR          50:00:00:00:06:00
 323 #define CONFIG_ETH1ADDR         50:00:00:00:06:01
 324 #if 0
 325 #define CONFIG_BOOTDELAY        -1      /* autoboot disabled        */
 326 #else
 327 #define CONFIG_BOOTDELAY        3       /* autoboot after 5 seconds */
 328 #endif
 329
 330 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 331         "logversion=2\0"                                                \
 332         "hostname=zeus\0"                                               \
 333         "netdev=eth0\0"                                                 \
 334         "ethact=ppc_4xx_eth0\0"                                         \
 335         "netmask=255.255.255.0\0"                                       \
 336         "ramdisk_size=50000\0"                                          \
 337         "nfsargs=setenv bootargs root=/dev/nfs rw"                      \
 338                 " nfsroot=${serverip}:${rootpath}\0"                    \
 339         "ramargs=setenv bootargs root=/dev/ram rw"                      \
 340                 " ramdisk_size=${ramdisk_size}\0"                       \
 341         "addip=setenv bootargs ${bootargs} "                            \
 342                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 343                 ":${hostname}:${netdev}:off panic=1\0"                  \
 344         "addtty=setenv bootargs ${bootargs} console=ttyS0,"             \
 345                 "${baudrate}\0"                                         \
 346         "net_nfs=tftp ${kernel_mem_addr} ${file_kernel};"               \
 347                 "run nfsargs addip addtty;bootm\0"                      \
 348         "net_ram=tftp ${kernel_mem_addr} ${file_kernel};"               \
 349                 "tftp ${ramdisk_mem_addr} ${file_fs};"                  \
 350                 "run ramargs addip addtty;"                             \
 351                 "bootm ${kernel_mem_addr} ${ramdisk_mem_addr}\0"        \
 352         "rootpath=/target_fs/zeus\0"                                    \
 353         "kernel_fl_addr=ff000000\0"                                     \
 354         "kernel_mem_addr=200000\0"                                      \
 355         "ramdisk_fl_addr=ff300000\0"                                    \
 356         "ramdisk_mem_addr=4000000\0"                                    \
 357         "uboot_fl_addr=fffc0000\0"                                      \
 358         "uboot_mem_addr=100000\0"                                       \
 359         "file_uboot=/zeus/u-boot.bin\0"                                 \
 360         "tftp_uboot=tftp 100000 ${file_uboot}\0"                        \
 361         "update_uboot=protect off fffc0000 ffffffff;"                   \
 362                 "era fffc0000 ffffffff;cp.b 100000 fffc0000 40000;"     \
 363                 "protect on fffc0000 ffffffff\0"                        \
 364         "upd_uboot=run tftp_uboot;run update_uboot\0"                   \
 365         "file_kernel=/zeus/uImage_ba\0"                                 \
 366         "tftp_kernel=tftp 100000 ${file_kernel}\0"                      \
 367         "update_kernel=protect off ff000000 ff17ffff;"                  \
 368                 "era ff000000 ff17ffff;cp.b 100000 ff000000 180000\0"   \
 369         "upd_kernel=run tftp_kernel;run update_kernel\0"                \
 370         "file_fs=/zeus/rootfs_ba.img\0"                                 \
 371         "tftp_fs=tftp 100000 ${file_fs}\0"                              \
 372         "update_fs=protect off ff300000 ff87ffff;era ff300000 ff87ffff;"\
 373                 "cp.b 100000 ff300000 580000\0"                         \
 374         "upd_fs=run tftp_fs;run update_fs\0"                            \
 375         "bootcmd=chkreset;run ramargs addip addtty addmisc;"            \
 376                 "bootm ${kernel_fl_addr} ${ramdisk_fl_addr}\0"          \
 377         ""
 378
 379 #endif  /* __CONFIG_H */