1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2000-2009
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * Copyright 2019 Google LLC
11 #include <linux/types.h>
14 * Multicore arch functions
16 * These should be moved to use the CPU uclass.
18 int cpu_status(u32 nr
);
19 int cpu_reset(u32 nr
);
20 int cpu_disable(u32 nr
);
21 int cpu_release(u32 nr
, int argc
, char *const argv
[]);
23 static inline int cpumask_next(int cpu
, unsigned int mask
)
25 for (cpu
++; !((1 << cpu
) & mask
); cpu
++)
31 #define for_each_cpu(iter, cpu, num_cpus, mask) \
32 for (iter = 0, cpu = cpumask_next(-1, mask); \
34 iter++, cpu = cpumask_next(cpu, mask)) \
36 int cpu_numcores(void);
37 int cpu_num_dspcores(void);
39 u32
cpu_dsp_mask(void);
40 int is_core_valid(unsigned int core
);
43 * checkcpu() - perform an early check of the CPU
45 * This is used on PowerPC, SH and X86 machines as a CPU init mechanism. It is
46 * called during the pre-relocation init sequence in board_init_f().
48 * Return: 0 if oK, -ve on error
52 void smp_set_core_boot_addr(unsigned long addr
, int corenr
);
53 void smp_kick_all_cpus(void);
55 int icache_status(void);
56 void icache_enable(void);
57 void icache_disable(void);
58 int dcache_status(void);
59 void dcache_enable(void);
60 void dcache_disable(void);
61 void mmu_disable(void);
64 /* arch/$(ARCH)/lib/cache.c */
65 void enable_caches(void);
66 void flush_cache(unsigned long addr
, unsigned long size
);
67 void flush_dcache_all(void);
68 void flush_dcache_range(unsigned long start
, unsigned long stop
);
69 void invalidate_dcache_range(unsigned long start
, unsigned long stop
);
70 void invalidate_dcache_all(void);
71 void invalidate_icache_all(void);
74 /* Disable caches (else flush caches but leave them active) */
75 CBL_DISABLE_CACHES
= 1 << 0,
76 CBL_SHOW_BOOTSTAGE_REPORT
= 1 << 1,
82 * Clean up ready for linux
84 * @param flags Flags to control what is done
86 int cleanup_before_linux_select(int flags
);