include/dt-bindings/clock/bcm63268-clock.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2
   3 #ifndef __DT_BINDINGS_CLOCK_BCM63268_H
   4 #define __DT_BINDINGS_CLOCK_BCM63268_H
   5
   6 #define BCM63268_CLK_DIS_GLESS  0
   7 #define BCM63268_CLK_VDSL_QPROC 1
   8 #define BCM63268_CLK_VDSL_AFE   2
   9 #define BCM63268_CLK_VDSL       3
  10 #define BCM63268_CLK_MIPS       4
  11 #define BCM63268_CLK_WLAN_OCP   5
  12 #define BCM63268_CLK_DECT       6
  13 #define BCM63268_CLK_FAP0       7
  14 #define BCM63268_CLK_FAP1       8
  15 #define BCM63268_CLK_SAR        9
  16 #define BCM63268_CLK_ROBOSW     10
  17 #define BCM63268_CLK_PCM        11
  18 #define BCM63268_CLK_USBD       12
  19 #define BCM63268_CLK_USBH       13
  20 #define BCM63268_CLK_IPSEC      14
  21 #define BCM63268_CLK_SPI        15
  22 #define BCM63268_CLK_HSSPI      16
  23 #define BCM63268_CLK_PCIE       17
  24 #define BCM63268_CLK_PHYMIPS    18
  25 #define BCM63268_CLK_GMAC       19
  26 #define BCM63268_CLK_NAND       20
  27 #define BCM63268_CLK_TBUS       27
  28 #define BCM63268_CLK_ROBOSW250  31
  29
  30 #define BCM63268_TCLK_EPHY1             0
  31 #define BCM63268_TCLK_EPHY2             1
  32 #define BCM63268_TCLK_EPHY3             2
  33 #define BCM63268_TCLK_GPHY1             3
  34 #define BCM63268_TCLK_DSL               4
  35 #define BCM63268_TCLK_WAKEON_EPHY       6
  36 #define BCM63268_TCLK_WAKEON_DSL        7
  37 #define BCM63268_TCLK_FAP1              11
  38 #define BCM63268_TCLK_FAP2              15
  39 #define BCM63268_TCLK_UTO_50            16
  40 #define BCM63268_TCLK_UTO_EXTIN         17
  41 #define BCM63268_TCLK_USB_REF           18
  42
  43 #endif /* __DT_BINDINGS_CLOCK_BCM63268_H */