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[thirdparty/u-boot.git] / include / dt-bindings / clock / st,stm32mp25-rcc.h
1 /* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
2 /*
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
4 * Author: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
5 */
6
7 #ifndef _DT_BINDINGS_STM32MP25_CLKS_H_
8 #define _DT_BINDINGS_STM32MP25_CLKS_H_
9
10 /* INTERNAL/EXTERNAL OSCILLATORS */
11 #define HSI_CK 0
12 #define HSE_CK 1
13 #define MSI_CK 2
14 #define LSI_CK 3
15 #define LSE_CK 4
16 #define I2S_CK 5
17 #define RTC_CK 6
18 #define SPDIF_CK_SYMB 7
19
20 /* PLL CLOCKS */
21 #define PLL1_CK 8
22 #define PLL2_CK 9
23 #define PLL3_CK 10
24 #define PLL4_CK 11
25 #define PLL5_CK 12
26 #define PLL6_CK 13
27 #define PLL7_CK 14
28 #define PLL8_CK 15
29
30 #define CK_CPU1 16
31
32 /* APB DIV CLOCKS */
33 #define CK_ICN_APB1 17
34 #define CK_ICN_APB2 18
35 #define CK_ICN_APB3 19
36 #define CK_ICN_APB4 20
37 #define CK_ICN_APBDBG 21
38
39 /* GLOBAL TIMER */
40 #define TIMG1_CK 22
41 #define TIMG2_CK 23
42
43 /* FLEXGEN CLOCKS */
44 #define CK_ICN_HS_MCU 24
45 #define CK_ICN_SDMMC 25
46 #define CK_ICN_DDR 26
47 #define CK_ICN_DISPLAY 27
48 #define CK_ICN_HSL 28
49 #define CK_ICN_NIC 29
50 #define CK_ICN_VID 30
51 #define CK_FLEXGEN_07 31
52 #define CK_FLEXGEN_08 32
53 #define CK_FLEXGEN_09 33
54 #define CK_FLEXGEN_10 34
55 #define CK_FLEXGEN_11 35
56 #define CK_FLEXGEN_12 36
57 #define CK_FLEXGEN_13 37
58 #define CK_FLEXGEN_14 38
59 #define CK_FLEXGEN_15 39
60 #define CK_FLEXGEN_16 40
61 #define CK_FLEXGEN_17 41
62 #define CK_FLEXGEN_18 42
63 #define CK_FLEXGEN_19 43
64 #define CK_FLEXGEN_20 44
65 #define CK_FLEXGEN_21 45
66 #define CK_FLEXGEN_22 46
67 #define CK_FLEXGEN_23 47
68 #define CK_FLEXGEN_24 48
69 #define CK_FLEXGEN_25 49
70 #define CK_FLEXGEN_26 50
71 #define CK_FLEXGEN_27 51
72 #define CK_FLEXGEN_28 52
73 #define CK_FLEXGEN_29 53
74 #define CK_FLEXGEN_30 54
75 #define CK_FLEXGEN_31 55
76 #define CK_FLEXGEN_32 56
77 #define CK_FLEXGEN_33 57
78 #define CK_FLEXGEN_34 58
79 #define CK_FLEXGEN_35 59
80 #define CK_FLEXGEN_36 60
81 #define CK_FLEXGEN_37 61
82 #define CK_FLEXGEN_38 62
83 #define CK_FLEXGEN_39 63
84 #define CK_FLEXGEN_40 64
85 #define CK_FLEXGEN_41 65
86 #define CK_FLEXGEN_42 66
87 #define CK_FLEXGEN_43 67
88 #define CK_FLEXGEN_44 68
89 #define CK_FLEXGEN_45 69
90 #define CK_FLEXGEN_46 70
91 #define CK_FLEXGEN_47 71
92 #define CK_FLEXGEN_48 72
93 #define CK_FLEXGEN_49 73
94 #define CK_FLEXGEN_50 74
95 #define CK_FLEXGEN_51 75
96 #define CK_FLEXGEN_52 76
97 #define CK_FLEXGEN_53 77
98 #define CK_FLEXGEN_54 78
99 #define CK_FLEXGEN_55 79
100 #define CK_FLEXGEN_56 80
101 #define CK_FLEXGEN_57 81
102 #define CK_FLEXGEN_58 82
103 #define CK_FLEXGEN_59 83
104 #define CK_FLEXGEN_60 84
105 #define CK_FLEXGEN_61 85
106 #define CK_FLEXGEN_62 86
107 #define CK_FLEXGEN_63 87
108
109 /* LOW SPEED MCU CLOCK */
110 #define CK_ICN_LS_MCU 88
111
112 #define CK_BUS_STM500 89
113 #define CK_BUS_FMC 90
114 #define CK_BUS_GPU 91
115 #define CK_BUS_ETH1 92
116 #define CK_BUS_ETH2 93
117 #define CK_BUS_PCIE 94
118 #define CK_BUS_DDRPHYC 95
119 #define CK_BUS_SYSCPU1 96
120 #define CK_BUS_ETHSW 97
121 #define CK_BUS_HPDMA1 98
122 #define CK_BUS_HPDMA2 99
123 #define CK_BUS_HPDMA3 100
124 #define CK_BUS_ADC12 101
125 #define CK_BUS_ADC3 102
126 #define CK_BUS_IPCC1 103
127 #define CK_BUS_CCI 104
128 #define CK_BUS_CRC 105
129 #define CK_BUS_MDF1 106
130 #define CK_BUS_OSPIIOM 107
131 #define CK_BUS_BKPSRAM 108
132 #define CK_BUS_HASH 109
133 #define CK_BUS_RNG 110
134 #define CK_BUS_CRYP1 111
135 #define CK_BUS_CRYP2 112
136 #define CK_BUS_SAES 113
137 #define CK_BUS_PKA 114
138 #define CK_BUS_GPIOA 115
139 #define CK_BUS_GPIOB 116
140 #define CK_BUS_GPIOC 117
141 #define CK_BUS_GPIOD 118
142 #define CK_BUS_GPIOE 119
143 #define CK_BUS_GPIOF 120
144 #define CK_BUS_GPIOG 121
145 #define CK_BUS_GPIOH 122
146 #define CK_BUS_GPIOI 123
147 #define CK_BUS_GPIOJ 124
148 #define CK_BUS_GPIOK 125
149 #define CK_BUS_LPSRAM1 126
150 #define CK_BUS_LPSRAM2 127
151 #define CK_BUS_LPSRAM3 128
152 #define CK_BUS_GPIOZ 129
153 #define CK_BUS_LPDMA 130
154 #define CK_BUS_HSEM 131
155 #define CK_BUS_IPCC2 132
156 #define CK_BUS_RTC 133
157 #define CK_BUS_SPI8 134
158 #define CK_BUS_LPUART1 135
159 #define CK_BUS_I2C8 136
160 #define CK_BUS_LPTIM3 137
161 #define CK_BUS_LPTIM4 138
162 #define CK_BUS_LPTIM5 139
163 #define CK_BUS_IWDG5 140
164 #define CK_BUS_WWDG2 141
165 #define CK_BUS_I3C4 142
166 #define CK_BUS_TIM2 143
167 #define CK_BUS_TIM3 144
168 #define CK_BUS_TIM4 145
169 #define CK_BUS_TIM5 146
170 #define CK_BUS_TIM6 147
171 #define CK_BUS_TIM7 148
172 #define CK_BUS_TIM10 149
173 #define CK_BUS_TIM11 150
174 #define CK_BUS_TIM12 151
175 #define CK_BUS_TIM13 152
176 #define CK_BUS_TIM14 153
177 #define CK_BUS_LPTIM1 154
178 #define CK_BUS_LPTIM2 155
179 #define CK_BUS_SPI2 156
180 #define CK_BUS_SPI3 157
181 #define CK_BUS_SPDIFRX 158
182 #define CK_BUS_USART2 159
183 #define CK_BUS_USART3 160
184 #define CK_BUS_UART4 161
185 #define CK_BUS_UART5 162
186 #define CK_BUS_I2C1 163
187 #define CK_BUS_I2C2 164
188 #define CK_BUS_I2C3 165
189 #define CK_BUS_I2C4 166
190 #define CK_BUS_I2C5 167
191 #define CK_BUS_I2C6 168
192 #define CK_BUS_I2C7 169
193 #define CK_BUS_I3C1 170
194 #define CK_BUS_I3C2 171
195 #define CK_BUS_I3C3 172
196 #define CK_BUS_TIM1 173
197 #define CK_BUS_TIM8 174
198 #define CK_BUS_TIM15 175
199 #define CK_BUS_TIM16 176
200 #define CK_BUS_TIM17 177
201 #define CK_BUS_TIM20 178
202 #define CK_BUS_SAI1 179
203 #define CK_BUS_SAI2 180
204 #define CK_BUS_SAI3 181
205 #define CK_BUS_SAI4 182
206 #define CK_BUS_USART1 183
207 #define CK_BUS_USART6 184
208 #define CK_BUS_UART7 185
209 #define CK_BUS_UART8 186
210 #define CK_BUS_UART9 187
211 #define CK_BUS_FDCAN 188
212 #define CK_BUS_SPI1 189
213 #define CK_BUS_SPI4 190
214 #define CK_BUS_SPI5 191
215 #define CK_BUS_SPI6 192
216 #define CK_BUS_SPI7 193
217 #define CK_BUS_BSEC 194
218 #define CK_BUS_IWDG1 195
219 #define CK_BUS_IWDG2 196
220 #define CK_BUS_IWDG3 197
221 #define CK_BUS_IWDG4 198
222 #define CK_BUS_WWDG1 199
223 #define CK_BUS_VREF 200
224 #define CK_BUS_DTS 201
225 #define CK_BUS_SERC 202
226 #define CK_BUS_HDP 203
227 #define CK_BUS_IS2M 204
228 #define CK_BUS_DSI 205
229 #define CK_BUS_LTDC 206
230 #define CK_BUS_CSI 207
231 #define CK_BUS_DCMIPP 208
232 #define CK_BUS_DDRC 209
233 #define CK_BUS_DDRCFG 210
234 #define CK_BUS_GICV2M 211
235 #define CK_BUS_USBTC 212
236 #define CK_BUS_USB3PCIEPHY 214
237 #define CK_BUS_STGEN 215
238 #define CK_BUS_VDEC 216
239 #define CK_BUS_VENC 217
240 #define CK_SYSDBG 218
241 #define CK_KER_TIM2 219
242 #define CK_KER_TIM3 220
243 #define CK_KER_TIM4 221
244 #define CK_KER_TIM5 222
245 #define CK_KER_TIM6 223
246 #define CK_KER_TIM7 224
247 #define CK_KER_TIM10 225
248 #define CK_KER_TIM11 226
249 #define CK_KER_TIM12 227
250 #define CK_KER_TIM13 228
251 #define CK_KER_TIM14 229
252 #define CK_KER_TIM1 230
253 #define CK_KER_TIM8 231
254 #define CK_KER_TIM15 232
255 #define CK_KER_TIM16 233
256 #define CK_KER_TIM17 234
257 #define CK_KER_TIM20 235
258 #define CK_BUS_SYSRAM 236
259 #define CK_BUS_VDERAM 237
260 #define CK_BUS_RETRAM 238
261 #define CK_BUS_OSPI1 239
262 #define CK_BUS_OSPI2 240
263 #define CK_BUS_OTFD1 241
264 #define CK_BUS_OTFD2 242
265 #define CK_BUS_SRAM1 243
266 #define CK_BUS_SRAM2 244
267 #define CK_BUS_SDMMC1 245
268 #define CK_BUS_SDMMC2 246
269 #define CK_BUS_SDMMC3 247
270 #define CK_BUS_DDR 248
271 #define CK_BUS_RISAF4 249
272 #define CK_BUS_USB2OHCI 250
273 #define CK_BUS_USB2EHCI 251
274 #define CK_BUS_USB3DR 252
275 #define CK_KER_LPTIM1 253
276 #define CK_KER_LPTIM2 254
277 #define CK_KER_USART2 255
278 #define CK_KER_UART4 256
279 #define CK_KER_USART3 257
280 #define CK_KER_UART5 258
281 #define CK_KER_SPI2 259
282 #define CK_KER_SPI3 260
283 #define CK_KER_SPDIFRX 261
284 #define CK_KER_I2C1 262
285 #define CK_KER_I2C2 263
286 #define CK_KER_I3C1 264
287 #define CK_KER_I3C2 265
288 #define CK_KER_I2C3 266
289 #define CK_KER_I2C5 267
290 #define CK_KER_I3C3 268
291 #define CK_KER_I2C4 269
292 #define CK_KER_I2C6 270
293 #define CK_KER_I2C7 271
294 #define CK_KER_SPI1 272
295 #define CK_KER_SPI4 273
296 #define CK_KER_SPI5 274
297 #define CK_KER_SPI6 275
298 #define CK_KER_SPI7 276
299 #define CK_KER_USART1 277
300 #define CK_KER_USART6 278
301 #define CK_KER_UART7 279
302 #define CK_KER_UART8 280
303 #define CK_KER_UART9 281
304 #define CK_KER_MDF1 282
305 #define CK_KER_SAI1 283
306 #define CK_KER_SAI2 284
307 #define CK_KER_SAI3 285
308 #define CK_KER_SAI4 286
309 #define CK_KER_FDCAN 287
310 #define CK_KER_DSIBLANE 288
311 #define CK_KER_DSIPHY 289
312 #define CK_KER_CSI 290
313 #define CK_KER_CSITXESC 291
314 #define CK_KER_CSIPHY 292
315 #define CK_KER_LVDSPHY 293
316 #define CK_KER_STGEN 294
317 #define CK_KER_USB3PCIEPHY 295
318 #define CK_KER_USB2PHY2EN 296
319 #define CK_KER_I3C4 297
320 #define CK_KER_SPI8 298
321 #define CK_KER_I2C8 299
322 #define CK_KER_LPUART1 300
323 #define CK_KER_LPTIM3 301
324 #define CK_KER_LPTIM4 302
325 #define CK_KER_LPTIM5 303
326 #define CK_KER_TSDBG 304
327 #define CK_KER_TPIU 305
328 #define CK_BUS_ETR 306
329 #define CK_BUS_SYSATB 307
330 #define CK_KER_ADC12 308
331 #define CK_KER_ADC3 309
332 #define CK_KER_OSPI1 310
333 #define CK_KER_OSPI2 311
334 #define CK_KER_FMC 312
335 #define CK_KER_SDMMC1 313
336 #define CK_KER_SDMMC2 314
337 #define CK_KER_SDMMC3 315
338 #define CK_KER_ETH1 316
339 #define CK_KER_ETH2 317
340 #define CK_KER_ETH1PTP 318
341 #define CK_KER_ETH2PTP 319
342 #define CK_KER_USB2PHY1 320
343 #define CK_KER_USB2PHY2 321
344 #define CK_KER_ETHSW 322
345 #define CK_KER_ETHSWREF 323
346 #define CK_MCO1 324
347 #define CK_MCO2 325
348 #define CK_KER_DTS 326
349 #define CK_ETH1_RX 327
350 #define CK_ETH1_TX 328
351 #define CK_ETH1_MAC 329
352 #define CK_ETH2_RX 330
353 #define CK_ETH2_TX 331
354 #define CK_ETH2_MAC 332
355 #define CK_ETH1_STP 333
356 #define CK_ETH2_STP 334
357 #define CK_KER_USBTC 335
358 #define CK_BUS_ADF1 336
359 #define CK_KER_ADF1 337
360 #define CK_BUS_LVDS 338
361 #define CK_KER_LTDC 339
362 #define CK_KER_GPU 340
363 #define CK_BUS_ETHSWACMCFG 341
364 #define CK_BUS_ETHSWACMMSG 342
365 #define HSE_DIV2_CK 343
366
367 #define STM32MP25_LAST_CLK 344
368
369 #define CK_SCMI_ICN_HS_MCU 0
370 #define CK_SCMI_ICN_SDMMC 1
371 #define CK_SCMI_ICN_DDR 2
372 #define CK_SCMI_ICN_DISPLAY 3
373 #define CK_SCMI_ICN_HSL 4
374 #define CK_SCMI_ICN_NIC 5
375 #define CK_SCMI_ICN_VID 6
376 #define CK_SCMI_FLEXGEN_07 7
377 #define CK_SCMI_FLEXGEN_08 8
378 #define CK_SCMI_FLEXGEN_09 9
379 #define CK_SCMI_FLEXGEN_10 10
380 #define CK_SCMI_FLEXGEN_11 11
381 #define CK_SCMI_FLEXGEN_12 12
382 #define CK_SCMI_FLEXGEN_13 13
383 #define CK_SCMI_FLEXGEN_14 14
384 #define CK_SCMI_FLEXGEN_15 15
385 #define CK_SCMI_FLEXGEN_16 16
386 #define CK_SCMI_FLEXGEN_17 17
387 #define CK_SCMI_FLEXGEN_18 18
388 #define CK_SCMI_FLEXGEN_19 19
389 #define CK_SCMI_FLEXGEN_20 20
390 #define CK_SCMI_FLEXGEN_21 21
391 #define CK_SCMI_FLEXGEN_22 22
392 #define CK_SCMI_FLEXGEN_23 23
393 #define CK_SCMI_FLEXGEN_24 24
394 #define CK_SCMI_FLEXGEN_25 25
395 #define CK_SCMI_FLEXGEN_26 26
396 #define CK_SCMI_FLEXGEN_27 27
397 #define CK_SCMI_FLEXGEN_28 28
398 #define CK_SCMI_FLEXGEN_29 29
399 #define CK_SCMI_FLEXGEN_30 30
400 #define CK_SCMI_FLEXGEN_31 31
401 #define CK_SCMI_FLEXGEN_32 32
402 #define CK_SCMI_FLEXGEN_33 33
403 #define CK_SCMI_FLEXGEN_34 34
404 #define CK_SCMI_FLEXGEN_35 35
405 #define CK_SCMI_FLEXGEN_36 36
406 #define CK_SCMI_FLEXGEN_37 37
407 #define CK_SCMI_FLEXGEN_38 38
408 #define CK_SCMI_FLEXGEN_39 39
409 #define CK_SCMI_FLEXGEN_40 40
410 #define CK_SCMI_FLEXGEN_41 41
411 #define CK_SCMI_FLEXGEN_42 42
412 #define CK_SCMI_FLEXGEN_43 43
413 #define CK_SCMI_FLEXGEN_44 44
414 #define CK_SCMI_FLEXGEN_45 45
415 #define CK_SCMI_FLEXGEN_46 46
416 #define CK_SCMI_FLEXGEN_47 47
417 #define CK_SCMI_FLEXGEN_48 48
418 #define CK_SCMI_FLEXGEN_49 49
419 #define CK_SCMI_FLEXGEN_50 50
420 #define CK_SCMI_FLEXGEN_51 51
421 #define CK_SCMI_FLEXGEN_52 52
422 #define CK_SCMI_FLEXGEN_53 53
423 #define CK_SCMI_FLEXGEN_54 54
424 #define CK_SCMI_FLEXGEN_55 55
425 #define CK_SCMI_FLEXGEN_56 56
426 #define CK_SCMI_FLEXGEN_57 57
427 #define CK_SCMI_FLEXGEN_58 58
428 #define CK_SCMI_FLEXGEN_59 59
429 #define CK_SCMI_FLEXGEN_60 60
430 #define CK_SCMI_FLEXGEN_61 61
431 #define CK_SCMI_FLEXGEN_62 62
432 #define CK_SCMI_FLEXGEN_63 63
433 #define CK_SCMI_ICN_LS_MCU 64
434 #define CK_SCMI_HSE 65
435 #define CK_SCMI_LSE 66
436 #define CK_SCMI_HSI 67
437 #define CK_SCMI_LSI 68
438 #define CK_SCMI_MSI 69
439 #define CK_SCMI_HSE_DIV2 70
440 #define CK_SCMI_CPU1 71
441 #define CK_SCMI_SYSCPU1 72
442 #define CK_SCMI_PLL2 73
443 #define CK_SCMI_PLL3 74
444 #define CK_SCMI_RTC 75
445 #define CK_SCMI_RTCCK 76
446 #define CK_SCMI_ICN_APB1 77
447 #define CK_SCMI_ICN_APB2 78
448 #define CK_SCMI_ICN_APB3 79
449 #define CK_SCMI_ICN_APB4 80
450 #define CK_SCMI_ICN_APBDBG 81
451 #define CK_SCMI_TIMG1 82
452 #define CK_SCMI_TIMG2 83
453 #define CK_SCMI_BKPSRAM 84
454 #define CK_SCMI_BSEC 85
455 #define CK_SCMI_ETR 87
456 #define CK_SCMI_FMC 88
457 #define CK_SCMI_GPIOA 89
458 #define CK_SCMI_GPIOB 90
459 #define CK_SCMI_GPIOC 91
460 #define CK_SCMI_GPIOD 92
461 #define CK_SCMI_GPIOE 93
462 #define CK_SCMI_GPIOF 94
463 #define CK_SCMI_GPIOG 95
464 #define CK_SCMI_GPIOH 96
465 #define CK_SCMI_GPIOI 97
466 #define CK_SCMI_GPIOJ 98
467 #define CK_SCMI_GPIOK 99
468 #define CK_SCMI_GPIOZ 100
469 #define CK_SCMI_HPDMA1 101
470 #define CK_SCMI_HPDMA2 102
471 #define CK_SCMI_HPDMA3 103
472 #define CK_SCMI_HSEM 104
473 #define CK_SCMI_IPCC1 105
474 #define CK_SCMI_IPCC2 106
475 #define CK_SCMI_LPDMA 107
476 #define CK_SCMI_RETRAM 108
477 #define CK_SCMI_SRAM1 109
478 #define CK_SCMI_SRAM2 110
479 #define CK_SCMI_LPSRAM1 111
480 #define CK_SCMI_LPSRAM2 112
481 #define CK_SCMI_LPSRAM3 113
482 #define CK_SCMI_VDERAM 114
483 #define CK_SCMI_SYSRAM 115
484 #define CK_SCMI_OSPI1 116
485 #define CK_SCMI_OSPI2 117
486 #define CK_SCMI_TPIU 118
487 #define CK_SCMI_SYSDBG 119
488 #define CK_SCMI_SYSATB 120
489 #define CK_SCMI_TSDBG 121
490 #define CK_SCMI_STM500 122
491
492 #endif /* _DT_BINDINGS_STM32MP25_CLKS_H_ */