include/fpga.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * (C) Copyright 2002
   4  * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
   5  */
   6
   7 #include <linux/types.h>               /* for ulong typedef */
   8
   9 #ifndef _FPGA_H_
  10 #define _FPGA_H_
  11
  12 /* fpga_xxxx function return value definitions */
  13 #define FPGA_SUCCESS            0
  14 #define FPGA_FAIL               1
  15
  16 /* device numbers must be non-negative */
  17 #define FPGA_INVALID_DEVICE     -1
  18
  19 #define FPGA_ENC_DEV_KEY        0
  20 #define FPGA_ENC_USR_KEY        1
  21 #define FPGA_NO_ENC_OR_NO_AUTH  2
  22
  23 /* root data type defintions */
  24 typedef enum {                  /* typedef fpga_type */
  25         fpga_min_type,          /* range check value */
  26         fpga_xilinx,            /* Xilinx Family) */
  27         fpga_altera,            /* unimplemented */
  28         fpga_lattice,           /* Lattice family */
  29         fpga_undefined          /* invalid range check value */
  30 } fpga_type;                    /* end, typedef fpga_type */
  31
  32 typedef struct {                /* typedef fpga_desc */
  33         fpga_type devtype;      /* switch value to select sub-functions */
  34         void *devdesc;          /* real device descriptor */
  35 } fpga_desc;                    /* end, typedef fpga_desc */
  36
  37 typedef struct {                /* typedef fpga_desc */
  38         unsigned int blocksize;
  39         char *interface;
  40         char *dev_part;
  41         const char *filename;
  42         int fstype;
  43 } fpga_fs_info;
  44
  45 struct fpga_secure_info {
  46         u8 *userkey_addr;
  47         u8 authflag;
  48         u8 encflag;
  49 };
  50
  51 typedef enum {
  52         BIT_FULL = 0,
  53         BIT_PARTIAL,
  54         BIT_NONE = 0xFF,
  55 } bitstream_type;
  56
  57 /* root function definitions */
  58 void fpga_init(void);
  59 int fpga_add(fpga_type devtype, void *desc);
  60 int fpga_count(void);
  61 const fpga_desc *const fpga_get_desc(int devnum);
  62 int fpga_is_partial_data(int devnum, size_t img_len);
  63 #if CONFIG_IS_ENABLED(FPGA)
  64 int fpga_load(int devnum, const void *buf, size_t bsize,
  65               bitstream_type bstype, int flags);
  66 #else
  67 static inline int fpga_load(int devnum, const void *buf, size_t bsize,
  68               bitstream_type bstype, int flags)
  69 {
  70         return FPGA_FAIL;
  71 }
  72 #endif
  73 int fpga_fsload(int devnum, const void *buf, size_t size,
  74                 fpga_fs_info *fpga_fsinfo);
  75 int fpga_loads(int devnum, const void *buf, size_t size,
  76                struct fpga_secure_info *fpga_sec_info);
  77 int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
  78                        bitstream_type bstype);
  79 int fpga_dump(int devnum, const void *buf, size_t bsize);
  80 int fpga_info(int devnum);
  81 const fpga_desc *const fpga_validate(int devnum, const void *buf,
  82                                      size_t bsize, char *fn);
  83 int fpga_compatible2flag(int devnum, const char *compatible);
  84
  85 #endif  /* _FPGA_H_ */