include/fsl-mc/fsl_mc_cmd.h

   1 /* Copyright 2013-2015 Freescale Semiconductor Inc.
   2  *
   3  * SPDX-License-Identifier:     GPL-2.0+
   4  */
   5 #ifndef __FSL_MC_CMD_H
   6 #define __FSL_MC_CMD_H
   7
   8 #define MC_CMD_NUM_OF_PARAMS    7
   9
  10 #define MAKE_UMASK64(_width) \
  11         ((uint64_t)((_width) < 64 ? ((uint64_t)1 << (_width)) - 1 : -1))
  12
  13 static inline uint64_t mc_enc(int lsoffset, int width, uint64_t val)
  14 {
  15         return (uint64_t)(((uint64_t)val & MAKE_UMASK64(width)) << lsoffset);
  16 }
  17 static inline uint64_t mc_dec(uint64_t val, int lsoffset, int width)
  18 {
  19         return (uint64_t)((val >> lsoffset) & MAKE_UMASK64(width));
  20 }
  21
  22 struct mc_command {
  23         uint64_t header;
  24         uint64_t params[MC_CMD_NUM_OF_PARAMS];
  25 };
  26
  27 enum mc_cmd_status {
  28         MC_CMD_STATUS_OK = 0x0, /*!< Completed successfully */
  29         MC_CMD_STATUS_READY = 0x1, /*!< Ready to be processed */
  30         MC_CMD_STATUS_AUTH_ERR = 0x3, /*!< Authentication error */
  31         MC_CMD_STATUS_NO_PRIVILEGE = 0x4, /*!< No privilege */
  32         MC_CMD_STATUS_DMA_ERR = 0x5, /*!< DMA or I/O error */
  33         MC_CMD_STATUS_CONFIG_ERR = 0x6, /*!< Configuration error */
  34         MC_CMD_STATUS_TIMEOUT = 0x7, /*!< Operation timed out */
  35         MC_CMD_STATUS_NO_RESOURCE = 0x8, /*!< No resources */
  36         MC_CMD_STATUS_NO_MEMORY = 0x9, /*!< No memory available */
  37         MC_CMD_STATUS_BUSY = 0xA, /*!< Device is busy */
  38         MC_CMD_STATUS_UNSUPPORTED_OP = 0xB, /*!< Unsupported operation */
  39         MC_CMD_STATUS_INVALID_STATE = 0xC /*!< Invalid state */
  40 };
  41
  42 /*
  43  * MC command flags
  44  */
  45
  46 /* High priority flag */
  47 #define MC_CMD_FLAG_PRI         0x00008000
  48 /* No flags */
  49 #define MC_CMD_NO_FLAGS         0x00000000
  50 /* Command completion flag */
  51 #define MC_CMD_FLAG_INTR_DIS    0x01000000
  52
  53
  54 #define MC_CMD_HDR_CMDID_O      52      /* Command ID field offset */
  55 #define MC_CMD_HDR_CMDID_S      12      /* Command ID field size */
  56 #define MC_CMD_HDR_STATUS_O     16      /* Status field offset */
  57 #define MC_CMD_HDR_TOKEN_O      38      /* Token field offset */
  58 #define MC_CMD_HDR_TOKEN_S      10      /* Token field size */
  59 #define MC_CMD_HDR_STATUS_S     8       /* Status field size*/
  60 #define MC_CMD_HDR_FLAGS_O      0       /* Flags field offset */
  61 #define MC_CMD_HDR_FLAGS_S      32      /* Flags field size*/
  62 #define MC_CMD_HDR_FLAGS_MASK   0xFF00FF00 /* Command flags mask */
  63
  64 #define MC_CMD_HDR_READ_STATUS(_hdr) \
  65         ((enum mc_cmd_status)mc_dec((_hdr), \
  66                 MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S))
  67
  68 #define MC_CMD_HDR_READ_TOKEN(_hdr) \
  69         ((uint16_t)mc_dec((_hdr), MC_CMD_HDR_TOKEN_O, MC_CMD_HDR_TOKEN_S))
  70
  71 #define MC_PREP_OP(_ext, _param, _offset, _width, _type, _arg) \
  72         ((_ext)[_param] |= cpu_to_le64(mc_enc((_offset), (_width), _arg)))
  73
  74 #define MC_EXT_OP(_ext, _param, _offset, _width, _type, _arg) \
  75         (_arg = (_type)mc_dec(cpu_to_le64(_ext[_param]), (_offset), (_width)))
  76
  77 #define MC_CMD_OP(_cmd, _param, _offset, _width, _type, _arg) \
  78         ((_cmd).params[_param] |= mc_enc((_offset), (_width), _arg))
  79
  80 #define MC_RSP_OP(_cmd, _param, _offset, _width, _type, _arg) \
  81         (_arg = (_type)mc_dec(_cmd.params[_param], (_offset), (_width)))
  82
  83 static inline uint64_t mc_encode_cmd_header(uint16_t cmd_id,
  84                                             uint32_t cmd_flags,
  85                                             uint16_t token)
  86 {
  87         uint64_t hdr;
  88
  89         hdr = mc_enc(MC_CMD_HDR_CMDID_O, MC_CMD_HDR_CMDID_S, cmd_id);
  90         hdr |= mc_enc(MC_CMD_HDR_FLAGS_O, MC_CMD_HDR_FLAGS_S,
  91                        (cmd_flags & MC_CMD_HDR_FLAGS_MASK));
  92         hdr |= mc_enc(MC_CMD_HDR_TOKEN_O, MC_CMD_HDR_TOKEN_S, token);
  93         hdr |= mc_enc(MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S,
  94                        MC_CMD_STATUS_READY);
  95
  96         return hdr;
  97 }
  98
  99 /**
 100  * mc_write_command - writes a command to a Management Complex (MC) portal
 101  *
 102  * @portal: pointer to an MC portal
 103  * @cmd: pointer to a filled command
 104  */
 105 static inline void mc_write_command(struct mc_command __iomem *portal,
 106                                     struct mc_command *cmd)
 107 {
 108         int i;
 109
 110         /* copy command parameters into the portal */
 111         for (i = 0; i < MC_CMD_NUM_OF_PARAMS; i++)
 112                 writeq(cmd->params[i], &portal->params[i]);
 113
 114         /* submit the command by writing the header */
 115         writeq(cmd->header, &portal->header);
 116 }
 117
 118 /**
 119  * mc_read_response - reads the response for the last MC command from a
 120  * Management Complex (MC) portal
 121  *
 122  * @portal: pointer to an MC portal
 123  * @resp: pointer to command response buffer
 124  *
 125  * Returns MC_CMD_STATUS_OK on Success; Error code otherwise.
 126  */
 127 static inline enum mc_cmd_status mc_read_response(
 128                                         struct mc_command __iomem *portal,
 129                                         struct mc_command *resp)
 130 {
 131         int i;
 132         enum mc_cmd_status status;
 133
 134         /* Copy command response header from MC portal: */
 135         resp->header = readq(&portal->header);
 136         status = MC_CMD_HDR_READ_STATUS(resp->header);
 137         if (status != MC_CMD_STATUS_OK)
 138                 return status;
 139
 140         /* Copy command response data from MC portal: */
 141         for (i = 0; i < MC_CMD_NUM_OF_PARAMS; i++)
 142                 resp->params[i] = readq(&portal->params[i]);
 143
 144         return status;
 145 }
 146
 147 #endif /* __FSL_MC_CMD_H */