include/i2c.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
   4  * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
   5  * Changes for multibus/multiadapter I2C support.
   6  *
   7  * (C) Copyright 2001
   8  * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
   9  *
  10  * The original I2C interface was
  11  *   (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
  12  *   AIRVENT SAM s.p.a - RIMINI(ITALY)
  13  * but has been changed substantially.
  14  */
  15
  16 #ifndef _I2C_H_
  17 #define _I2C_H_
  18
  19 /*
  20  * For now there are essentially two parts to this file - driver model
  21  * here at the top, and the older code below (with CONFIG_SYS_I2C being
  22  * most recent). The plan is to migrate everything to driver model.
  23  * The driver model structures and API are separate as they are different
  24  * enough as to be incompatible for compilation purposes.
  25  */
  26
  27 enum dm_i2c_chip_flags {
  28         DM_I2C_CHIP_10BIT       = 1 << 0, /* Use 10-bit addressing */
  29         DM_I2C_CHIP_RD_ADDRESS  = 1 << 1, /* Send address for each read byte */
  30         DM_I2C_CHIP_WR_ADDRESS  = 1 << 2, /* Send address for each write byte */
  31 };
  32
  33 /** enum i2c_speed_mode - standard I2C speed modes */
  34 enum i2c_speed_mode {
  35         IC_SPEED_MODE_STANDARD,
  36         IC_SPEED_MODE_FAST,
  37         IC_SPEED_MODE_FAST_PLUS,
  38         IC_SPEED_MODE_HIGH,
  39         IC_SPEED_MODE_FAST_ULTRA,
  40
  41         IC_SPEED_MODE_COUNT,
  42 };
  43
  44 /** enum i2c_speed_rate - standard I2C speeds in Hz */
  45 enum i2c_speed_rate {
  46         I2C_SPEED_STANDARD_RATE         = 100000,
  47         I2C_SPEED_FAST_RATE             = 400000,
  48         I2C_SPEED_FAST_PLUS_RATE        = 1000000,
  49         I2C_SPEED_HIGH_RATE             = 3400000,
  50         I2C_SPEED_FAST_ULTRA_RATE       = 5000000,
  51 };
  52
  53 /** enum i2c_address_mode - available address modes */
  54 enum i2c_address_mode {
  55         I2C_MODE_7_BIT,
  56         I2C_MODE_10_BIT
  57 };
  58
  59 struct udevice;
  60 /**
  61  * struct dm_i2c_chip - information about an i2c chip
  62  *
  63  * An I2C chip is a device on the I2C bus. It sits at a particular address
  64  * and normally supports 7-bit or 10-bit addressing.
  65  *
  66  * To obtain this structure, use dev_get_parent_platdata(dev) where dev is
  67  * the chip to examine.
  68  *
  69  * @chip_addr:  Chip address on bus
  70  * @offset_len: Length of offset in bytes. A single byte offset can
  71  *              represent up to 256 bytes. A value larger than 1 may be
  72  *              needed for larger devices.
  73  * @flags:      Flags for this chip (dm_i2c_chip_flags)
  74  * @chip_addr_offset_mask: Mask of offset bits within chip_addr. Used for
  75  *                         devices which steal addresses as part of offset.
  76  *                         If offset_len is zero, then the offset is encoded
  77  *                         completely within the chip address itself.
  78  *                         e.g. a devce with chip address of 0x2c with 512
  79  *                         registers might use the bottom bit of the address
  80  *                         to indicate which half of the address space is being
  81  *                         accessed while still only using 1 byte offset.
  82  *                         This means it will respond to  chip address 0x2c and
  83  *                         0x2d.
  84  *                         A real world example is the Atmel AT24C04. It's
  85  *                         datasheet explains it's usage of this addressing
  86  *                         mode.
  87  * @emul: Emulator for this chip address (only used for emulation)
  88  */
  89 struct dm_i2c_chip {
  90         uint chip_addr;
  91         uint offset_len;
  92         uint flags;
  93         uint chip_addr_offset_mask;
  94 #ifdef CONFIG_SANDBOX
  95         struct udevice *emul;
  96         bool test_mode;
  97 #endif
  98 };
  99
 100 /**
 101  * struct dm_i2c_bus- information about an i2c bus
 102  *
 103  * An I2C bus contains 0 or more chips on it, each at its own address. The
 104  * bus can operate at different speeds (measured in Hz, typically 100KHz
 105  * or 400KHz).
 106  *
 107  * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
 108  * I2C bus udevice.
 109  *
 110  * @speed_hz: Bus speed in hertz (typically 100000)
 111  * @max_transaction_bytes: Maximal size of single I2C transfer
 112  */
 113 struct dm_i2c_bus {
 114         int speed_hz;
 115         int max_transaction_bytes;
 116 };
 117
 118 /*
 119  * Not all of these flags are implemented in the U-Boot API
 120  */
 121 enum dm_i2c_msg_flags {
 122         I2C_M_TEN               = 0x0010, /* ten-bit chip address */
 123         I2C_M_RD                = 0x0001, /* read data, from slave to master */
 124         I2C_M_STOP              = 0x8000, /* send stop after this message */
 125         I2C_M_NOSTART           = 0x4000, /* no start before this message */
 126         I2C_M_REV_DIR_ADDR      = 0x2000, /* invert polarity of R/W bit */
 127         I2C_M_IGNORE_NAK        = 0x1000, /* continue after NAK */
 128         I2C_M_NO_RD_ACK         = 0x0800, /* skip the Ack bit on reads */
 129         I2C_M_RECV_LEN          = 0x0400, /* length is first received byte */
 130 };
 131
 132 /**
 133  * struct i2c_msg - an I2C message
 134  *
 135  * @addr:       Slave address
 136  * @flags:      Flags (see enum dm_i2c_msg_flags)
 137  * @len:        Length of buffer in bytes, may be 0 for a probe
 138  * @buf:        Buffer to send/receive, or NULL if no data
 139  */
 140 struct i2c_msg {
 141         uint addr;
 142         uint flags;
 143         uint len;
 144         u8 *buf;
 145 };
 146
 147 /**
 148  * struct i2c_msg_list - a list of I2C messages
 149  *
 150  * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
 151  * appropriate in U-Boot.
 152  *
 153  * @msg:        Pointer to i2c_msg array
 154  * @nmsgs:      Number of elements in the array
 155  */
 156 struct i2c_msg_list {
 157         struct i2c_msg *msgs;
 158         uint nmsgs;
 159 };
 160
 161 /**
 162  * dm_i2c_read() - read bytes from an I2C chip
 163  *
 164  * To obtain an I2C device (called a 'chip') given the I2C bus address you
 165  * can use i2c_get_chip(). To obtain a bus by bus number use
 166  * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
 167  *
 168  * To set the address length of a devce use i2c_set_addr_len(). It
 169  * defaults to 1.
 170  *
 171  * @dev:        Chip to read from
 172  * @offset:     Offset within chip to start reading
 173  * @buffer:     Place to put data
 174  * @len:        Number of bytes to read
 175  *
 176  * @return 0 on success, -ve on failure
 177  */
 178 int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
 179
 180 /**
 181  * dm_i2c_write() - write bytes to an I2C chip
 182  *
 183  * See notes for dm_i2c_read() above.
 184  *
 185  * @dev:        Chip to write to
 186  * @offset:     Offset within chip to start writing
 187  * @buffer:     Buffer containing data to write
 188  * @len:        Number of bytes to write
 189  *
 190  * @return 0 on success, -ve on failure
 191  */
 192 int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
 193                  int len);
 194
 195 /**
 196  * dm_i2c_probe() - probe a particular chip address
 197  *
 198  * This can be useful to check for the existence of a chip on the bus.
 199  * It is typically implemented by writing the chip address to the bus
 200  * and checking that the chip replies with an ACK.
 201  *
 202  * @bus:        Bus to probe
 203  * @chip_addr:  7-bit address to probe (10-bit and others are not supported)
 204  * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
 205  * @devp:       Returns the device found, or NULL if none
 206  * @return 0 if a chip was found at that address, -ve if not
 207  */
 208 int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
 209                  struct udevice **devp);
 210
 211 /**
 212  * dm_i2c_reg_read() - Read a value from an I2C register
 213  *
 214  * This reads a single value from the given address in an I2C chip
 215  *
 216  * @dev:        Device to use for transfer
 217  * @addr:       Address to read from
 218  * @return value read, or -ve on error
 219  */
 220 int dm_i2c_reg_read(struct udevice *dev, uint offset);
 221
 222 /**
 223  * dm_i2c_reg_write() - Write a value to an I2C register
 224  *
 225  * This writes a single value to the given address in an I2C chip
 226  *
 227  * @dev:        Device to use for transfer
 228  * @addr:       Address to write to
 229  * @val:        Value to write (normally a byte)
 230  * @return 0 on success, -ve on error
 231  */
 232 int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
 233
 234 /**
 235  * dm_i2c_xfer() - Transfer messages over I2C
 236  *
 237  * This transfers a raw message. It is best to use dm_i2c_reg_read/write()
 238  * instead.
 239  *
 240  * @dev:        Device to use for transfer
 241  * @msg:        List of messages to transfer
 242  * @nmsgs:      Number of messages to transfer
 243  * @return 0 on success, -ve on error
 244  */
 245 int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs);
 246
 247 /**
 248  * dm_i2c_set_bus_speed() - set the speed of a bus
 249  *
 250  * @bus:        Bus to adjust
 251  * @speed:      Requested speed in Hz
 252  * @return 0 if OK, -EINVAL for invalid values
 253  */
 254 int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
 255
 256 /**
 257  * dm_i2c_get_bus_speed() - get the speed of a bus
 258  *
 259  * @bus:        Bus to check
 260  * @return speed of selected I2C bus in Hz, -ve on error
 261  */
 262 int dm_i2c_get_bus_speed(struct udevice *bus);
 263
 264 /**
 265  * i2c_set_chip_flags() - set flags for a chip
 266  *
 267  * Typically addresses are 7 bits, but for 10-bit addresses you should set
 268  * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
 269  *
 270  * @dev:        Chip to adjust
 271  * @flags:      New flags
 272  * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
 273  */
 274 int i2c_set_chip_flags(struct udevice *dev, uint flags);
 275
 276 /**
 277  * i2c_get_chip_flags() - get flags for a chip
 278  *
 279  * @dev:        Chip to check
 280  * @flagsp:     Place to put flags
 281  * @return 0 if OK, other -ve value on error
 282  */
 283 int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
 284
 285 /**
 286  * i2c_set_offset_len() - set the offset length for a chip
 287  *
 288  * The offset used to access a chip may be up to 4 bytes long. Typically it
 289  * is only 1 byte, which is enough for chips with 256 bytes of memory or
 290  * registers. The default value is 1, but you can call this function to
 291  * change it.
 292  *
 293  * @offset_len: New offset length value (typically 1 or 2)
 294  */
 295 int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
 296
 297 /**
 298  * i2c_get_offset_len() - get the offset length for a chip
 299  *
 300  * @return:     Current offset length value (typically 1 or 2)
 301  */
 302 int i2c_get_chip_offset_len(struct udevice *dev);
 303
 304 /**
 305  * i2c_set_chip_addr_offset_mask() - set mask of address bits usable by offset
 306  *
 307  * Some devices listen on multiple chip addresses to achieve larger offsets
 308  * than their single or multiple byte offsets would allow for. You can use this
 309  * function to set the bits that are valid to be used for offset overflow.
 310  *
 311  * @mask: The mask to be used for high offset bits within address
 312  * @return 0 if OK, other -ve value on error
 313  */
 314 int i2c_set_chip_addr_offset_mask(struct udevice *dev, uint mask);
 315
 316 /*
 317  * i2c_get_chip_addr_offset_mask() - get mask of address bits usable by offset
 318  *
 319  * @return current chip addr offset mask
 320  */
 321 uint i2c_get_chip_addr_offset_mask(struct udevice *dev);
 322
 323 /**
 324  * i2c_deblock() - recover a bus that is in an unknown state
 325  *
 326  * See the deblock() method in 'struct dm_i2c_ops' for full information
 327  *
 328  * @bus:        Bus to recover
 329  * @return 0 if OK, -ve on error
 330  */
 331 int i2c_deblock(struct udevice *bus);
 332
 333 /**
 334  * i2c_deblock_gpio_loop() - recover a bus from an unknown state by toggling SDA/SCL
 335  *
 336  * This is the inner logic used for toggling I2C SDA/SCL lines as GPIOs
 337  * for deblocking the I2C bus.
 338  *
 339  * @sda_pin:    SDA GPIO
 340  * @scl_pin:    SCL GPIO
 341  * @scl_count:  Number of SCL clock cycles generated to deblock SDA
 342  * @start_count:Number of I2C start conditions sent after deblocking SDA
 343  * @delay:      Delay between SCL clock line changes
 344  * @return 0 if OK, -ve on error
 345  */
 346 struct gpio_desc;
 347 int i2c_deblock_gpio_loop(struct gpio_desc *sda_pin, struct gpio_desc *scl_pin,
 348                           unsigned int scl_count, unsigned int start_count,
 349                           unsigned int delay);
 350
 351 /**
 352  * struct dm_i2c_ops - driver operations for I2C uclass
 353  *
 354  * Drivers should support these operations unless otherwise noted. These
 355  * operations are intended to be used by uclass code, not directly from
 356  * other code.
 357  */
 358 struct dm_i2c_ops {
 359         /**
 360          * xfer() - transfer a list of I2C messages
 361          *
 362          * @bus:        Bus to read from
 363          * @msg:        List of messages to transfer
 364          * @nmsgs:      Number of messages in the list
 365          * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
 366          *      -ECOMM if the speed cannot be supported, -EPROTO if the chip
 367          *      flags cannot be supported, other -ve value on some other error
 368          */
 369         int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
 370
 371         /**
 372          * probe_chip() - probe for the presense of a chip address
 373          *
 374          * This function is optional. If omitted, the uclass will send a zero
 375          * length message instead.
 376          *
 377          * @bus:        Bus to probe
 378          * @chip_addr:  Chip address to probe
 379          * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
 380          * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
 381          * to default probem other -ve value on error
 382          */
 383         int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
 384
 385         /**
 386          * set_bus_speed() - set the speed of a bus (optional)
 387          *
 388          * The bus speed value will be updated by the uclass if this function
 389          * does not return an error. This method is optional - if it is not
 390          * provided then the driver can read the speed from
 391          * dev_get_uclass_priv(bus)->speed_hz
 392          *
 393          * @bus:        Bus to adjust
 394          * @speed:      Requested speed in Hz
 395          * @return 0 if OK, -EINVAL for invalid values
 396          */
 397         int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
 398
 399         /**
 400          * get_bus_speed() - get the speed of a bus (optional)
 401          *
 402          * Normally this can be provided by the uclass, but if you want your
 403          * driver to check the bus speed by looking at the hardware, you can
 404          * implement that here. This method is optional. This method would
 405          * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
 406          *
 407          * @bus:        Bus to check
 408          * @return speed of selected I2C bus in Hz, -ve on error
 409          */
 410         int (*get_bus_speed)(struct udevice *bus);
 411
 412         /**
 413          * set_flags() - set the flags for a chip (optional)
 414          *
 415          * This is generally implemented by the uclass, but drivers can
 416          * check the value to ensure that unsupported options are not used.
 417          * This method is optional. If provided, this method will always be
 418          * called when the flags change.
 419          *
 420          * @dev:        Chip to adjust
 421          * @flags:      New flags value
 422          * @return 0 if OK, -EINVAL if value is unsupported
 423          */
 424         int (*set_flags)(struct udevice *dev, uint flags);
 425
 426         /**
 427          * deblock() - recover a bus that is in an unknown state
 428          *
 429          * I2C is a synchronous protocol and resets of the processor in the
 430          * middle of an access can block the I2C Bus until a powerdown of
 431          * the full unit is done. This is because slaves can be stuck
 432          * waiting for addition bus transitions for a transaction that will
 433          * never complete. Resetting the I2C master does not help. The only
 434          * way is to force the bus through a series of transitions to make
 435          * sure that all slaves are done with the transaction. This method
 436          * performs this 'deblocking' if support by the driver.
 437          *
 438          * This method is optional.
 439          */
 440         int (*deblock)(struct udevice *bus);
 441 };
 442
 443 #define i2c_get_ops(dev)        ((struct dm_i2c_ops *)(dev)->driver->ops)
 444
 445 /**
 446  * struct i2c_mux_ops - operations for an I2C mux
 447  *
 448  * The current mux state is expected to be stored in the mux itself since
 449  * it is the only thing that knows how to make things work. The mux can
 450  * record the current state and then avoid switching unless it is necessary.
 451  * So select() can be skipped if the mux is already in the correct state.
 452  * Also deselect() can be made a nop if required.
 453  */
 454 struct i2c_mux_ops {
 455         /**
 456          * select() - select one of of I2C buses attached to a mux
 457          *
 458          * This will be called when there is no bus currently selected by the
 459          * mux. This method does not need to deselect the old bus since
 460          * deselect() will be already have been called if necessary.
 461          *
 462          * @mux:        Mux device
 463          * @bus:        I2C bus to select
 464          * @channel:    Channel number correponding to the bus to select
 465          * @return 0 if OK, -ve on error
 466          */
 467         int (*select)(struct udevice *mux, struct udevice *bus, uint channel);
 468
 469         /**
 470          * deselect() - select one of of I2C buses attached to a mux
 471          *
 472          * This is used to deselect the currently selected I2C bus.
 473          *
 474          * @mux:        Mux device
 475          * @bus:        I2C bus to deselect
 476          * @channel:    Channel number correponding to the bus to deselect
 477          * @return 0 if OK, -ve on error
 478          */
 479         int (*deselect)(struct udevice *mux, struct udevice *bus, uint channel);
 480 };
 481
 482 #define i2c_mux_get_ops(dev)    ((struct i2c_mux_ops *)(dev)->driver->ops)
 483
 484 /**
 485  * i2c_get_chip() - get a device to use to access a chip on a bus
 486  *
 487  * This returns the device for the given chip address. The device can then
 488  * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
 489  *
 490  * @bus:        Bus to examine
 491  * @chip_addr:  Chip address for the new device
 492  * @offset_len: Length of a register offset in bytes (normally 1)
 493  * @devp:       Returns pointer to new device if found or -ENODEV if not
 494  *              found
 495  */
 496 int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
 497                  struct udevice **devp);
 498
 499 /**
 500  * i2c_get_chip_for_busnum() - get a device to use to access a chip on
 501  *                             a bus number
 502  *
 503  * This returns the device for the given chip address on a particular bus
 504  * number.
 505  *
 506  * @busnum:     Bus number to examine
 507  * @chip_addr:  Chip address for the new device
 508  * @offset_len: Length of a register offset in bytes (normally 1)
 509  * @devp:       Returns pointer to new device if found or -ENODEV if not
 510  *              found
 511  */
 512 int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
 513                             struct udevice **devp);
 514
 515 /**
 516  * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
 517  *
 518  * This decodes the chip address from a device tree node and puts it into
 519  * its dm_i2c_chip structure. This should be called in your driver's
 520  * ofdata_to_platdata() method.
 521  *
 522  * @blob:       Device tree blob
 523  * @node:       Node offset to read from
 524  * @spi:        Place to put the decoded information
 525  */
 526 int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip);
 527
 528 /**
 529  * i2c_dump_msgs() - Dump a list of I2C messages
 530  *
 531  * This may be useful for debugging.
 532  *
 533  * @msg:        Message list to dump
 534  * @nmsgs:      Number of messages
 535  */
 536 void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs);
 537
 538 /**
 539  * i2c_emul_find() - Find an emulator for an i2c sandbox device
 540  *
 541  * This looks at the device's 'emul' phandle
 542  *
 543  * @dev: Device to find an emulator for
 544  * @emulp: Returns the associated emulator, if found *
 545  * @return 0 if OK, -ENOENT or -ENODEV if not found
 546  */
 547 int i2c_emul_find(struct udevice *dev, struct udevice **emulp);
 548
 549 /**
 550  * i2c_emul_get_device() - Find the device being emulated
 551  *
 552  * Given an emulator this returns the associated device
 553  *
 554  * @emul: Emulator for the device
 555  * @return device that @emul is emulating
 556  */
 557 struct udevice *i2c_emul_get_device(struct udevice *emul);
 558
 559 #ifndef CONFIG_DM_I2C
 560
 561 /*
 562  * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
 563  *
 564  * The implementation MUST NOT use static or global variables if the
 565  * I2C routines are used to read SDRAM configuration information
 566  * because this is done before the memories are initialized. Limited
 567  * use of stack-based variables are OK (the initial stack size is
 568  * limited).
 569  *
 570  * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
 571  */
 572
 573 /*
 574  * Configuration items.
 575  */
 576 #define I2C_RXTX_LEN    128     /* maximum tx/rx buffer length */
 577
 578 #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
 579 /* no muxes used bus = i2c adapters */
 580 #define CONFIG_SYS_I2C_DIRECT_BUS       1
 581 #define CONFIG_SYS_I2C_MAX_HOPS         0
 582 #define CONFIG_SYS_NUM_I2C_BUSES        ll_entry_count(struct i2c_adapter, i2c)
 583 #else
 584 /* we use i2c muxes */
 585 #undef CONFIG_SYS_I2C_DIRECT_BUS
 586 #endif
 587
 588 /* define the I2C bus number for RTC and DTT if not already done */
 589 #if !defined(CONFIG_SYS_RTC_BUS_NUM)
 590 #define CONFIG_SYS_RTC_BUS_NUM          0
 591 #endif
 592 #if !defined(CONFIG_SYS_SPD_BUS_NUM)
 593 #define CONFIG_SYS_SPD_BUS_NUM          0
 594 #endif
 595
 596 struct i2c_adapter {
 597         void            (*init)(struct i2c_adapter *adap, int speed,
 598                                 int slaveaddr);
 599         int             (*probe)(struct i2c_adapter *adap, uint8_t chip);
 600         int             (*read)(struct i2c_adapter *adap, uint8_t chip,
 601                                 uint addr, int alen, uint8_t *buffer,
 602                                 int len);
 603         int             (*write)(struct i2c_adapter *adap, uint8_t chip,
 604                                 uint addr, int alen, uint8_t *buffer,
 605                                 int len);
 606         uint            (*set_bus_speed)(struct i2c_adapter *adap,
 607                                 uint speed);
 608         int             speed;
 609         int             waitdelay;
 610         int             slaveaddr;
 611         int             init_done;
 612         int             hwadapnr;
 613         char            *name;
 614 };
 615
 616 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
 617                 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
 618         { \
 619                 .init           =       _init, \
 620                 .probe          =       _probe, \
 621                 .read           =       _read, \
 622                 .write          =       _write, \
 623                 .set_bus_speed  =       _set_speed, \
 624                 .speed          =       _speed, \
 625                 .slaveaddr      =       _slaveaddr, \
 626                 .init_done      =       0, \
 627                 .hwadapnr       =       _hwadapnr, \
 628                 .name           =       #_name \
 629 };
 630
 631 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
 632                         _set_speed, _speed, _slaveaddr, _hwadapnr) \
 633         ll_entry_declare(struct i2c_adapter, _name, i2c) = \
 634         U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
 635                  _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
 636
 637 struct i2c_adapter *i2c_get_adapter(int index);
 638
 639 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
 640 struct i2c_mux {
 641         int     id;
 642         char    name[16];
 643 };
 644
 645 struct i2c_next_hop {
 646         struct i2c_mux          mux;
 647         uint8_t         chip;
 648         uint8_t         channel;
 649 };
 650
 651 struct i2c_bus_hose {
 652         int     adapter;
 653         struct i2c_next_hop     next_hop[CONFIG_SYS_I2C_MAX_HOPS];
 654 };
 655 #define I2C_NULL_HOP    {{-1, ""}, 0, 0}
 656 extern struct i2c_bus_hose      i2c_bus[];
 657
 658 #define I2C_ADAPTER(bus)        i2c_bus[bus].adapter
 659 #else
 660 #define I2C_ADAPTER(bus)        bus
 661 #endif
 662 #define I2C_BUS                 gd->cur_i2c_bus
 663
 664 #define I2C_ADAP_NR(bus)        i2c_get_adapter(I2C_ADAPTER(bus))
 665 #define I2C_ADAP                I2C_ADAP_NR(gd->cur_i2c_bus)
 666 #define I2C_ADAP_HWNR           (I2C_ADAP->hwadapnr)
 667
 668 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
 669 #define I2C_MUX_PCA9540_ID      1
 670 #define I2C_MUX_PCA9540         {I2C_MUX_PCA9540_ID, "PCA9540B"}
 671 #define I2C_MUX_PCA9542_ID      2
 672 #define I2C_MUX_PCA9542         {I2C_MUX_PCA9542_ID, "PCA9542A"}
 673 #define I2C_MUX_PCA9544_ID      3
 674 #define I2C_MUX_PCA9544         {I2C_MUX_PCA9544_ID, "PCA9544A"}
 675 #define I2C_MUX_PCA9547_ID      4
 676 #define I2C_MUX_PCA9547         {I2C_MUX_PCA9547_ID, "PCA9547A"}
 677 #define I2C_MUX_PCA9548_ID      5
 678 #define I2C_MUX_PCA9548         {I2C_MUX_PCA9548_ID, "PCA9548"}
 679 #endif
 680
 681 #ifndef I2C_SOFT_DECLARATIONS
 682 # if (defined(CONFIG_AT91RM9200) || \
 683         defined(CONFIG_AT91SAM9260) ||  defined(CONFIG_AT91SAM9261) || \
 684         defined(CONFIG_AT91SAM9263))
 685 #  define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
 686 # else
 687 #  define I2C_SOFT_DECLARATIONS
 688 # endif
 689 #endif
 690
 691 /*
 692  * Many boards/controllers/drivers don't support an I2C slave interface so
 693  * provide a default slave address for them for use in common code.  A real
 694  * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
 695  * support a slave interface.
 696  */
 697 #ifndef CONFIG_SYS_I2C_SLAVE
 698 #define CONFIG_SYS_I2C_SLAVE    0xfe
 699 #endif
 700
 701 /*
 702  * Initialization, must be called once on start up, may be called
 703  * repeatedly to change the speed and slave addresses.
 704  */
 705 #ifdef CONFIG_SYS_I2C_EARLY_INIT
 706 void i2c_early_init_f(void);
 707 #endif
 708 void i2c_init(int speed, int slaveaddr);
 709 void i2c_init_board(void);
 710
 711 #ifdef CONFIG_SYS_I2C
 712 /*
 713  * i2c_get_bus_num:
 714  *
 715  *  Returns index of currently active I2C bus.  Zero-based.
 716  */
 717 unsigned int i2c_get_bus_num(void);
 718
 719 /*
 720  * i2c_set_bus_num:
 721  *
 722  *  Change the active I2C bus.  Subsequent read/write calls will
 723  *  go to this one.
 724  *
 725  *      bus - bus index, zero based
 726  *
 727  *      Returns: 0 on success, not 0 on failure
 728  *
 729  */
 730 int i2c_set_bus_num(unsigned int bus);
 731
 732 /*
 733  * i2c_init_all():
 734  *
 735  * Initializes all I2C adapters in the system. All i2c_adap structures must
 736  * be initialized beforehead with function pointers and data, including
 737  * speed and slaveaddr. Returns 0 on success, non-0 on failure.
 738  */
 739 void i2c_init_all(void);
 740
 741 /*
 742  * Probe the given I2C chip address.  Returns 0 if a chip responded,
 743  * not 0 on failure.
 744  */
 745 int i2c_probe(uint8_t chip);
 746
 747 /*
 748  * Read/Write interface:
 749  *   chip:    I2C chip address, range 0..127
 750  *   addr:    Memory (register) address within the chip
 751  *   alen:    Number of bytes to use for addr (typically 1, 2 for larger
 752  *              memories, 0 for register type devices with only one
 753  *              register)
 754  *   buffer:  Where to read/write the data
 755  *   len:     How many bytes to read/write
 756  *
 757  *   Returns: 0 on success, not 0 on failure
 758  */
 759 int i2c_read(uint8_t chip, unsigned int addr, int alen,
 760                                 uint8_t *buffer, int len);
 761
 762 int i2c_write(uint8_t chip, unsigned int addr, int alen,
 763                                 uint8_t *buffer, int len);
 764
 765 /*
 766  * Utility routines to read/write registers.
 767  */
 768 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
 769
 770 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
 771
 772 /*
 773  * i2c_set_bus_speed:
 774  *
 775  *  Change the speed of the active I2C bus
 776  *
 777  *      speed - bus speed in Hz
 778  *
 779  *      Returns: new bus speed
 780  *
 781  */
 782 unsigned int i2c_set_bus_speed(unsigned int speed);
 783
 784 /*
 785  * i2c_get_bus_speed:
 786  *
 787  *  Returns speed of currently active I2C bus in Hz
 788  */
 789
 790 unsigned int i2c_get_bus_speed(void);
 791
 792 #else
 793
 794 /*
 795  * Probe the given I2C chip address.  Returns 0 if a chip responded,
 796  * not 0 on failure.
 797  */
 798 int i2c_probe(uchar chip);
 799
 800 /*
 801  * Read/Write interface:
 802  *   chip:    I2C chip address, range 0..127
 803  *   addr:    Memory (register) address within the chip
 804  *   alen:    Number of bytes to use for addr (typically 1, 2 for larger
 805  *              memories, 0 for register type devices with only one
 806  *              register)
 807  *   buffer:  Where to read/write the data
 808  *   len:     How many bytes to read/write
 809  *
 810  *   Returns: 0 on success, not 0 on failure
 811  */
 812 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
 813 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
 814
 815 /*
 816  * Utility routines to read/write registers.
 817  */
 818 static inline u8 i2c_reg_read(u8 addr, u8 reg)
 819 {
 820         u8 buf;
 821
 822 #ifdef DEBUG
 823         printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
 824 #endif
 825
 826         i2c_read(addr, reg, 1, &buf, 1);
 827
 828         return buf;
 829 }
 830
 831 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
 832 {
 833 #ifdef DEBUG
 834         printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
 835                __func__, addr, reg, val);
 836 #endif
 837
 838         i2c_write(addr, reg, 1, &val, 1);
 839 }
 840
 841 /*
 842  * Functions for setting the current I2C bus and its speed
 843  */
 844
 845 /*
 846  * i2c_set_bus_num:
 847  *
 848  *  Change the active I2C bus.  Subsequent read/write calls will
 849  *  go to this one.
 850  *
 851  *      bus - bus index, zero based
 852  *
 853  *      Returns: 0 on success, not 0 on failure
 854  *
 855  */
 856 int i2c_set_bus_num(unsigned int bus);
 857
 858 /*
 859  * i2c_get_bus_num:
 860  *
 861  *  Returns index of currently active I2C bus.  Zero-based.
 862  */
 863
 864 unsigned int i2c_get_bus_num(void);
 865
 866 /*
 867  * i2c_set_bus_speed:
 868  *
 869  *  Change the speed of the active I2C bus
 870  *
 871  *      speed - bus speed in Hz
 872  *
 873  *      Returns: 0 on success, not 0 on failure
 874  *
 875  */
 876 int i2c_set_bus_speed(unsigned int);
 877
 878 /*
 879  * i2c_get_bus_speed:
 880  *
 881  *  Returns speed of currently active I2C bus in Hz
 882  */
 883
 884 unsigned int i2c_get_bus_speed(void);
 885 #endif /* CONFIG_SYS_I2C */
 886
 887 /*
 888  * only for backwardcompatibility, should go away if we switched
 889  * completely to new multibus support.
 890  */
 891 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
 892 # if !defined(CONFIG_SYS_MAX_I2C_BUS)
 893 #  define CONFIG_SYS_MAX_I2C_BUS                2
 894 # endif
 895 # define I2C_MULTI_BUS                          1
 896 #else
 897 # define CONFIG_SYS_MAX_I2C_BUS         1
 898 # define I2C_MULTI_BUS                          0
 899 #endif
 900
 901 /* NOTE: These two functions MUST be always_inline to avoid code growth! */
 902 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
 903 static inline unsigned int I2C_GET_BUS(void)
 904 {
 905         return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
 906 }
 907
 908 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
 909 static inline void I2C_SET_BUS(unsigned int bus)
 910 {
 911         if (I2C_MULTI_BUS)
 912                 i2c_set_bus_num(bus);
 913 }
 914
 915 /* Multi I2C definitions */
 916 enum {
 917         I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
 918         I2C_8, I2C_9, I2C_10,
 919 };
 920
 921 /**
 922  * Get FDT values for i2c bus.
 923  *
 924  * @param blob  Device tree blbo
 925  * @return the number of I2C bus
 926  */
 927 void board_i2c_init(const void *blob);
 928
 929 /**
 930  * Find the I2C bus number by given a FDT I2C node.
 931  *
 932  * @param blob  Device tree blbo
 933  * @param node  FDT I2C node to find
 934  * @return the number of I2C bus (zero based), or -1 on error
 935  */
 936 int i2c_get_bus_num_fdt(int node);
 937
 938 /**
 939  * Reset the I2C bus represented by the given a FDT I2C node.
 940  *
 941  * @param blob  Device tree blbo
 942  * @param node  FDT I2C node to find
 943  * @return 0 if port was reset, -1 if not found
 944  */
 945 int i2c_reset_port_fdt(const void *blob, int node);
 946
 947 #endif /* !CONFIG_DM_I2C */
 948
 949 #endif  /* _I2C_H_ */