]> git.ipfire.org Git - people/ms/u-boot.git/blob - include/i2c.h
ARM: zynq: Add MIO detection code
[people/ms/u-boot.git] / include / i2c.h
1 /*
2 * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
3 * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
4 * Changes for multibus/multiadapter I2C support.
5 *
6 * (C) Copyright 2001
7 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 *
11 * The original I2C interface was
12 * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
13 * AIRVENT SAM s.p.a - RIMINI(ITALY)
14 * but has been changed substantially.
15 */
16
17 #ifndef _I2C_H_
18 #define _I2C_H_
19
20 /*
21 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
22 *
23 * The implementation MUST NOT use static or global variables if the
24 * I2C routines are used to read SDRAM configuration information
25 * because this is done before the memories are initialized. Limited
26 * use of stack-based variables are OK (the initial stack size is
27 * limited).
28 *
29 * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
30 */
31
32 /*
33 * Configuration items.
34 */
35 #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
36
37 #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
38 /* no muxes used bus = i2c adapters */
39 #define CONFIG_SYS_I2C_DIRECT_BUS 1
40 #define CONFIG_SYS_I2C_MAX_HOPS 0
41 #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
42 #else
43 /* we use i2c muxes */
44 #undef CONFIG_SYS_I2C_DIRECT_BUS
45 #endif
46
47 /* define the I2C bus number for RTC and DTT if not already done */
48 #if !defined(CONFIG_SYS_RTC_BUS_NUM)
49 #define CONFIG_SYS_RTC_BUS_NUM 0
50 #endif
51 #if !defined(CONFIG_SYS_DTT_BUS_NUM)
52 #define CONFIG_SYS_DTT_BUS_NUM 0
53 #endif
54 #if !defined(CONFIG_SYS_SPD_BUS_NUM)
55 #define CONFIG_SYS_SPD_BUS_NUM 0
56 #endif
57
58 struct i2c_adapter {
59 void (*init)(struct i2c_adapter *adap, int speed,
60 int slaveaddr);
61 int (*probe)(struct i2c_adapter *adap, uint8_t chip);
62 int (*read)(struct i2c_adapter *adap, uint8_t chip,
63 uint addr, int alen, uint8_t *buffer,
64 int len);
65 int (*write)(struct i2c_adapter *adap, uint8_t chip,
66 uint addr, int alen, uint8_t *buffer,
67 int len);
68 uint (*set_bus_speed)(struct i2c_adapter *adap,
69 uint speed);
70 int speed;
71 int waitdelay;
72 int slaveaddr;
73 int init_done;
74 int hwadapnr;
75 char *name;
76 };
77
78 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
79 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
80 { \
81 .init = _init, \
82 .probe = _probe, \
83 .read = _read, \
84 .write = _write, \
85 .set_bus_speed = _set_speed, \
86 .speed = _speed, \
87 .slaveaddr = _slaveaddr, \
88 .init_done = 0, \
89 .hwadapnr = _hwadapnr, \
90 .name = #_name \
91 };
92
93 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
94 _set_speed, _speed, _slaveaddr, _hwadapnr) \
95 ll_entry_declare(struct i2c_adapter, _name, i2c) = \
96 U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
97 _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
98
99 struct i2c_adapter *i2c_get_adapter(int index);
100
101 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
102 struct i2c_mux {
103 int id;
104 char name[16];
105 };
106
107 struct i2c_next_hop {
108 struct i2c_mux mux;
109 uint8_t chip;
110 uint8_t channel;
111 };
112
113 struct i2c_bus_hose {
114 int adapter;
115 struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS];
116 };
117 #define I2C_NULL_HOP {{-1, ""}, 0, 0}
118 extern struct i2c_bus_hose i2c_bus[];
119
120 #define I2C_ADAPTER(bus) i2c_bus[bus].adapter
121 #else
122 #define I2C_ADAPTER(bus) bus
123 #endif
124 #define I2C_BUS gd->cur_i2c_bus
125
126 #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
127 #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
128 #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
129
130 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
131 #define I2C_MUX_PCA9540_ID 1
132 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
133 #define I2C_MUX_PCA9542_ID 2
134 #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
135 #define I2C_MUX_PCA9544_ID 3
136 #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
137 #define I2C_MUX_PCA9547_ID 4
138 #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
139 #define I2C_MUX_PCA9548_ID 5
140 #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
141 #endif
142
143 #ifndef I2C_SOFT_DECLARATIONS
144 # if defined(CONFIG_MPC8260)
145 # define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT);
146 # elif defined(CONFIG_8xx)
147 # define I2C_SOFT_DECLARATIONS volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
148
149 # elif (defined(CONFIG_AT91RM9200) || \
150 defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
151 defined(CONFIG_AT91SAM9263))
152 # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
153 # else
154 # define I2C_SOFT_DECLARATIONS
155 # endif
156 #endif
157
158 #ifdef CONFIG_8xx
159 /* Set default value for the I2C bus speed on 8xx. In the
160 * future, we'll define these in all 8xx board config files.
161 */
162 #ifndef CONFIG_SYS_I2C_SPEED
163 #define CONFIG_SYS_I2C_SPEED 50000
164 #endif
165 #endif
166
167 /*
168 * Many boards/controllers/drivers don't support an I2C slave interface so
169 * provide a default slave address for them for use in common code. A real
170 * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
171 * support a slave interface.
172 */
173 #ifndef CONFIG_SYS_I2C_SLAVE
174 #define CONFIG_SYS_I2C_SLAVE 0xfe
175 #endif
176
177 /*
178 * Initialization, must be called once on start up, may be called
179 * repeatedly to change the speed and slave addresses.
180 */
181 void i2c_init(int speed, int slaveaddr);
182 void i2c_init_board(void);
183 #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT
184 void i2c_board_late_init(void);
185 #endif
186
187 #ifdef CONFIG_SYS_I2C
188 /*
189 * i2c_get_bus_num:
190 *
191 * Returns index of currently active I2C bus. Zero-based.
192 */
193 unsigned int i2c_get_bus_num(void);
194
195 /*
196 * i2c_set_bus_num:
197 *
198 * Change the active I2C bus. Subsequent read/write calls will
199 * go to this one.
200 *
201 * bus - bus index, zero based
202 *
203 * Returns: 0 on success, not 0 on failure
204 *
205 */
206 int i2c_set_bus_num(unsigned int bus);
207
208 /*
209 * i2c_init_all():
210 *
211 * Initializes all I2C adapters in the system. All i2c_adap structures must
212 * be initialized beforehead with function pointers and data, including
213 * speed and slaveaddr. Returns 0 on success, non-0 on failure.
214 */
215 void i2c_init_all(void);
216
217 /*
218 * Probe the given I2C chip address. Returns 0 if a chip responded,
219 * not 0 on failure.
220 */
221 int i2c_probe(uint8_t chip);
222
223 /*
224 * Read/Write interface:
225 * chip: I2C chip address, range 0..127
226 * addr: Memory (register) address within the chip
227 * alen: Number of bytes to use for addr (typically 1, 2 for larger
228 * memories, 0 for register type devices with only one
229 * register)
230 * buffer: Where to read/write the data
231 * len: How many bytes to read/write
232 *
233 * Returns: 0 on success, not 0 on failure
234 */
235 int i2c_read(uint8_t chip, unsigned int addr, int alen,
236 uint8_t *buffer, int len);
237
238 int i2c_write(uint8_t chip, unsigned int addr, int alen,
239 uint8_t *buffer, int len);
240
241 /*
242 * Utility routines to read/write registers.
243 */
244 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
245
246 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
247
248 /*
249 * i2c_set_bus_speed:
250 *
251 * Change the speed of the active I2C bus
252 *
253 * speed - bus speed in Hz
254 *
255 * Returns: new bus speed
256 *
257 */
258 unsigned int i2c_set_bus_speed(unsigned int speed);
259
260 /*
261 * i2c_get_bus_speed:
262 *
263 * Returns speed of currently active I2C bus in Hz
264 */
265
266 unsigned int i2c_get_bus_speed(void);
267
268 /*
269 * i2c_reloc_fixup:
270 *
271 * Adjusts I2C pointers after U-Boot is relocated to DRAM
272 */
273 void i2c_reloc_fixup(void);
274 #if defined(CONFIG_SYS_I2C_SOFT)
275 void i2c_soft_init(void);
276 void i2c_soft_active(void);
277 void i2c_soft_tristate(void);
278 int i2c_soft_read(void);
279 void i2c_soft_sda(int bit);
280 void i2c_soft_scl(int bit);
281 void i2c_soft_delay(void);
282 #endif
283 #else
284
285 /*
286 * Probe the given I2C chip address. Returns 0 if a chip responded,
287 * not 0 on failure.
288 */
289 int i2c_probe(uchar chip);
290
291 /*
292 * Read/Write interface:
293 * chip: I2C chip address, range 0..127
294 * addr: Memory (register) address within the chip
295 * alen: Number of bytes to use for addr (typically 1, 2 for larger
296 * memories, 0 for register type devices with only one
297 * register)
298 * buffer: Where to read/write the data
299 * len: How many bytes to read/write
300 *
301 * Returns: 0 on success, not 0 on failure
302 */
303 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
304 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
305
306 /*
307 * Utility routines to read/write registers.
308 */
309 static inline u8 i2c_reg_read(u8 addr, u8 reg)
310 {
311 u8 buf;
312
313 #ifdef CONFIG_8xx
314 /* MPC8xx needs this. Maybe one day we can get rid of it. */
315 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
316 #endif
317
318 #ifdef DEBUG
319 printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
320 #endif
321
322 i2c_read(addr, reg, 1, &buf, 1);
323
324 return buf;
325 }
326
327 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
328 {
329 #ifdef CONFIG_8xx
330 /* MPC8xx needs this. Maybe one day we can get rid of it. */
331 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
332 #endif
333
334 #ifdef DEBUG
335 printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
336 __func__, addr, reg, val);
337 #endif
338
339 i2c_write(addr, reg, 1, &val, 1);
340 }
341
342 /*
343 * Functions for setting the current I2C bus and its speed
344 */
345
346 /*
347 * i2c_set_bus_num:
348 *
349 * Change the active I2C bus. Subsequent read/write calls will
350 * go to this one.
351 *
352 * bus - bus index, zero based
353 *
354 * Returns: 0 on success, not 0 on failure
355 *
356 */
357 int i2c_set_bus_num(unsigned int bus);
358
359 /*
360 * i2c_get_bus_num:
361 *
362 * Returns index of currently active I2C bus. Zero-based.
363 */
364
365 unsigned int i2c_get_bus_num(void);
366
367 /*
368 * i2c_set_bus_speed:
369 *
370 * Change the speed of the active I2C bus
371 *
372 * speed - bus speed in Hz
373 *
374 * Returns: 0 on success, not 0 on failure
375 *
376 */
377 int i2c_set_bus_speed(unsigned int);
378
379 /*
380 * i2c_get_bus_speed:
381 *
382 * Returns speed of currently active I2C bus in Hz
383 */
384
385 unsigned int i2c_get_bus_speed(void);
386 #endif /* CONFIG_SYS_I2C */
387
388 /*
389 * only for backwardcompatibility, should go away if we switched
390 * completely to new multibus support.
391 */
392 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
393 # if !defined(CONFIG_SYS_MAX_I2C_BUS)
394 # define CONFIG_SYS_MAX_I2C_BUS 2
395 # endif
396 # define I2C_MULTI_BUS 1
397 #else
398 # define CONFIG_SYS_MAX_I2C_BUS 1
399 # define I2C_MULTI_BUS 0
400 #endif
401
402 /* NOTE: These two functions MUST be always_inline to avoid code growth! */
403 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
404 static inline unsigned int I2C_GET_BUS(void)
405 {
406 return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
407 }
408
409 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
410 static inline void I2C_SET_BUS(unsigned int bus)
411 {
412 if (I2C_MULTI_BUS)
413 i2c_set_bus_num(bus);
414 }
415
416 /* Multi I2C definitions */
417 enum {
418 I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
419 I2C_8, I2C_9, I2C_10,
420 };
421
422 /* Multi I2C busses handling */
423 #ifdef CONFIG_SOFT_I2C_MULTI_BUS
424 extern int get_multi_scl_pin(void);
425 extern int get_multi_sda_pin(void);
426 extern int multi_i2c_init(void);
427 #endif
428
429 /**
430 * Get FDT values for i2c bus.
431 *
432 * @param blob Device tree blbo
433 * @return the number of I2C bus
434 */
435 void board_i2c_init(const void *blob);
436
437 /**
438 * Find the I2C bus number by given a FDT I2C node.
439 *
440 * @param blob Device tree blbo
441 * @param node FDT I2C node to find
442 * @return the number of I2C bus (zero based), or -1 on error
443 */
444 int i2c_get_bus_num_fdt(int node);
445
446 /**
447 * Reset the I2C bus represented by the given a FDT I2C node.
448 *
449 * @param blob Device tree blbo
450 * @param node FDT I2C node to find
451 * @return 0 if port was reset, -1 if not found
452 */
453 int i2c_reset_port_fdt(const void *blob, int node);
454 #endif /* _I2C_H_ */