include/lcd.h

   1 /*
   2  * MPC823 and PXA LCD Controller
   3  *
   4  * Modeled after video interface by Paolo Scaffardi
   5  *
   6  *
   7  * (C) Copyright 2001
   8  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   9  *
  10  * See file CREDITS for list of people who contributed to this
  11  * project.
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License as
  15  * published by the Free Software Foundation; either version 2 of
  16  * the License, or (at your option) any later version.
  17  *
  18  * This program is distributed in the hope that it will be useful,
  19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  * GNU General Public License for more details.
  22  *
  23  * You should have received a copy of the GNU General Public License
  24  * along with this program; if not, write to the Free Software
  25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26  * MA 02111-1307 USA
  27  */
  28
  29 #ifndef _LCD_H_
  30 #define _LCD_H_
  31
  32 extern char lcd_is_enabled;
  33
  34 extern int lcd_line_length;
  35 extern int lcd_color_fg;
  36 extern int lcd_color_bg;
  37
  38 /*
  39  * Frame buffer memory information
  40  */
  41 extern void *lcd_base;          /* Start of framebuffer memory  */
  42 extern void *lcd_console_address;       /* Start of console buffer      */
  43
  44 extern short console_col;
  45 extern short console_row;
  46 extern struct vidinfo panel_info;
  47
  48 extern void lcd_ctrl_init (void *lcdbase);
  49 extern void lcd_enable (void);
  50
  51 /* setcolreg used in 8bpp/16bpp; initcolregs used in monochrome */
  52 extern void lcd_setcolreg (ushort regno,
  53                                 ushort red, ushort green, ushort blue);
  54 extern void lcd_initcolregs (void);
  55
  56 /* gunzip_bmp used if CONFIG_VIDEO_BMP_GZIP */
  57 extern struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp);
  58
  59 #if defined CONFIG_MPC823
  60 /*
  61  * LCD controller stucture for MPC823 CPU
  62  */
  63 typedef struct vidinfo {
  64         ushort  vl_col;         /* Number of columns (i.e. 640) */
  65         ushort  vl_row;         /* Number of rows (i.e. 480) */
  66         ushort  vl_width;       /* Width of display area in millimeters */
  67         ushort  vl_height;      /* Height of display area in millimeters */
  68
  69         /* LCD configuration register */
  70         u_char  vl_clkp;        /* Clock polarity */
  71         u_char  vl_oep;         /* Output Enable polarity */
  72         u_char  vl_hsp;         /* Horizontal Sync polarity */
  73         u_char  vl_vsp;         /* Vertical Sync polarity */
  74         u_char  vl_dp;          /* Data polarity */
  75         u_char  vl_bpix;        /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8 */
  76         u_char  vl_lbw;         /* LCD Bus width, 0 = 4, 1 = 8 */
  77         u_char  vl_splt;        /* Split display, 0 = single-scan, 1 = dual-scan */
  78         u_char  vl_clor;        /* Color, 0 = mono, 1 = color */
  79         u_char  vl_tft;         /* 0 = passive, 1 = TFT */
  80
  81         /* Horizontal control register. Timing from data sheet */
  82         ushort  vl_wbl;         /* Wait between lines */
  83
  84         /* Vertical control register */
  85         u_char  vl_vpw;         /* Vertical sync pulse width */
  86         u_char  vl_lcdac;       /* LCD AC timing */
  87         u_char  vl_wbf;         /* Wait between frames */
  88 } vidinfo_t;
  89
  90 #elif defined(CONFIG_CPU_PXA25X) || defined(CONFIG_CPU_PXA27X) || \
  91         defined CONFIG_CPU_MONAHANS
  92 /*
  93  * PXA LCD DMA descriptor
  94  */
  95 struct pxafb_dma_descriptor {
  96         u_long  fdadr;          /* Frame descriptor address register */
  97         u_long  fsadr;          /* Frame source address register */
  98         u_long  fidr;           /* Frame ID register */
  99         u_long  ldcmd;          /* Command register */
 100 };
 101
 102 /*
 103  * PXA LCD info
 104  */
 105 struct pxafb_info {
 106
 107         /* Misc registers */
 108         u_long  reg_lccr3;
 109         u_long  reg_lccr2;
 110         u_long  reg_lccr1;
 111         u_long  reg_lccr0;
 112         u_long  fdadr0;
 113         u_long  fdadr1;
 114
 115         /* DMA descriptors */
 116         struct  pxafb_dma_descriptor *  dmadesc_fblow;
 117         struct  pxafb_dma_descriptor *  dmadesc_fbhigh;
 118         struct  pxafb_dma_descriptor *  dmadesc_palette;
 119
 120         u_long  screen;         /* physical address of frame buffer */
 121         u_long  palette;        /* physical address of palette memory */
 122         u_int   palette_size;
 123 };
 124
 125 /*
 126  * LCD controller stucture for PXA CPU
 127  */
 128 typedef struct vidinfo {
 129         ushort  vl_col;         /* Number of columns (i.e. 640) */
 130         ushort  vl_row;         /* Number of rows (i.e. 480) */
 131         ushort  vl_width;       /* Width of display area in millimeters */
 132         ushort  vl_height;      /* Height of display area in millimeters */
 133
 134         /* LCD configuration register */
 135         u_char  vl_clkp;        /* Clock polarity */
 136         u_char  vl_oep;         /* Output Enable polarity */
 137         u_char  vl_hsp;         /* Horizontal Sync polarity */
 138         u_char  vl_vsp;         /* Vertical Sync polarity */
 139         u_char  vl_dp;          /* Data polarity */
 140         u_char  vl_bpix;        /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
 141         u_char  vl_lbw;         /* LCD Bus width, 0 = 4, 1 = 8 */
 142         u_char  vl_splt;        /* Split display, 0 = single-scan, 1 = dual-scan */
 143         u_char  vl_clor;        /* Color, 0 = mono, 1 = color */
 144         u_char  vl_tft;         /* 0 = passive, 1 = TFT */
 145
 146         /* Horizontal control register. Timing from data sheet */
 147         ushort  vl_hpw;         /* Horz sync pulse width */
 148         u_char  vl_blw;         /* Wait before of line */
 149         u_char  vl_elw;         /* Wait end of line */
 150
 151         /* Vertical control register. */
 152         u_char  vl_vpw;         /* Vertical sync pulse width */
 153         u_char  vl_bfw;         /* Wait before of frame */
 154         u_char  vl_efw;         /* Wait end of frame */
 155
 156         /* PXA LCD controller params */
 157         struct  pxafb_info pxa;
 158 } vidinfo_t;
 159
 160 #elif defined(CONFIG_ATMEL_LCD)
 161
 162 typedef struct vidinfo {
 163         ushort vl_col;          /* Number of columns (i.e. 640) */
 164         ushort vl_row;          /* Number of rows (i.e. 480) */
 165         u_long vl_clk;  /* pixel clock in ps    */
 166
 167         /* LCD configuration register */
 168         u_long vl_sync;         /* Horizontal / vertical sync */
 169         u_long vl_bpix;         /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
 170         u_long vl_tft;          /* 0 = passive, 1 = TFT */
 171         u_long vl_cont_pol_low; /* contrast polarity is low */
 172
 173         /* Horizontal control register. */
 174         u_long vl_hsync_len;    /* Length of horizontal sync */
 175         u_long vl_left_margin;  /* Time from sync to picture */
 176         u_long vl_right_margin; /* Time from picture to sync */
 177
 178         /* Vertical control register. */
 179         u_long vl_vsync_len;    /* Length of vertical sync */
 180         u_long vl_upper_margin; /* Time from sync to picture */
 181         u_long vl_lower_margin; /* Time from picture to sync */
 182
 183         u_long  mmio;           /* Memory mapped registers */
 184 } vidinfo_t;
 185
 186 #elif defined(CONFIG_EXYNOS_FB)
 187
 188 enum {
 189         FIMD_RGB_INTERFACE = 1,
 190         FIMD_CPU_INTERFACE = 2,
 191 };
 192
 193 typedef struct vidinfo {
 194         ushort vl_col;          /* Number of columns (i.e. 640) */
 195         ushort vl_row;          /* Number of rows (i.e. 480) */
 196         ushort vl_width;        /* Width of display area in millimeters */
 197         ushort vl_height;       /* Height of display area in millimeters */
 198
 199         /* LCD configuration register */
 200         u_char vl_freq;         /* Frequency */
 201         u_char vl_clkp;         /* Clock polarity */
 202         u_char vl_oep;          /* Output Enable polarity */
 203         u_char vl_hsp;          /* Horizontal Sync polarity */
 204         u_char vl_vsp;          /* Vertical Sync polarity */
 205         u_char vl_dp;           /* Data polarity */
 206         u_char vl_bpix;         /* Bits per pixel */
 207
 208         /* Horizontal control register. Timing from data sheet */
 209         u_char vl_hspw;         /* Horz sync pulse width */
 210         u_char vl_hfpd;         /* Wait before of line */
 211         u_char vl_hbpd;         /* Wait end of line */
 212
 213         /* Vertical control register. */
 214         u_char  vl_vspw;        /* Vertical sync pulse width */
 215         u_char  vl_vfpd;        /* Wait before of frame */
 216         u_char  vl_vbpd;        /* Wait end of frame */
 217         u_char  vl_cmd_allow_len; /* Wait end of frame */
 218
 219         void (*cfg_gpio)(void);
 220         void (*backlight_on)(unsigned int onoff);
 221         void (*reset_lcd)(void);
 222         void (*lcd_power_on)(void);
 223         void (*cfg_ldo)(void);
 224         void (*enable_ldo)(unsigned int onoff);
 225         void (*mipi_power)(void);
 226         void (*backlight_reset)(void);
 227
 228         unsigned int win_id;
 229         unsigned int init_delay;
 230         unsigned int power_on_delay;
 231         unsigned int reset_delay;
 232         unsigned int interface_mode;
 233         unsigned int mipi_enabled;
 234         unsigned int cs_setup;
 235         unsigned int wr_setup;
 236         unsigned int wr_act;
 237         unsigned int wr_hold;
 238
 239         /* parent clock name(MPLL, EPLL or VPLL) */
 240         unsigned int pclk_name;
 241         /* ratio value for source clock from parent clock. */
 242         unsigned int sclk_div;
 243
 244         unsigned int dual_lcd_enabled;
 245
 246 } vidinfo_t;
 247
 248 void init_panel_info(vidinfo_t *vid);
 249
 250 #else
 251
 252 typedef struct vidinfo {
 253         ushort  vl_col;         /* Number of columns (i.e. 160) */
 254         ushort  vl_row;         /* Number of rows (i.e. 100) */
 255
 256         u_char  vl_bpix;        /* Bits per pixel, 0 = 1 */
 257
 258         ushort  *cmap;          /* Pointer to the colormap */
 259
 260         void    *priv;          /* Pointer to driver-specific data */
 261 } vidinfo_t;
 262
 263 #endif /* CONFIG_MPC823, CONFIG_CPU_PXA25X, CONFIG_MCC200, CONFIG_ATMEL_LCD */
 264
 265 extern vidinfo_t panel_info;
 266
 267 /* Video functions */
 268
 269 #if defined(CONFIG_RBC823)
 270 void    lcd_disable     (void);
 271 #endif
 272
 273
 274 /* int  lcd_init        (void *lcdbase); */
 275 void    lcd_putc        (const char c);
 276 void    lcd_puts        (const char *s);
 277 void    lcd_printf      (const char *fmt, ...);
 278 void    lcd_clear(void);
 279 int     lcd_display_bitmap(ulong bmp_image, int x, int y);
 280
 281 /* Allow boards to customize the information displayed */
 282 void lcd_show_board_info(void);
 283
 284 /************************************************************************/
 285 /* ** BITMAP DISPLAY SUPPORT                                            */
 286 /************************************************************************/
 287 #if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
 288 # include <bmp_layout.h>
 289 # include <asm/byteorder.h>
 290 #endif
 291
 292 /*
 293  *  Information about displays we are using. This is for configuring
 294  *  the LCD controller and memory allocation. Someone has to know what
 295  *  is connected, as we can't autodetect anything.
 296  */
 297 #define CONFIG_SYS_HIGH 0       /* Pins are active high                 */
 298 #define CONFIG_SYS_LOW          1       /* Pins are active low                  */
 299
 300 #define LCD_MONOCHROME  0
 301 #define LCD_COLOR2      1
 302 #define LCD_COLOR4      2
 303 #define LCD_COLOR8      3
 304 #define LCD_COLOR16     4
 305
 306 /*----------------------------------------------------------------------*/
 307 #if defined(CONFIG_LCD_INFO_BELOW_LOGO)
 308 # define LCD_INFO_X             0
 309 # define LCD_INFO_Y             (BMP_LOGO_HEIGHT + VIDEO_FONT_HEIGHT)
 310 #elif defined(CONFIG_LCD_LOGO)
 311 # define LCD_INFO_X             (BMP_LOGO_WIDTH + 4 * VIDEO_FONT_WIDTH)
 312 # define LCD_INFO_Y             (VIDEO_FONT_HEIGHT)
 313 #else
 314 # define LCD_INFO_X             (VIDEO_FONT_WIDTH)
 315 # define LCD_INFO_Y             (VIDEO_FONT_HEIGHT)
 316 #endif
 317
 318 /* Default to 8bpp if bit depth not specified */
 319 #ifndef LCD_BPP
 320 # define LCD_BPP                        LCD_COLOR8
 321 #endif
 322 #ifndef LCD_DF
 323 # define LCD_DF                 1
 324 #endif
 325
 326 /* Calculate nr. of bits per pixel  and nr. of colors */
 327 #define NBITS(bit_code)         (1 << (bit_code))
 328 #define NCOLORS(bit_code)       (1 << NBITS(bit_code))
 329
 330 /************************************************************************/
 331 /* ** CONSOLE CONSTANTS                                                 */
 332 /************************************************************************/
 333 #if LCD_BPP == LCD_MONOCHROME
 334
 335 /*
 336  * Simple black/white definitions
 337  */
 338 # define CONSOLE_COLOR_BLACK    0
 339 # define CONSOLE_COLOR_WHITE    1       /* Must remain last / highest   */
 340
 341 #elif LCD_BPP == LCD_COLOR8
 342
 343 /*
 344  * 8bpp color definitions
 345  */
 346 # define CONSOLE_COLOR_BLACK    0
 347 # define CONSOLE_COLOR_RED      1
 348 # define CONSOLE_COLOR_GREEN    2
 349 # define CONSOLE_COLOR_YELLOW   3
 350 # define CONSOLE_COLOR_BLUE     4
 351 # define CONSOLE_COLOR_MAGENTA  5
 352 # define CONSOLE_COLOR_CYAN     6
 353 # define CONSOLE_COLOR_GREY     14
 354 # define CONSOLE_COLOR_WHITE    15      /* Must remain last / highest   */
 355
 356 #else
 357
 358 /*
 359  * 16bpp color definitions
 360  */
 361 # define CONSOLE_COLOR_BLACK    0x0000
 362 # define CONSOLE_COLOR_WHITE    0xffff  /* Must remain last / highest   */
 363
 364 #endif /* color definitions */
 365
 366 /************************************************************************/
 367 #ifndef PAGE_SIZE
 368 # define PAGE_SIZE      4096
 369 #endif
 370
 371 /************************************************************************/
 372 /* ** CONSOLE DEFINITIONS & FUNCTIONS                                   */
 373 /************************************************************************/
 374 #if defined(CONFIG_LCD_LOGO) && !defined(CONFIG_LCD_INFO_BELOW_LOGO)
 375 # define CONSOLE_ROWS           ((panel_info.vl_row-BMP_LOGO_HEIGHT) \
 376                                         / VIDEO_FONT_HEIGHT)
 377 #else
 378 # define CONSOLE_ROWS           (panel_info.vl_row / VIDEO_FONT_HEIGHT)
 379 #endif
 380
 381 #define CONSOLE_COLS            (panel_info.vl_col / VIDEO_FONT_WIDTH)
 382 #define CONSOLE_ROW_SIZE        (VIDEO_FONT_HEIGHT * lcd_line_length)
 383 #define CONSOLE_ROW_FIRST       (lcd_console_address)
 384 #define CONSOLE_ROW_SECOND      (lcd_console_address + CONSOLE_ROW_SIZE)
 385 #define CONSOLE_ROW_LAST        (lcd_console_address + CONSOLE_SIZE \
 386                                         - CONSOLE_ROW_SIZE)
 387 #define CONSOLE_SIZE            (CONSOLE_ROW_SIZE * CONSOLE_ROWS)
 388 #define CONSOLE_SCROLL_SIZE     (CONSOLE_SIZE - CONSOLE_ROW_SIZE)
 389
 390 #if LCD_BPP == LCD_MONOCHROME
 391 # define COLOR_MASK(c)          ((c)      | (c) << 1 | (c) << 2 | (c) << 3 | \
 392                                  (c) << 4 | (c) << 5 | (c) << 6 | (c) << 7)
 393 #elif (LCD_BPP == LCD_COLOR8) || (LCD_BPP == LCD_COLOR16)
 394 # define COLOR_MASK(c)          (c)
 395 #else
 396 # error Unsupported LCD BPP.
 397 #endif
 398
 399 /************************************************************************/
 400
 401 #endif  /* _LCD_H_ */