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git.ipfire.org Git - thirdparty/u-boot.git/blob - include/lcd.h
2 * MPC823 and PXA LCD Controller
4 * Modeled after video interface by Paolo Scaffardi
8 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
10 * SPDX-License-Identifier: GPL-2.0+
16 extern char lcd_is_enabled
;
18 extern int lcd_line_length
;
20 extern struct vidinfo panel_info
;
22 void lcd_ctrl_init(void *lcdbase
);
23 void lcd_enable(void);
25 /* setcolreg used in 8bpp/16bpp; initcolregs used in monochrome */
26 void lcd_setcolreg(ushort regno
, ushort red
, ushort green
, ushort blue
);
27 void lcd_initcolregs(void);
29 int lcd_getfgcolor(void);
31 /* gunzip_bmp used if CONFIG_VIDEO_BMP_GZIP */
32 struct bmp_image
*gunzip_bmp(unsigned long addr
, unsigned long *lenp
,
34 int bmp_display(ulong addr
, int x
, int y
);
37 * Set whether we need to flush the dcache when changing the LCD image. This
40 * @param flush non-zero to flush cache after update, 0 to skip
42 void lcd_set_flush_dcache(int flush
);
44 #if defined CONFIG_MPC823
46 * LCD controller stucture for MPC823 CPU
48 typedef struct vidinfo
{
49 ushort vl_col
; /* Number of columns (i.e. 640) */
50 ushort vl_row
; /* Number of rows (i.e. 480) */
51 ushort vl_width
; /* Width of display area in millimeters */
52 ushort vl_height
; /* Height of display area in millimeters */
54 /* LCD configuration register */
55 u_char vl_clkp
; /* Clock polarity */
56 u_char vl_oep
; /* Output Enable polarity */
57 u_char vl_hsp
; /* Horizontal Sync polarity */
58 u_char vl_vsp
; /* Vertical Sync polarity */
59 u_char vl_dp
; /* Data polarity */
60 u_char vl_bpix
; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8 */
61 u_char vl_lbw
; /* LCD Bus width, 0 = 4, 1 = 8 */
62 u_char vl_splt
; /* Split display, 0 = single-scan, 1 = dual-scan */
63 u_char vl_clor
; /* Color, 0 = mono, 1 = color */
64 u_char vl_tft
; /* 0 = passive, 1 = TFT */
66 /* Horizontal control register. Timing from data sheet */
67 ushort vl_wbl
; /* Wait between lines */
69 /* Vertical control register */
70 u_char vl_vpw
; /* Vertical sync pulse width */
71 u_char vl_lcdac
; /* LCD AC timing */
72 u_char vl_wbf
; /* Wait between frames */
75 #elif defined(CONFIG_CPU_PXA25X) || defined(CONFIG_CPU_PXA27X) || \
76 defined CONFIG_CPU_MONAHANS
78 * PXA LCD DMA descriptor
80 struct pxafb_dma_descriptor
{
81 u_long fdadr
; /* Frame descriptor address register */
82 u_long fsadr
; /* Frame source address register */
83 u_long fidr
; /* Frame ID register */
84 u_long ldcmd
; /* Command register */
100 /* DMA descriptors */
101 struct pxafb_dma_descriptor
* dmadesc_fblow
;
102 struct pxafb_dma_descriptor
* dmadesc_fbhigh
;
103 struct pxafb_dma_descriptor
* dmadesc_palette
;
105 u_long screen
; /* physical address of frame buffer */
106 u_long palette
; /* physical address of palette memory */
111 * LCD controller stucture for PXA CPU
113 typedef struct vidinfo
{
114 ushort vl_col
; /* Number of columns (i.e. 640) */
115 ushort vl_row
; /* Number of rows (i.e. 480) */
116 ushort vl_width
; /* Width of display area in millimeters */
117 ushort vl_height
; /* Height of display area in millimeters */
119 /* LCD configuration register */
120 u_char vl_clkp
; /* Clock polarity */
121 u_char vl_oep
; /* Output Enable polarity */
122 u_char vl_hsp
; /* Horizontal Sync polarity */
123 u_char vl_vsp
; /* Vertical Sync polarity */
124 u_char vl_dp
; /* Data polarity */
125 u_char vl_bpix
; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
126 u_char vl_lbw
; /* LCD Bus width, 0 = 4, 1 = 8 */
127 u_char vl_splt
; /* Split display, 0 = single-scan, 1 = dual-scan */
128 u_char vl_clor
; /* Color, 0 = mono, 1 = color */
129 u_char vl_tft
; /* 0 = passive, 1 = TFT */
131 /* Horizontal control register. Timing from data sheet */
132 ushort vl_hpw
; /* Horz sync pulse width */
133 u_char vl_blw
; /* Wait before of line */
134 u_char vl_elw
; /* Wait end of line */
136 /* Vertical control register. */
137 u_char vl_vpw
; /* Vertical sync pulse width */
138 u_char vl_bfw
; /* Wait before of frame */
139 u_char vl_efw
; /* Wait end of frame */
141 /* PXA LCD controller params */
142 struct pxafb_info pxa
;
145 #elif defined(CONFIG_ATMEL_LCD) || defined(CONFIG_ATMEL_HLCD)
147 typedef struct vidinfo
{
148 ushort vl_col
; /* Number of columns (i.e. 640) */
149 ushort vl_row
; /* Number of rows (i.e. 480) */
150 u_long vl_clk
; /* pixel clock in ps */
152 /* LCD configuration register */
153 u_long vl_sync
; /* Horizontal / vertical sync */
154 u_long vl_bpix
; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
155 u_long vl_tft
; /* 0 = passive, 1 = TFT */
156 u_long vl_cont_pol_low
; /* contrast polarity is low */
157 u_long vl_clk_pol
; /* clock polarity */
159 /* Horizontal control register. */
160 u_long vl_hsync_len
; /* Length of horizontal sync */
161 u_long vl_left_margin
; /* Time from sync to picture */
162 u_long vl_right_margin
; /* Time from picture to sync */
164 /* Vertical control register. */
165 u_long vl_vsync_len
; /* Length of vertical sync */
166 u_long vl_upper_margin
; /* Time from sync to picture */
167 u_long vl_lower_margin
; /* Time from picture to sync */
169 u_long mmio
; /* Memory mapped registers */
172 #elif defined(CONFIG_EXYNOS_FB)
175 FIMD_RGB_INTERFACE
= 1,
176 FIMD_CPU_INTERFACE
= 2,
179 enum exynos_fb_rgb_mode_t
{
186 typedef struct vidinfo
{
187 ushort vl_col
; /* Number of columns (i.e. 640) */
188 ushort vl_row
; /* Number of rows (i.e. 480) */
189 ushort vl_width
; /* Width of display area in millimeters */
190 ushort vl_height
; /* Height of display area in millimeters */
192 /* LCD configuration register */
193 u_char vl_freq
; /* Frequency */
194 u_char vl_clkp
; /* Clock polarity */
195 u_char vl_oep
; /* Output Enable polarity */
196 u_char vl_hsp
; /* Horizontal Sync polarity */
197 u_char vl_vsp
; /* Vertical Sync polarity */
198 u_char vl_dp
; /* Data polarity */
199 u_char vl_bpix
; /* Bits per pixel */
201 /* Horizontal control register. Timing from data sheet */
202 u_char vl_hspw
; /* Horz sync pulse width */
203 u_char vl_hfpd
; /* Wait before of line */
204 u_char vl_hbpd
; /* Wait end of line */
206 /* Vertical control register. */
207 u_char vl_vspw
; /* Vertical sync pulse width */
208 u_char vl_vfpd
; /* Wait before of frame */
209 u_char vl_vbpd
; /* Wait end of frame */
210 u_char vl_cmd_allow_len
; /* Wait end of frame */
213 unsigned int init_delay
;
214 unsigned int power_on_delay
;
215 unsigned int reset_delay
;
216 unsigned int interface_mode
;
217 unsigned int mipi_enabled
;
218 unsigned int dp_enabled
;
219 unsigned int cs_setup
;
220 unsigned int wr_setup
;
222 unsigned int wr_hold
;
223 unsigned int logo_on
;
224 unsigned int logo_width
;
225 unsigned int logo_height
;
228 unsigned long logo_addr
;
229 unsigned int rgb_mode
;
230 unsigned int resolution
;
232 /* parent clock name(MPLL, EPLL or VPLL) */
233 unsigned int pclk_name
;
234 /* ratio value for source clock from parent clock. */
235 unsigned int sclk_div
;
237 unsigned int dual_lcd_enabled
;
240 void init_panel_info(vidinfo_t
*vid
);
244 typedef struct vidinfo
{
245 ushort vl_col
; /* Number of columns (i.e. 160) */
246 ushort vl_row
; /* Number of rows (i.e. 100) */
248 u_char vl_bpix
; /* Bits per pixel, 0 = 1 */
250 ushort
*cmap
; /* Pointer to the colormap */
252 void *priv
; /* Pointer to driver-specific data */
255 #endif /* CONFIG_MPC823, CONFIG_CPU_PXA25X, CONFIG_MCC200, CONFIG_ATMEL_LCD */
257 extern vidinfo_t panel_info
;
259 /* Video functions */
261 void lcd_putc(const char c
);
262 void lcd_puts(const char *s
);
263 void lcd_printf(const char *fmt
, ...);
264 void lcd_clear(void);
265 int lcd_display_bitmap(ulong bmp_image
, int x
, int y
);
268 * Get the width of the LCD in pixels
270 * @return width of LCD in pixels
272 int lcd_get_pixel_width(void);
275 * Get the height of the LCD in pixels
277 * @return height of LCD in pixels
279 int lcd_get_pixel_height(void);
282 * Get the number of text lines/rows on the LCD
284 * @return number of rows
286 int lcd_get_screen_rows(void);
289 * Get the number of text columns on the LCD
291 * @return number of columns
293 int lcd_get_screen_columns(void);
296 * Set the position of the text cursor
298 * @param col Column to place cursor (0 = left side)
299 * @param row Row to place cursor (0 = top line)
301 void lcd_position_cursor(unsigned col
, unsigned row
);
303 /* Allow boards to customize the information displayed */
304 void lcd_show_board_info(void);
306 /* Return the size of the LCD frame buffer, and the line length */
307 int lcd_get_size(int *line_length
);
309 int lcd_dt_simplefb_add_node(void *blob
);
310 int lcd_dt_simplefb_enable_existing_node(void *blob
);
312 /* Update the LCD / flush the cache */
315 /************************************************************************/
316 /* ** BITMAP DISPLAY SUPPORT */
317 /************************************************************************/
318 #if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
319 # include <bmp_layout.h>
320 # include <asm/byteorder.h>
324 * Information about displays we are using. This is for configuring
325 * the LCD controller and memory allocation. Someone has to know what
326 * is connected, as we can't autodetect anything.
328 #define CONFIG_SYS_HIGH 0 /* Pins are active high */
329 #define CONFIG_SYS_LOW 1 /* Pins are active low */
331 #define LCD_MONOCHROME 0
335 #define LCD_COLOR16 4
336 #define LCD_COLOR32 5
337 /*----------------------------------------------------------------------*/
338 #if defined(CONFIG_LCD_INFO_BELOW_LOGO)
339 # define LCD_INFO_X 0
340 # define LCD_INFO_Y (BMP_LOGO_HEIGHT + VIDEO_FONT_HEIGHT)
341 #elif defined(CONFIG_LCD_LOGO)
342 # define LCD_INFO_X (BMP_LOGO_WIDTH + 4 * VIDEO_FONT_WIDTH)
343 # define LCD_INFO_Y VIDEO_FONT_HEIGHT
345 # define LCD_INFO_X VIDEO_FONT_WIDTH
346 # define LCD_INFO_Y VIDEO_FONT_HEIGHT
349 /* Default to 8bpp if bit depth not specified */
351 # define LCD_BPP LCD_COLOR8
357 /* Calculate nr. of bits per pixel and nr. of colors */
358 #define NBITS(bit_code) (1 << (bit_code))
359 #define NCOLORS(bit_code) (1 << NBITS(bit_code))
361 /************************************************************************/
362 /* ** CONSOLE CONSTANTS */
363 /************************************************************************/
364 #if LCD_BPP == LCD_MONOCHROME
367 * Simple black/white definitions
369 # define CONSOLE_COLOR_BLACK 0
370 # define CONSOLE_COLOR_WHITE 1 /* Must remain last / highest */
372 #elif LCD_BPP == LCD_COLOR8
375 * 8bpp color definitions
377 # define CONSOLE_COLOR_BLACK 0
378 # define CONSOLE_COLOR_RED 1
379 # define CONSOLE_COLOR_GREEN 2
380 # define CONSOLE_COLOR_YELLOW 3
381 # define CONSOLE_COLOR_BLUE 4
382 # define CONSOLE_COLOR_MAGENTA 5
383 # define CONSOLE_COLOR_CYAN 6
384 # define CONSOLE_COLOR_GREY 14
385 # define CONSOLE_COLOR_WHITE 15 /* Must remain last / highest */
387 #elif LCD_BPP == LCD_COLOR32
389 * 32bpp color definitions
391 # define CONSOLE_COLOR_RED 0x00ff0000
392 # define CONSOLE_COLOR_GREEN 0x0000ff00
393 # define CONSOLE_COLOR_YELLOW 0x00ffff00
394 # define CONSOLE_COLOR_BLUE 0x000000ff
395 # define CONSOLE_COLOR_MAGENTA 0x00ff00ff
396 # define CONSOLE_COLOR_CYAN 0x0000ffff
397 # define CONSOLE_COLOR_GREY 0x00aaaaaa
398 # define CONSOLE_COLOR_BLACK 0x00000000
399 # define CONSOLE_COLOR_WHITE 0x00ffffff /* Must remain last / highest*/
400 # define NBYTES(bit_code) (NBITS(bit_code) >> 3)
405 * 16bpp color definitions
407 # define CONSOLE_COLOR_BLACK 0x0000
408 # define CONSOLE_COLOR_WHITE 0xffff /* Must remain last / highest */
410 #endif /* color definitions */
412 /************************************************************************/
414 # define PAGE_SIZE 4096
417 /************************************************************************/