2 * Copyright 2008,2010 Freescale Semiconductor, Inc
5 * Based (loosely) on the Linux code
7 * SPDX-License-Identifier: GPL-2.0+
13 #include <linux/list.h>
14 #include <linux/sizes.h>
15 #include <linux/compiler.h>
18 /* SD/MMC version bits; 8 flags, 8 major, 8 minor, 8 change */
19 #define SD_VERSION_SD (1U << 31)
20 #define MMC_VERSION_MMC (1U << 30)
22 #define MAKE_SDMMC_VERSION(a, b, c) \
23 ((((u32)(a)) << 16) | ((u32)(b) << 8) | (u32)(c))
24 #define MAKE_SD_VERSION(a, b, c) \
25 (SD_VERSION_SD | MAKE_SDMMC_VERSION(a, b, c))
26 #define MAKE_MMC_VERSION(a, b, c) \
27 (MMC_VERSION_MMC | MAKE_SDMMC_VERSION(a, b, c))
29 #define EXTRACT_SDMMC_MAJOR_VERSION(x) \
30 (((u32)(x) >> 16) & 0xff)
31 #define EXTRACT_SDMMC_MINOR_VERSION(x) \
32 (((u32)(x) >> 8) & 0xff)
33 #define EXTRACT_SDMMC_CHANGE_VERSION(x) \
36 #define SD_VERSION_3 MAKE_SD_VERSION(3, 0, 0)
37 #define SD_VERSION_2 MAKE_SD_VERSION(2, 0, 0)
38 #define SD_VERSION_1_0 MAKE_SD_VERSION(1, 0, 0)
39 #define SD_VERSION_1_10 MAKE_SD_VERSION(1, 10, 0)
41 #define MMC_VERSION_UNKNOWN MAKE_MMC_VERSION(0, 0, 0)
42 #define MMC_VERSION_1_2 MAKE_MMC_VERSION(1, 2, 0)
43 #define MMC_VERSION_1_4 MAKE_MMC_VERSION(1, 4, 0)
44 #define MMC_VERSION_2_2 MAKE_MMC_VERSION(2, 2, 0)
45 #define MMC_VERSION_3 MAKE_MMC_VERSION(3, 0, 0)
46 #define MMC_VERSION_4 MAKE_MMC_VERSION(4, 0, 0)
47 #define MMC_VERSION_4_1 MAKE_MMC_VERSION(4, 1, 0)
48 #define MMC_VERSION_4_2 MAKE_MMC_VERSION(4, 2, 0)
49 #define MMC_VERSION_4_3 MAKE_MMC_VERSION(4, 3, 0)
50 #define MMC_VERSION_4_41 MAKE_MMC_VERSION(4, 4, 1)
51 #define MMC_VERSION_4_5 MAKE_MMC_VERSION(4, 5, 0)
52 #define MMC_VERSION_5_0 MAKE_MMC_VERSION(5, 0, 0)
53 #define MMC_VERSION_5_1 MAKE_MMC_VERSION(5, 1, 0)
55 #define MMC_MODE_HS (1 << 0)
56 #define MMC_MODE_HS_52MHz (1 << 1)
57 #define MMC_MODE_4BIT (1 << 2)
58 #define MMC_MODE_8BIT (1 << 3)
59 #define MMC_MODE_SPI (1 << 4)
60 #define MMC_MODE_DDR_52MHz (1 << 5)
62 #define SD_DATA_4BIT 0x00040000
64 #define IS_SD(x) ((x)->version & SD_VERSION_SD)
65 #define IS_MMC(x) ((x)->version & MMC_VERSION_MMC)
67 #define MMC_DATA_READ 1
68 #define MMC_DATA_WRITE 2
70 #define MMC_CMD_GO_IDLE_STATE 0
71 #define MMC_CMD_SEND_OP_COND 1
72 #define MMC_CMD_ALL_SEND_CID 2
73 #define MMC_CMD_SET_RELATIVE_ADDR 3
74 #define MMC_CMD_SET_DSR 4
75 #define MMC_CMD_SWITCH 6
76 #define MMC_CMD_SELECT_CARD 7
77 #define MMC_CMD_SEND_EXT_CSD 8
78 #define MMC_CMD_SEND_CSD 9
79 #define MMC_CMD_SEND_CID 10
80 #define MMC_CMD_STOP_TRANSMISSION 12
81 #define MMC_CMD_SEND_STATUS 13
82 #define MMC_CMD_SET_BLOCKLEN 16
83 #define MMC_CMD_READ_SINGLE_BLOCK 17
84 #define MMC_CMD_READ_MULTIPLE_BLOCK 18
85 #define MMC_CMD_SET_BLOCK_COUNT 23
86 #define MMC_CMD_WRITE_SINGLE_BLOCK 24
87 #define MMC_CMD_WRITE_MULTIPLE_BLOCK 25
88 #define MMC_CMD_ERASE_GROUP_START 35
89 #define MMC_CMD_ERASE_GROUP_END 36
90 #define MMC_CMD_ERASE 38
91 #define MMC_CMD_APP_CMD 55
92 #define MMC_CMD_SPI_READ_OCR 58
93 #define MMC_CMD_SPI_CRC_ON_OFF 59
94 #define MMC_CMD_RES_MAN 62
96 #define MMC_CMD62_ARG1 0xefac62ec
97 #define MMC_CMD62_ARG2 0xcbaea7
100 #define SD_CMD_SEND_RELATIVE_ADDR 3
101 #define SD_CMD_SWITCH_FUNC 6
102 #define SD_CMD_SEND_IF_COND 8
103 #define SD_CMD_SWITCH_UHS18V 11
105 #define SD_CMD_APP_SET_BUS_WIDTH 6
106 #define SD_CMD_APP_SD_STATUS 13
107 #define SD_CMD_ERASE_WR_BLK_START 32
108 #define SD_CMD_ERASE_WR_BLK_END 33
109 #define SD_CMD_APP_SEND_OP_COND 41
110 #define SD_CMD_APP_SEND_SCR 51
112 /* SCR definitions in different words */
113 #define SD_HIGHSPEED_BUSY 0x00020000
114 #define SD_HIGHSPEED_SUPPORTED 0x00020000
116 #define OCR_BUSY 0x80000000
117 #define OCR_HCS 0x40000000
118 #define OCR_VOLTAGE_MASK 0x007FFF80
119 #define OCR_ACCESS_MODE 0x60000000
121 #define MMC_ERASE_ARG 0x00000000
122 #define MMC_SECURE_ERASE_ARG 0x80000000
123 #define MMC_TRIM_ARG 0x00000001
124 #define MMC_DISCARD_ARG 0x00000003
125 #define MMC_SECURE_TRIM1_ARG 0x80000001
126 #define MMC_SECURE_TRIM2_ARG 0x80008000
128 #define MMC_STATUS_MASK (~0x0206BF7F)
129 #define MMC_STATUS_SWITCH_ERROR (1 << 7)
130 #define MMC_STATUS_RDY_FOR_DATA (1 << 8)
131 #define MMC_STATUS_CURR_STATE (0xf << 9)
132 #define MMC_STATUS_ERROR (1 << 19)
134 #define MMC_STATE_PRG (7 << 9)
136 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
137 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
138 #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
139 #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
140 #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
141 #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
142 #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
143 #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
144 #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
145 #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
146 #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
147 #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
148 #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
149 #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
150 #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
151 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
152 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
154 #define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
155 #define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte
156 addressed by index which are
158 #define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte
159 addressed by index, which are
161 #define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */
163 #define SD_SWITCH_CHECK 0
164 #define SD_SWITCH_SWITCH 1
169 #define EXT_CSD_ENH_START_ADDR 136 /* R/W */
170 #define EXT_CSD_ENH_SIZE_MULT 140 /* R/W */
171 #define EXT_CSD_GP_SIZE_MULT 143 /* R/W */
172 #define EXT_CSD_PARTITION_SETTING 155 /* R/W */
173 #define EXT_CSD_PARTITIONS_ATTRIBUTE 156 /* R/W */
174 #define EXT_CSD_MAX_ENH_SIZE_MULT 157 /* R */
175 #define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */
176 #define EXT_CSD_RST_N_FUNCTION 162 /* R/W */
177 #define EXT_CSD_BKOPS_EN 163 /* R/W & R/W/E */
178 #define EXT_CSD_WR_REL_PARAM 166 /* R */
179 #define EXT_CSD_WR_REL_SET 167 /* R/W */
180 #define EXT_CSD_RPMB_MULT 168 /* RO */
181 #define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
182 #define EXT_CSD_BOOT_BUS_WIDTH 177
183 #define EXT_CSD_PART_CONF 179 /* R/W */
184 #define EXT_CSD_BUS_WIDTH 183 /* R/W */
185 #define EXT_CSD_HS_TIMING 185 /* R/W */
186 #define EXT_CSD_REV 192 /* RO */
187 #define EXT_CSD_CARD_TYPE 196 /* RO */
188 #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
189 #define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */
190 #define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */
191 #define EXT_CSD_BOOT_MULT 226 /* RO */
192 #define EXT_CSD_BKOPS_SUPPORT 502 /* RO */
195 * EXT_CSD field definitions
198 #define EXT_CSD_CMD_SET_NORMAL (1 << 0)
199 #define EXT_CSD_CMD_SET_SECURE (1 << 1)
200 #define EXT_CSD_CMD_SET_CPSECURE (1 << 2)
202 #define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */
203 #define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */
204 #define EXT_CSD_CARD_TYPE_DDR_1_8V (1 << 2)
205 #define EXT_CSD_CARD_TYPE_DDR_1_2V (1 << 3)
206 #define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
207 | EXT_CSD_CARD_TYPE_DDR_1_2V)
209 #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
210 #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
211 #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
212 #define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */
213 #define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */
215 #define EXT_CSD_BOOT_ACK_ENABLE (1 << 6)
216 #define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3)
217 #define EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0)
218 #define EXT_CSD_PARTITION_ACCESS_DISABLE (0 << 0)
220 #define EXT_CSD_BOOT_ACK(x) (x << 6)
221 #define EXT_CSD_BOOT_PART_NUM(x) (x << 3)
222 #define EXT_CSD_PARTITION_ACCESS(x) (x << 0)
224 #define EXT_CSD_BOOT_BUS_WIDTH_MODE(x) (x << 3)
225 #define EXT_CSD_BOOT_BUS_WIDTH_RESET(x) (x << 2)
226 #define EXT_CSD_BOOT_BUS_WIDTH_WIDTH(x) (x)
228 #define EXT_CSD_PARTITION_SETTING_COMPLETED (1 << 0)
230 #define EXT_CSD_ENH_USR (1 << 0) /* user data area is enhanced */
231 #define EXT_CSD_ENH_GP(x) (1 << ((x)+1)) /* GP part (x+1) is enhanced */
233 #define EXT_CSD_HS_CTRL_REL (1 << 0) /* host controlled WR_REL_SET */
235 #define EXT_CSD_WR_DATA_REL_USR (1 << 0) /* user data area WR_REL */
236 #define EXT_CSD_WR_DATA_REL_GP(x) (1 << ((x)+1)) /* GP part (x+1) WR_REL */
238 #define R1_ILLEGAL_COMMAND (1 << 22)
239 #define R1_APP_CMD (1 << 5)
241 #define MMC_RSP_PRESENT (1 << 0)
242 #define MMC_RSP_136 (1 << 1) /* 136 bit response */
243 #define MMC_RSP_CRC (1 << 2) /* expect valid crc */
244 #define MMC_RSP_BUSY (1 << 3) /* card may send busy */
245 #define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */
247 #define MMC_RSP_NONE (0)
248 #define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
249 #define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \
251 #define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
252 #define MMC_RSP_R3 (MMC_RSP_PRESENT)
253 #define MMC_RSP_R4 (MMC_RSP_PRESENT)
254 #define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
255 #define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
256 #define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
258 #define MMCPART_NOAVAILABLE (0xff)
259 #define PART_ACCESS_MASK (0x7)
260 #define PART_SUPPORT (0x1)
261 #define ENHNCD_SUPPORT (0x2)
262 #define PART_ENH_ATTRIB (0x1f)
264 /* Maximum block size for MMC */
265 #define MMC_MAX_BLOCK_LEN 512
267 /* The number of MMC physical partitions. These consist of:
268 * boot partitions (2), general purpose partitions (4) in MMC v4.4.
270 #define MMC_NUM_BOOT_PARTITION 2
271 #define MMC_PART_RPMB 3 /* RPMB partition number */
273 /* Driver model support */
276 * struct mmc_uclass_priv - Holds information about a device used by the uclass
278 struct mmc_uclass_priv
{
283 * mmc_get_mmc_dev() - get the MMC struct pointer for a device
285 * Provided that the device is already probed and ready for use, this value
289 * @return associated mmc struct pointer if available, else NULL
291 struct mmc
*mmc_get_mmc_dev(struct udevice
*dev
);
293 /* End of driver model support */
314 const char *src
; /* src buffers don't get written to */
324 #ifdef CONFIG_DM_MMC_OPS
327 * send_cmd() - Send a command to the MMC device
329 * @dev: Device to receive the command
330 * @cmd: Command to send
331 * @data: Additional data to send/receive
332 * @return 0 if OK, -ve on error
334 int (*send_cmd
)(struct udevice
*dev
, struct mmc_cmd
*cmd
,
335 struct mmc_data
*data
);
338 * set_ios() - Set the I/O speed/width for an MMC device
340 * @dev: Device to update
341 * @return 0 if OK, -ve on error
343 int (*set_ios
)(struct udevice
*dev
);
346 * get_cd() - See whether a card is present
348 * @dev: Device to check
349 * @return 0 if not present, 1 if present, -ve on error
351 int (*get_cd
)(struct udevice
*dev
);
354 * get_wp() - See whether a card has write-protect enabled
356 * @dev: Device to check
357 * @return 0 if write-enabled, 1 if write-protected, -ve on error
359 int (*get_wp
)(struct udevice
*dev
);
362 #define mmc_get_ops(dev) ((struct dm_mmc_ops *)(dev)->driver->ops)
364 int dm_mmc_send_cmd(struct udevice
*dev
, struct mmc_cmd
*cmd
,
365 struct mmc_data
*data
);
366 int dm_mmc_set_ios(struct udevice
*dev
);
367 int dm_mmc_get_cd(struct udevice
*dev
);
368 int dm_mmc_get_wp(struct udevice
*dev
);
370 /* Transition functions for compatibility */
371 int mmc_set_ios(struct mmc
*mmc
);
372 int mmc_getcd(struct mmc
*mmc
);
373 int mmc_getwp(struct mmc
*mmc
);
377 int (*send_cmd
)(struct mmc
*mmc
,
378 struct mmc_cmd
*cmd
, struct mmc_data
*data
);
379 int (*set_ios
)(struct mmc
*mmc
);
380 int (*init
)(struct mmc
*mmc
);
381 int (*getcd
)(struct mmc
*mmc
);
382 int (*getwp
)(struct mmc
*mmc
);
388 #ifndef CONFIG_DM_MMC_OPS
389 const struct mmc_ops
*ops
;
396 unsigned char part_type
;
400 unsigned int au
; /* In sectors */
401 unsigned int erase_timeout
; /* In milliseconds */
402 unsigned int erase_offset
; /* In milliseconds */
406 * With CONFIG_DM_MMC enabled, struct mmc can be accessed from the MMC device
407 * with mmc_get_mmc_dev().
409 * TODO struct mmc should be in mmc_private but it's hard to fix right now
413 struct list_head link
;
415 const struct mmc_config
*cfg
; /* provided configuration */
437 uint erase_grp_size
; /* in 512-byte sectors */
438 uint hc_wp_grp_size
; /* in 512-byte sectors */
439 struct sd_ssr ssr
; /* SD status register */
448 struct blk_desc block_dev
;
450 char op_cond_pending
; /* 1 if we are waiting on an op_cond command */
451 char init_in_progress
; /* 1 if we have done mmc_start_init() */
452 char preinit
; /* start init as early as possible */
455 struct udevice
*dev
; /* Device for this MMC controller */
459 struct mmc_hwpart_conf
{
461 uint enh_start
; /* in 512-byte sectors */
462 uint enh_size
; /* in 512-byte sectors, if 0 no enh area */
463 unsigned wr_rel_change
: 1;
464 unsigned wr_rel_set
: 1;
467 uint size
; /* in 512-byte sectors */
468 unsigned enhanced
: 1;
469 unsigned wr_rel_change
: 1;
470 unsigned wr_rel_set
: 1;
474 enum mmc_hwpart_conf_mode
{
475 MMC_HWPART_CONF_CHECK
,
477 MMC_HWPART_CONF_COMPLETE
,
480 struct mmc
*mmc_create(const struct mmc_config
*cfg
, void *priv
);
483 * mmc_bind() - Set up a new MMC device ready for probing
485 * A child block device is bound with the IF_TYPE_MMC interface type. This
486 * allows the device to be used with CONFIG_BLK
488 * @dev: MMC device to set up
490 * @cfg: MMC configuration
491 * @return 0 if OK, -ve on error
493 int mmc_bind(struct udevice
*dev
, struct mmc
*mmc
,
494 const struct mmc_config
*cfg
);
495 void mmc_destroy(struct mmc
*mmc
);
498 * mmc_unbind() - Unbind a MMC device's child block device
501 * @return 0 if OK, -ve on error
503 int mmc_unbind(struct udevice
*dev
);
504 int mmc_initialize(bd_t
*bis
);
505 int mmc_init(struct mmc
*mmc
);
506 int mmc_read(struct mmc
*mmc
, u64 src
, uchar
*dst
, int size
);
507 void mmc_set_clock(struct mmc
*mmc
, uint clock
);
508 struct mmc
*find_mmc_device(int dev_num
);
509 int mmc_set_dev(int dev_num
);
510 void print_mmc_devices(char separator
);
513 * get_mmc_num() - get the total MMC device number
515 * @return 0 if there is no MMC device, else the number of devices
517 int get_mmc_num(void);
518 int mmc_switch_part(struct mmc
*mmc
, unsigned int part_num
);
519 int mmc_hwpart_config(struct mmc
*mmc
, const struct mmc_hwpart_conf
*conf
,
520 enum mmc_hwpart_conf_mode mode
);
522 #ifndef CONFIG_DM_MMC_OPS
523 int mmc_getcd(struct mmc
*mmc
);
524 int board_mmc_getcd(struct mmc
*mmc
);
525 int mmc_getwp(struct mmc
*mmc
);
526 int board_mmc_getwp(struct mmc
*mmc
);
529 int mmc_set_dsr(struct mmc
*mmc
, u16 val
);
530 /* Function to change the size of boot partition and rpmb partitions */
531 int mmc_boot_partition_size_change(struct mmc
*mmc
, unsigned long bootsize
,
532 unsigned long rpmbsize
);
533 /* Function to modify the PARTITION_CONFIG field of EXT_CSD */
534 int mmc_set_part_conf(struct mmc
*mmc
, u8 ack
, u8 part_num
, u8 access
);
535 /* Function to modify the BOOT_BUS_WIDTH field of EXT_CSD */
536 int mmc_set_boot_bus_width(struct mmc
*mmc
, u8 width
, u8 reset
, u8 mode
);
537 /* Function to modify the RST_n_FUNCTION field of EXT_CSD */
538 int mmc_set_rst_n_function(struct mmc
*mmc
, u8 enable
);
539 /* Functions to read / write the RPMB partition */
540 int mmc_rpmb_set_key(struct mmc
*mmc
, void *key
);
541 int mmc_rpmb_get_counter(struct mmc
*mmc
, unsigned long *counter
);
542 int mmc_rpmb_read(struct mmc
*mmc
, void *addr
, unsigned short blk
,
543 unsigned short cnt
, unsigned char *key
);
544 int mmc_rpmb_write(struct mmc
*mmc
, void *addr
, unsigned short blk
,
545 unsigned short cnt
, unsigned char *key
);
546 #ifdef CONFIG_CMD_BKOPS_ENABLE
547 int mmc_set_bkops_enable(struct mmc
*mmc
);
551 * Start device initialization and return immediately; it does not block on
552 * polling OCR (operation condition register) status. Then you should call
553 * mmc_init, which would block on polling OCR status and complete the device
556 * @param mmc Pointer to a MMC device struct
557 * @return 0 on success, IN_PROGRESS on waiting for OCR status, <0 on error.
559 int mmc_start_init(struct mmc
*mmc
);
562 * Set preinit flag of mmc device.
564 * This will cause the device to be pre-inited during mmc_initialize(),
565 * which may save boot time if the device is not accessed until later.
566 * Some eMMC devices take 200-300ms to init, but unfortunately they
567 * must be sent a series of commands to even get them to start preparing
570 * @param mmc Pointer to a MMC device struct
571 * @param preinit preinit flag value
573 void mmc_set_preinit(struct mmc
*mmc
, int preinit
);
575 #ifdef CONFIG_MMC_SPI
576 #define mmc_host_is_spi(mmc) ((mmc)->cfg->host_caps & MMC_MODE_SPI)
578 #define mmc_host_is_spi(mmc) 0
580 struct mmc
*mmc_spi_init(uint bus
, uint cs
, uint speed
, uint mode
);
582 void board_mmc_power_init(void);
583 int board_mmc_init(bd_t
*bis
);
584 int cpu_mmc_init(bd_t
*bis
);
585 int mmc_get_env_addr(struct mmc
*mmc
, int copy
, u32
*env_addr
);
586 int mmc_get_env_dev(void);
588 struct pci_device_id
;
591 * pci_mmc_init() - set up PCI MMC devices
593 * This finds all the matching PCI IDs and sets them up as MMC devices.
595 * @name: Name to use for devices
596 * @mmc_supported: PCI IDs to search for, terminated by {0, 0}
598 int pci_mmc_init(const char *name
, struct pci_device_id
*mmc_supported
);
600 /* Set block count limit because of 16 bit register limit on some hardware*/
601 #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
602 #define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
606 * mmc_get_blk_desc() - Get the block descriptor for an MMC device
609 * @return block device if found, else NULL
611 struct blk_desc
*mmc_get_blk_desc(struct mmc
*mmc
);