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1 /*
2 * (C) Copyright 2008
3 * Benjamin Warren, biggerbadderben@gmail.com
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 /*
9 * netdev.h - definitions an prototypes for network devices
10 */
11
12 #ifndef _NETDEV_H_
13 #define _NETDEV_H_
14
15 /*
16 * Board and CPU-specific initialization functions
17 * board_eth_init() has highest priority. cpu_eth_init() only
18 * gets called if board_eth_init() isn't instantiated or fails.
19 * Return values:
20 * 0: success
21 * -1: failure
22 */
23
24 int board_eth_init(bd_t *bis);
25 int cpu_eth_init(bd_t *bis);
26
27 /* Driver initialization prototypes */
28 int at91emac_register(bd_t *bis, unsigned long iobase);
29 int au1x00_enet_initialize(bd_t*);
30 int ax88180_initialize(bd_t *bis);
31 int bcm_sf2_eth_register(bd_t *bis, u8 dev_num);
32 int bfin_EMAC_initialize(bd_t *bis);
33 int calxedaxgmac_initialize(u32 id, ulong base_addr);
34 int cs8900_initialize(u8 dev_num, int base_addr);
35 int davinci_emac_initialize(void);
36 int dc21x4x_initialize(bd_t *bis);
37 int designware_initialize(ulong base_addr, u32 interface);
38 int dm9000_initialize(bd_t *bis);
39 int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr);
40 int e1000_initialize(bd_t *bis);
41 int eepro100_initialize(bd_t *bis);
42 int enc28j60_initialize(unsigned int bus, unsigned int cs,
43 unsigned int max_hz, unsigned int mode);
44 int ep93xx_eth_initialize(u8 dev_num, int base_addr);
45 int eth_3com_initialize (bd_t * bis);
46 int ethoc_initialize(u8 dev_num, int base_addr);
47 int fec_initialize (bd_t *bis);
48 int fecmxc_initialize(bd_t *bis);
49 int fecmxc_initialize_multi(bd_t *bis, int dev_id, int phy_id, uint32_t addr);
50 int ftgmac100_initialize(bd_t *bits);
51 int ftmac100_initialize(bd_t *bits);
52 int ftmac110_initialize(bd_t *bits);
53 int greth_initialize(bd_t *bis);
54 void gt6426x_eth_initialize(bd_t *bis);
55 int ks8851_mll_initialize(u8 dev_num, int base_addr);
56 int lan91c96_initialize(u8 dev_num, int base_addr);
57 int lpc32xx_eth_initialize(bd_t *bis);
58 int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
59 int mcdmafec_initialize(bd_t *bis);
60 int mcffec_initialize(bd_t *bis);
61 int mpc512x_fec_initialize(bd_t *bis);
62 int mpc5xxx_fec_initialize(bd_t *bis);
63 int mpc82xx_scc_enet_initialize(bd_t *bis);
64 int mvgbe_initialize(bd_t *bis);
65 int mvneta_initialize(bd_t *bis, int base_addr, int devnum, int phy_addr);
66 int natsemi_initialize(bd_t *bis);
67 int ne2k_register(void);
68 int npe_initialize(bd_t *bis);
69 int ns8382x_initialize(bd_t *bis);
70 int pcnet_initialize(bd_t *bis);
71 int ppc_4xx_eth_initialize (bd_t *bis);
72 int rtl8139_initialize(bd_t *bis);
73 int rtl8169_initialize(bd_t *bis);
74 int scc_initialize(bd_t *bis);
75 int sh_eth_initialize(bd_t *bis);
76 int skge_initialize(bd_t *bis);
77 int smc91111_initialize(u8 dev_num, int base_addr);
78 int smc911x_initialize(u8 dev_num, int base_addr);
79 int tsi108_eth_initialize(bd_t *bis);
80 int uec_standard_init(bd_t *bis);
81 int uli526x_initialize(bd_t *bis);
82 int armada100_fec_register(unsigned long base_addr);
83 int xilinx_axiemac_initialize(bd_t *bis, unsigned long base_addr,
84 unsigned long dma_addr);
85 int xilinx_emaclite_of_init(const void *blob);
86 int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr,
87 int txpp, int rxpp);
88 int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags,
89 unsigned long ctrl_addr);
90 int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr,
91 int phy_addr, u32 emio);
92 /*
93 * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface
94 * exported by a public hader file, we need a global definition at this point.
95 */
96 #if defined(CONFIG_XILINX_LL_TEMAC)
97 #define XILINX_LL_TEMAC_M_FIFO 0 /* use FIFO Ctrl */
98 #define XILINX_LL_TEMAC_M_SDMA_PLB (1 << 0)/* use SDMA Ctrl via PLB */
99 #define XILINX_LL_TEMAC_M_SDMA_DCR (1 << 1)/* use SDMA Ctrl via DCR */
100 #endif
101
102 /* Boards with PCI network controllers can call this from their board_eth_init()
103 * function to initialize whatever's on board.
104 * Return value is total # of devices found */
105
106 static inline int pci_eth_init(bd_t *bis)
107 {
108 int num = 0;
109
110 #ifdef CONFIG_PCI
111
112 #ifdef CONFIG_EEPRO100
113 num += eepro100_initialize(bis);
114 #endif
115 #ifdef CONFIG_TULIP
116 num += dc21x4x_initialize(bis);
117 #endif
118 #ifdef CONFIG_E1000
119 num += e1000_initialize(bis);
120 #endif
121 #ifdef CONFIG_PCNET
122 num += pcnet_initialize(bis);
123 #endif
124 #ifdef CONFIG_NATSEMI
125 num += natsemi_initialize(bis);
126 #endif
127 #ifdef CONFIG_NS8382X
128 num += ns8382x_initialize(bis);
129 #endif
130 #if defined(CONFIG_RTL8139)
131 num += rtl8139_initialize(bis);
132 #endif
133 #if defined(CONFIG_RTL8169)
134 num += rtl8169_initialize(bis);
135 #endif
136 #if defined(CONFIG_ULI526X)
137 num += uli526x_initialize(bis);
138 #endif
139
140 #endif /* CONFIG_PCI */
141 return num;
142 }
143
144 /*
145 * Boards with mv88e61xx switch can use this by defining
146 * CONFIG_MV88E61XX_SWITCH in respective board configheader file
147 * the stuct and enums here are used to specify switch configuration params
148 */
149 #if defined(CONFIG_MV88E61XX_SWITCH)
150
151 /* constants for any 88E61xx switch */
152 #define MV88E61XX_MAX_PORTS_NUM 6
153
154 enum mv88e61xx_cfg_mdip {
155 MV88E61XX_MDIP_NOCHANGE,
156 MV88E61XX_MDIP_REVERSE
157 };
158
159 enum mv88e61xx_cfg_ledinit {
160 MV88E61XX_LED_INIT_DIS,
161 MV88E61XX_LED_INIT_EN
162 };
163
164 enum mv88e61xx_cfg_rgmiid {
165 MV88E61XX_RGMII_DELAY_DIS,
166 MV88E61XX_RGMII_DELAY_EN
167 };
168
169 enum mv88e61xx_cfg_prtstt {
170 MV88E61XX_PORTSTT_DISABLED,
171 MV88E61XX_PORTSTT_BLOCKING,
172 MV88E61XX_PORTSTT_LEARNING,
173 MV88E61XX_PORTSTT_FORWARDING
174 };
175
176 struct mv88e61xx_config {
177 char *name;
178 u8 vlancfg[MV88E61XX_MAX_PORTS_NUM];
179 enum mv88e61xx_cfg_rgmiid rgmii_delay;
180 enum mv88e61xx_cfg_prtstt portstate;
181 enum mv88e61xx_cfg_ledinit led_init;
182 enum mv88e61xx_cfg_mdip mdip;
183 u32 ports_enabled;
184 u8 cpuport;
185 };
186
187 /*
188 * Common mappings for Internal VLANs
189 * These mappings consider that all ports are useable; the driver
190 * will mask inexistent/unused ports.
191 */
192
193 /* Switch mode : routes any port to any port */
194 #define MV88E61XX_VLANCFG_SWITCH { 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F }
195
196 /* Router mode: routes only CPU port 5 to/from non-CPU ports 0-4 */
197 #define MV88E61XX_VLANCFG_ROUTER { 0x20, 0x20, 0x20, 0x20, 0x20, 0x1F }
198
199 int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig);
200 #endif /* CONFIG_MV88E61XX_SWITCH */
201
202 struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id);
203 #ifdef CONFIG_PHYLIB
204 struct phy_device;
205 int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr,
206 struct mii_dev *bus, struct phy_device *phydev);
207 #else
208 /*
209 * Allow FEC to fine-tune MII configuration on boards which require this.
210 */
211 int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int));
212 #endif
213
214 #endif /* _NETDEV_H_ */