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1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Copyright 2011 Freescale Semiconductor, Inc.
4 * Andy Fleming <afleming@gmail.com>
5 *
6 * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
7 */
8
9 #ifndef _PHY_H
10 #define _PHY_H
11
12 #include <dm.h>
13 #include <linux/list.h>
14 #include <linux/mii.h>
15 #include <linux/ethtool.h>
16 #include <linux/mdio.h>
17 #include <phy_interface.h>
18
19 #define PHY_FIXED_ID 0xa5a55a5a
20
21 #define PHY_MAX_ADDR 32
22
23 #define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
24
25 #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
26 SUPPORTED_TP | \
27 SUPPORTED_MII)
28
29 #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
30 SUPPORTED_10baseT_Full)
31
32 #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
33 SUPPORTED_100baseT_Full)
34
35 #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
36 SUPPORTED_1000baseT_Full)
37
38 #define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
39 PHY_100BT_FEATURES | \
40 PHY_DEFAULT_FEATURES)
41
42 #define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
43 PHY_1000BT_FEATURES)
44
45 #define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \
46 SUPPORTED_10000baseT_Full)
47
48 #ifndef PHY_ANEG_TIMEOUT
49 #define PHY_ANEG_TIMEOUT 4000
50 #endif
51
52
53 struct phy_device;
54
55 #define MDIO_NAME_LEN 32
56
57 struct mii_dev {
58 struct list_head link;
59 char name[MDIO_NAME_LEN];
60 void *priv;
61 int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
62 int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
63 u16 val);
64 int (*reset)(struct mii_dev *bus);
65 struct phy_device *phymap[PHY_MAX_ADDR];
66 u32 phy_mask;
67 };
68
69 /* struct phy_driver: a structure which defines PHY behavior
70 *
71 * uid will contain a number which represents the PHY. During
72 * startup, the driver will poll the PHY to find out what its
73 * UID--as defined by registers 2 and 3--is. The 32-bit result
74 * gotten from the PHY will be masked to
75 * discard any bits which may change based on revision numbers
76 * unimportant to functionality
77 *
78 */
79 struct phy_driver {
80 char *name;
81 unsigned int uid;
82 unsigned int mask;
83 unsigned int mmds;
84
85 u32 features;
86
87 /* Called to do any driver startup necessities */
88 /* Will be called during phy_connect */
89 int (*probe)(struct phy_device *phydev);
90
91 /* Called to configure the PHY, and modify the controller
92 * based on the results. Should be called after phy_connect */
93 int (*config)(struct phy_device *phydev);
94
95 /* Called when starting up the controller */
96 int (*startup)(struct phy_device *phydev);
97
98 /* Called when bringing down the controller */
99 int (*shutdown)(struct phy_device *phydev);
100
101 int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
102 int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
103 u16 val);
104
105 /* Phy specific driver override for reading a MMD register */
106 int (*read_mmd)(struct phy_device *phydev, int devad, int reg);
107
108 /* Phy specific driver override for writing a MMD register */
109 int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
110 u16 val);
111
112 struct list_head list;
113 };
114
115 struct phy_device {
116 /* Information about the PHY type */
117 /* And management functions */
118 struct mii_dev *bus;
119 struct phy_driver *drv;
120 void *priv;
121
122 #ifdef CONFIG_DM_ETH
123 struct udevice *dev;
124 ofnode node;
125 #else
126 struct eth_device *dev;
127 #endif
128
129 /* forced speed & duplex (no autoneg)
130 * partner speed & duplex & pause (autoneg)
131 */
132 int speed;
133 int duplex;
134
135 /* The most recently read link state */
136 int link;
137 int port;
138 phy_interface_t interface;
139
140 u32 advertising;
141 u32 supported;
142 u32 mmds;
143
144 int autoneg;
145 int addr;
146 int pause;
147 int asym_pause;
148 u32 phy_id;
149 bool is_c45;
150 u32 flags;
151 };
152
153 struct fixed_link {
154 int phy_id;
155 int duplex;
156 int link_speed;
157 int pause;
158 int asym_pause;
159 };
160
161 static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
162 {
163 struct mii_dev *bus = phydev->bus;
164
165 return bus->read(bus, phydev->addr, devad, regnum);
166 }
167
168 static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
169 u16 val)
170 {
171 struct mii_dev *bus = phydev->bus;
172
173 return bus->write(bus, phydev->addr, devad, regnum, val);
174 }
175
176 static inline void phy_mmd_start_indirect(struct phy_device *phydev, int devad,
177 int regnum)
178 {
179 /* Write the desired MMD Devad */
180 phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL, devad);
181
182 /* Write the desired MMD register address */
183 phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, regnum);
184
185 /* Select the Function : DATA with no post increment */
186 phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_CTRL,
187 (devad | MII_MMD_CTRL_NOINCR));
188 }
189
190 static inline int phy_read_mmd(struct phy_device *phydev, int devad,
191 int regnum)
192 {
193 struct phy_driver *drv = phydev->drv;
194
195 if (regnum > (u16)~0 || devad > 32)
196 return -EINVAL;
197
198 /* driver-specific access */
199 if (drv->read_mmd)
200 return drv->read_mmd(phydev, devad, regnum);
201
202 /* direct C45 / C22 access */
203 if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
204 devad == MDIO_DEVAD_NONE || !devad)
205 return phy_read(phydev, devad, regnum);
206
207 /* indirect C22 access */
208 phy_mmd_start_indirect(phydev, devad, regnum);
209
210 /* Read the content of the MMD's selected register */
211 return phy_read(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA);
212 }
213
214 static inline int phy_write_mmd(struct phy_device *phydev, int devad,
215 int regnum, u16 val)
216 {
217 struct phy_driver *drv = phydev->drv;
218
219 if (regnum > (u16)~0 || devad > 32)
220 return -EINVAL;
221
222 /* driver-specific access */
223 if (drv->write_mmd)
224 return drv->write_mmd(phydev, devad, regnum, val);
225
226 /* direct C45 / C22 access */
227 if ((drv->features & PHY_10G_FEATURES) == PHY_10G_FEATURES ||
228 devad == MDIO_DEVAD_NONE || !devad)
229 return phy_write(phydev, devad, regnum, val);
230
231 /* indirect C22 access */
232 phy_mmd_start_indirect(phydev, devad, regnum);
233
234 /* Write the data into MMD's selected register */
235 return phy_write(phydev, MDIO_DEVAD_NONE, MII_MMD_DATA, val);
236 }
237
238 #ifdef CONFIG_PHYLIB_10G
239 extern struct phy_driver gen10g_driver;
240
241 /* For now, XGMII is the only 10G interface */
242 static inline int is_10g_interface(phy_interface_t interface)
243 {
244 return interface == PHY_INTERFACE_MODE_XGMII;
245 }
246
247 #endif
248
249 /**
250 * phy_init() - Initializes the PHY drivers
251 *
252 * This function registers all available PHY drivers
253 *
254 * @return 0 if OK, -ve on error
255 */
256 int phy_init(void);
257
258 /**
259 * phy_reset() - Resets the specified PHY
260 *
261 * Issues a reset of the PHY and waits for it to complete
262 *
263 * @phydev: PHY to reset
264 * @return 0 if OK, -ve on error
265 */
266 int phy_reset(struct phy_device *phydev);
267
268 /**
269 * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
270 *
271 * The function checks the PHY addresses flagged in phy_mask and returns a
272 * phy_device pointer if it detects a PHY.
273 * This function should only be called if just one PHY is expected to be present
274 * in the set of addresses flagged in phy_mask. If multiple PHYs are present,
275 * it is undefined which of these PHYs is returned.
276 *
277 * @bus: MII/MDIO bus to scan
278 * @phy_mask: bitmap of PYH addresses to scan
279 * @interface: type of MAC-PHY interface
280 * @return pointer to phy_device if a PHY is found, or NULL otherwise
281 */
282 struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
283 phy_interface_t interface);
284
285 #ifdef CONFIG_DM_ETH
286
287 /**
288 * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
289 * @phydev: PHY device
290 * @dev: Ethernet device
291 */
292 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);
293
294 /**
295 * phy_connect() - Creates a PHY device for the Ethernet interface
296 *
297 * Creates a PHY device for the PHY at the given address, if one doesn't exist
298 * already, and associates it with the Ethernet device.
299 * The function may be called with addr <= 0, in this case addr value is ignored
300 * and the bus is scanned to detect a PHY. Scanning should only be used if only
301 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
302 * which PHY is returned.
303 *
304 * @bus: MII/MDIO bus that hosts the PHY
305 * @addr: PHY address on MDIO bus
306 * @dev: Ethernet device to associate to the PHY
307 * @interface: type of MAC-PHY interface
308 * @return pointer to phy_device if a PHY is found, or NULL otherwise
309 */
310 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
311 struct udevice *dev,
312 phy_interface_t interface);
313
314 static inline ofnode phy_get_ofnode(struct phy_device *phydev)
315 {
316 if (ofnode_valid(phydev->node))
317 return phydev->node;
318 else
319 return dev_ofnode(phydev->dev);
320 }
321 #else
322
323 /**
324 * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices
325 * @phydev: PHY device
326 * @dev: Ethernet device
327 */
328 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);
329
330 /**
331 * phy_connect() - Creates a PHY device for the Ethernet interface
332 *
333 * Creates a PHY device for the PHY at the given address, if one doesn't exist
334 * already, and associates it with the Ethernet device.
335 * The function may be called with addr <= 0, in this case addr value is ignored
336 * and the bus is scanned to detect a PHY. Scanning should only be used if only
337 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
338 * which PHY is returned.
339 *
340 * @bus: MII/MDIO bus that hosts the PHY
341 * @addr: PHY address on MDIO bus
342 * @dev: Ethernet device to associate to the PHY
343 * @interface: type of MAC-PHY interface
344 * @return pointer to phy_device if a PHY is found, or NULL otherwise
345 */
346 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
347 struct eth_device *dev,
348 phy_interface_t interface);
349
350 static inline ofnode phy_get_ofnode(struct phy_device *phydev)
351 {
352 return ofnode_null();
353 }
354 #endif
355 int phy_startup(struct phy_device *phydev);
356 int phy_config(struct phy_device *phydev);
357 int phy_shutdown(struct phy_device *phydev);
358 int phy_register(struct phy_driver *drv);
359 int phy_set_supported(struct phy_device *phydev, u32 max_speed);
360 int genphy_config_aneg(struct phy_device *phydev);
361 int genphy_restart_aneg(struct phy_device *phydev);
362 int genphy_update_link(struct phy_device *phydev);
363 int genphy_parse_link(struct phy_device *phydev);
364 int genphy_config(struct phy_device *phydev);
365 int genphy_startup(struct phy_device *phydev);
366 int genphy_shutdown(struct phy_device *phydev);
367 int gen10g_config(struct phy_device *phydev);
368 int gen10g_startup(struct phy_device *phydev);
369 int gen10g_shutdown(struct phy_device *phydev);
370 int gen10g_discover_mmds(struct phy_device *phydev);
371
372 int phy_b53_init(void);
373 int phy_mv88e61xx_init(void);
374 int phy_aquantia_init(void);
375 int phy_atheros_init(void);
376 int phy_broadcom_init(void);
377 int phy_cortina_init(void);
378 int phy_davicom_init(void);
379 int phy_et1011c_init(void);
380 int phy_lxt_init(void);
381 int phy_marvell_init(void);
382 int phy_micrel_ksz8xxx_init(void);
383 int phy_micrel_ksz90x1_init(void);
384 int phy_meson_gxl_init(void);
385 int phy_natsemi_init(void);
386 int phy_realtek_init(void);
387 int phy_smsc_init(void);
388 int phy_teranetics_init(void);
389 int phy_ti_init(void);
390 int phy_vitesse_init(void);
391 int phy_xilinx_init(void);
392 int phy_mscc_init(void);
393 int phy_fixed_init(void);
394
395 int board_phy_config(struct phy_device *phydev);
396 int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
397
398 /**
399 * phy_get_interface_by_name() - Look up a PHY interface name
400 *
401 * @str: PHY interface name, e.g. "mii"
402 * @return PHY_INTERFACE_MODE_... value, or -1 if not found
403 */
404 int phy_get_interface_by_name(const char *str);
405
406 /**
407 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
408 * is RGMII (all variants)
409 * @phydev: the phy_device struct
410 */
411 static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
412 {
413 return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
414 phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
415 }
416
417 /**
418 * phy_interface_is_sgmii - Convenience function for testing if a PHY interface
419 * is SGMII (all variants)
420 * @phydev: the phy_device struct
421 */
422 static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
423 {
424 return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
425 phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
426 }
427
428 /* PHY UIDs for various PHYs that are referenced in external code */
429 #define PHY_UID_CS4340 0x13e51002
430 #define PHY_UID_CS4223 0x03e57003
431 #define PHY_UID_TN2020 0x00a19410
432 #define PHY_UID_IN112525_S03 0x02107440
433
434 #endif