include/power/max77693_muic.h

   1 /*
   2  * Copyright (C) 2013 Samsung Electronics
   3  * Piotr Wilczek <p.wilczek@samsung.com>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef __MAX77693_MUIC_H_
   9 #define __MAX77693_MUIC_H_
  10
  11 #include <power/power_chrg.h>
  12
  13 /*
  14  * MUIC REGISTER
  15  */
  16
  17 #define MAX77693_MUIC_PREFIX    "max77693-muic:"
  18
  19 /* MAX77693_MUIC_STATUS1 */
  20 #define MAX77693_MUIC_ADC_MASK  0x1F
  21
  22 /* MAX77693_MUIC_STATUS2 */
  23 #define MAX77693_MUIC_CHG_NO            0x00
  24 #define MAX77693_MUIC_CHG_USB           0x01
  25 #define MAX77693_MUIC_CHG_USB_D         0x02
  26 #define MAX77693_MUIC_CHG_TA            0x03
  27 #define MAX77693_MUIC_CHG_TA_500        0x04
  28 #define MAX77693_MUIC_CHG_TA_1A         0x05
  29 #define MAX77693_MUIC_CHG_MASK          0x07
  30
  31 /* MAX77693_MUIC_CONTROL1 */
  32 #define MAX77693_MUIC_CTRL1_DN1DP2      ((0x1 << 3) | 0x1)
  33 #define MAX77693_MUIC_CTRL1_UT1UR2      ((0x3 << 3) | 0x3)
  34 #define MAX77693_MUIC_CTRL1_ADN1ADP2    ((0x4 << 3) | 0x4)
  35 #define MAX77693_MUIC_CTRL1_AUT1AUR2    ((0x5 << 3) | 0x5)
  36 #define MAX77693_MUIC_CTRL1_MASK        0xC0
  37
  38 #define MUIC_PATH_USB   0
  39 #define MUIC_PATH_UART  1
  40
  41 #define MUIC_PATH_CP    0
  42 #define MUIC_PATH_AP    1
  43
  44 enum muic_path {
  45         MUIC_PATH_USB_CP,
  46         MUIC_PATH_USB_AP,
  47         MUIC_PATH_UART_CP,
  48         MUIC_PATH_UART_AP,
  49 };
  50
  51 /* MAX 777693 MUIC registers */
  52 enum {
  53         MAX77693_MUIC_ID        = 0x00,
  54         MAX77693_MUIC_INT1      = 0x01,
  55         MAX77693_MUIC_INT2      = 0x02,
  56         MAX77693_MUIC_INT3      = 0x03,
  57         MAX77693_MUIC_STATUS1   = 0x04,
  58         MAX77693_MUIC_STATUS2   = 0x05,
  59         MAX77693_MUIC_STATUS3   = 0x06,
  60         MAX77693_MUIC_INTMASK1  = 0x07,
  61         MAX77693_MUIC_INTMASK2  = 0x08,
  62         MAX77693_MUIC_INTMASK3  = 0x09,
  63         MAX77693_MUIC_CDETCTRL  = 0x0A,
  64         MAX77693_MUIC_CONTROL1  = 0x0C,
  65         MAX77693_MUIC_CONTROL2  = 0x0D,
  66         MAX77693_MUIC_CONTROL3  = 0x0E,
  67
  68         MUIC_NUM_OF_REGS        = 0x0F,
  69 };
  70
  71 #define MAX77693_MUIC_I2C_ADDR  (0x4A >> 1)
  72
  73 int power_muic_init(unsigned int bus);
  74 #endif /* __MAX77693_MUIC_H_ */