include/ppc_asm.tmpl

   1 /*
   2  * (C) Copyright 2000-2002
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 /*
   9  * This file contains all the macros and symbols which define
  10  * a PowerPC assembly language environment.
  11  */
  12 #ifndef __PPC_ASM_TMPL__
  13 #define __PPC_ASM_TMPL__
  14
  15 #include <config.h>
  16
  17 /***************************************************************************
  18  *
  19  * These definitions simplify the ugly declarations necessary for GOT
  20  * definitions.
  21  *
  22  * Stolen from prepboot/bootldr.h, (C) 1998 Gabriel Paubert, paubert@iram.es
  23  *
  24  * Uses r12 to access the GOT
  25  */
  26
  27 #define START_GOT                       \
  28         .section        ".got2","aw";   \
  29 .LCTOC1 = .+32768
  30
  31 #define END_GOT                         \
  32         .text
  33
  34 #define GET_GOT                         \
  35         bl      1f              ;       \
  36         .text   2               ;       \
  37 0:      .long   .LCTOC1-1f      ;       \
  38         .text                   ;       \
  39 1:      mflr    r12             ;       \
  40         lwz     r0,0b-1b(r12)   ;       \
  41         add     r12,r0,r12      ;
  42
  43 #define GOT_ENTRY(NAME)         .L_ ## NAME = . - .LCTOC1 ; .long NAME
  44
  45 #define GOT(NAME)               .L_ ## NAME (r12)
  46
  47
  48 /***************************************************************************
  49  * Register names
  50  */
  51 #define r0      0
  52 #define r1      1
  53 #define r2      2
  54 #define r3      3
  55 #define r4      4
  56 #define r5      5
  57 #define r6      6
  58 #define r7      7
  59 #define r8      8
  60 #define r9      9
  61 #define r10     10
  62 #define r11     11
  63 #define r12     12
  64 #define r13     13
  65 #define r14     14
  66 #define r15     15
  67 #define r16     16
  68 #define r17     17
  69 #define r18     18
  70 #define r19     19
  71 #define r20     20
  72 #define r21     21
  73 #define r22     22
  74 #define r23     23
  75 #define r24     24
  76 #define r25     25
  77 #define r26     26
  78 #define r27     27
  79 #define r28     28
  80 #define r29     29
  81 #define r30     30
  82 #define r31     31
  83
  84
  85 #if  defined(CONFIG_5xx)
  86 /* Some special purpose registers */
  87 #define DER     149             /* Debug Enable Register                */
  88 #define COUNTA  150             /* Breakpoint Counter                   */
  89 #define COUNTB  151             /* Breakpoint Counter                   */
  90 #define LCTRL1  156             /* Load/Store Support                   */
  91 #define LCTRL2  157             /* Load/Store Support                   */
  92 #define ICTRL   158             /* I-Bus Support Control Register       */
  93 #define EID     81
  94 #endif  /* CONFIG_5xx */
  95
  96 #if defined(CONFIG_MPC8260)
  97
  98 #define HID2            1011
  99
 100 #define HID0_IFEM       (1<<7)
 101
 102 #define HID0_ICE_BITPOS 16
 103 #define HID0_DCE_BITPOS 17
 104
 105 #define IM_REGBASE      0x10000
 106 #define IM_SYPCR        (IM_REGBASE+0x0004)
 107 #define IM_SWSR         (IM_REGBASE+0x000e)
 108 #define IM_BR0          (IM_REGBASE+0x0100)
 109 #define IM_OR0          (IM_REGBASE+0x0104)
 110 #define IM_BR1          (IM_REGBASE+0x0108)
 111 #define IM_OR1          (IM_REGBASE+0x010c)
 112 #define IM_BR2          (IM_REGBASE+0x0110)
 113 #define IM_OR2          (IM_REGBASE+0x0114)
 114 #define IM_MPTPR        (IM_REGBASE+0x0184)
 115 #define IM_PSDMR        (IM_REGBASE+0x0190)
 116 #define IM_PSRT         (IM_REGBASE+0x019c)
 117 #define IM_IMMR         (IM_REGBASE+0x01a8)
 118 #define IM_SCCR         (IM_REGBASE+0x0c80)
 119
 120 #elif defined(CONFIG_MPC5xxx)
 121
 122 #define HID0_ICE_BITPOS 16
 123 #define HID0_DCE_BITPOS 17
 124
 125 #endif
 126
 127 #define curptr r2
 128
 129 #define SYNC \
 130         sync; \
 131         isync
 132
 133 /*
 134  * Macros for storing registers into and loading registers from
 135  * exception frames.
 136  */
 137 #define SAVE_GPR(n, base)       stw     n,GPR0+4*(n)(base)
 138 #define SAVE_2GPRS(n, base)     SAVE_GPR(n, base); SAVE_GPR(n+1, base)
 139 #define SAVE_4GPRS(n, base)     SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
 140 #define SAVE_8GPRS(n, base)     SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
 141 #define SAVE_10GPRS(n, base)    SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base)
 142 #define REST_GPR(n, base)       lwz     n,GPR0+4*(n)(base)
 143 #define REST_2GPRS(n, base)     REST_GPR(n, base); REST_GPR(n+1, base)
 144 #define REST_4GPRS(n, base)     REST_2GPRS(n, base); REST_2GPRS(n+2, base)
 145 #define REST_8GPRS(n, base)     REST_4GPRS(n, base); REST_4GPRS(n+4, base)
 146 #define REST_10GPRS(n, base)    REST_8GPRS(n, base); REST_2GPRS(n+8, base)
 147
 148 /*
 149  * GCC sometimes accesses words at negative offsets from the stack
 150  * pointer, although the SysV ABI says it shouldn't.  To cope with
 151  * this, we leave this much untouched space on the stack on exception
 152  * entry.
 153  */
 154 #define STACK_UNDERHEAD 64
 155
 156 /*
 157  * Exception entry code.  This code runs with address translation
 158  * turned off, i.e. using physical addresses.
 159  * We assume sprg3 has the physical address of the current
 160  * task's thread_struct.
 161  */
 162 #define EXCEPTION_PROLOG(reg1, reg2)    \
 163         mtspr   SPRG0,r20;      \
 164         mtspr   SPRG1,r21;      \
 165         mfcr    r20;            \
 166         subi    r21,r1,INT_FRAME_SIZE+STACK_UNDERHEAD;  /* alloc exc. frame */\
 167         stw     r20,_CCR(r21);          /* save registers */ \
 168         stw     r22,GPR22(r21); \
 169         stw     r23,GPR23(r21); \
 170         mfspr   r20,SPRG0;      \
 171         stw     r20,GPR20(r21); \
 172         mfspr   r22,SPRG1;      \
 173         stw     r22,GPR21(r21); \
 174         mflr    r20;            \
 175         stw     r20,_LINK(r21); \
 176         mfctr   r22;            \
 177         stw     r22,_CTR(r21);  \
 178         mfspr   r20,XER;        \
 179         stw     r20,_XER(r21);  \
 180         mfspr   r20, DAR_DEAR;  \
 181         stw     r20,_DAR(r21);  \
 182         mfspr   r22,reg1;       \
 183         mfspr   r23,reg2;       \
 184         stw     r0,GPR0(r21);   \
 185         stw     r1,GPR1(r21);   \
 186         stw     r2,GPR2(r21);   \
 187         stw     r1,0(r21);      \
 188         mr      r1,r21;                 /* set new kernel sp */ \
 189         SAVE_4GPRS(3, r21);
 190 /*
 191  * Note: code which follows this uses cr0.eq (set if from kernel),
 192  * r21, r22 (SRR0), and r23 (SRR1).
 193  */
 194
 195 /*
 196  * Exception vectors.
 197  *
 198  * The data words for `hdlr' and `int_return' are initialized with
 199  * OFFSET values only; they must be relocated first before they can
 200  * be used!
 201  */
 202 #define COPY_EE(d, s)           rlwimi d,s,0,16,16
 203 #define NOCOPY(d, s)
 204
 205 #ifdef CONFIG_E500
 206 #define EXC_XFER_TEMPLATE(n, label, hdlr, msr, copyee)  \
 207         stw     r22,_NIP(r21);                          \
 208         stw     r23,_MSR(r21);                          \
 209         li      r23,n;                                  \
 210         stw     r23,TRAP(r21);                          \
 211         li      r20,msr;                                \
 212         copyee(r20,r23);                                \
 213         rlwimi  r20,r23,0,25,25;                        \
 214         mtmsr   r20;                                    \
 215         bl      1f;                                     \
 216 1:      mflr    r23;                                    \
 217         addis   r23,r23,(hdlr - 1b)@ha;                 \
 218         addi    r23,r23,(hdlr - 1b)@l;                  \
 219         b       transfer_to_handler
 220
 221 #define STD_EXCEPTION(n, label, hdlr)                           \
 222 .align 4;                                                       \
 223 label:                                                          \
 224         EXCEPTION_PROLOG(SRR0, SRR1);                           \
 225         addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
 226         EXC_XFER_TEMPLATE(n, label, hdlr, MSR_KERNEL, NOCOPY)   \
 227
 228 #define CRIT_EXCEPTION(n, label, hdlr)                          \
 229 .align 4;                                                       \
 230 label:                                                          \
 231         EXCEPTION_PROLOG(CSRR0, CSRR1);                         \
 232         addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
 233         EXC_XFER_TEMPLATE(n, label, hdlr,                       \
 234         MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY)           \
 235
 236 #define MCK_EXCEPTION(n, label, hdlr)                           \
 237 .align 4;                                                       \
 238 label:                                                          \
 239         EXCEPTION_PROLOG(MCSRR0, MCSRR1);                       \
 240         addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
 241         EXC_XFER_TEMPLATE(n, label, hdlr,                       \
 242         MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY)           \
 243
 244 #else   /* !E500 */
 245
 246 #define EXC_XFER_TEMPLATE(label, hdlr, msr, copyee)     \
 247         bl      1f;                                     \
 248 1:      mflr    r20;                                    \
 249         lwz     r20,(.L_ ## label)-1b+8(r20);           \
 250         mtlr    r20;                                    \
 251         li      r20,msr;                                \
 252         copyee(r20,r23);                                \
 253         rlwimi  r20,r23,0,25,25;                        \
 254         blrl;                                           \
 255 .L_ ## label :                                          \
 256         .long   hdlr - _start + _START_OFFSET;          \
 257         .long   int_return - _start + _START_OFFSET;    \
 258         .long   transfer_to_handler - _start + _START_OFFSET
 259
 260 #define STD_EXCEPTION(n, label, hdlr)                           \
 261         . = n;                                                  \
 262 label:                                                          \
 263         EXCEPTION_PROLOG(SRR0, SRR1);                           \
 264         addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
 265         EXC_XFER_TEMPLATE(label, hdlr, MSR_KERNEL, NOCOPY)      \
 266
 267 #define CRIT_EXCEPTION(n, label, hdlr)                          \
 268         . = n;                                                  \
 269 label:                                                          \
 270         EXCEPTION_PROLOG(CSRR0, CSRR1);                         \
 271         addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
 272         EXC_XFER_TEMPLATE(label, hdlr,                          \
 273         MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY)           \
 274
 275 #define MCK_EXCEPTION(n, label, hdlr)                           \
 276         . = n;                                                  \
 277 label:                                                          \
 278         EXCEPTION_PROLOG(MCSRR0, MCSRR1);                       \
 279         addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
 280         EXC_XFER_TEMPLATE(label, hdlr,                          \
 281         MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY)           \
 282
 283 #endif  /* !E500 */
 284 #endif  /* __PPC_ASM_TMPL__ */