2 * SuperH Pin Function Controller Support
3 * Copy from Linux kernel. (include/linux/sh_pfc.h)
5 * Copyright (c) 2008 Magnus Damm
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
15 typedef unsigned short pinmux_enum_t
;
16 typedef unsigned short pinmux_flag_t
;
18 #define PINMUX_TYPE_NONE 0
19 #define PINMUX_TYPE_FUNCTION 1
20 #define PINMUX_TYPE_GPIO 2
21 #define PINMUX_TYPE_OUTPUT 3
22 #define PINMUX_TYPE_INPUT 4
23 #define PINMUX_TYPE_INPUT_PULLUP 5
24 #define PINMUX_TYPE_INPUT_PULLDOWN 6
26 #define PINMUX_FLAG_TYPE (0x7)
27 #define PINMUX_FLAG_WANT_PULLUP (1 << 3)
28 #define PINMUX_FLAG_WANT_PULLDOWN (1 << 4)
30 #define PINMUX_FLAG_DBIT_SHIFT 5
31 #define PINMUX_FLAG_DBIT (0x1f << PINMUX_FLAG_DBIT_SHIFT)
32 #define PINMUX_FLAG_DREG_SHIFT 10
33 #define PINMUX_FLAG_DREG (0x3f << PINMUX_FLAG_DREG_SHIFT)
36 pinmux_enum_t enum_id
;
40 #define PINMUX_GPIO(gpio, data_or_mark)[gpio] = { data_or_mark }
41 #define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
43 struct pinmux_cfg_reg
{
44 unsigned long reg
, reg_width
, field_width
;
46 pinmux_enum_t
*enum_ids
;
47 unsigned long *var_field_width
;
50 #define PINMUX_CFG_REG(name, r, r_width, f_width) \
51 .reg = r, .reg_width = r_width, .field_width = f_width, \
52 .cnt = (unsigned long [r_width / f_width]) {}, \
53 .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)])
55 #define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \
56 .reg = r, .reg_width = r_width, \
57 .cnt = (unsigned long [r_width]) {}, \
58 .var_field_width = (unsigned long [r_width]) { var_fw0, var_fwn, 0 }, \
59 .enum_ids = (pinmux_enum_t [])
61 struct pinmux_data_reg
{
62 unsigned long reg
, reg_width
, reg_shadow
;
63 pinmux_enum_t
*enum_ids
;
67 #define PINMUX_DATA_REG(name, r, r_width) \
68 .reg = r, .reg_width = r_width, \
69 .enum_ids = (pinmux_enum_t [r_width]) \
73 pinmux_enum_t
*enum_ids
;
76 #define PINMUX_IRQ(irq_nr, ids...) \
77 { .irq = irq_nr, .enum_ids = (pinmux_enum_t []) { ids, 0 } } \
87 pinmux_enum_t reserved_id
;
88 struct pinmux_range data
;
89 struct pinmux_range input
;
90 struct pinmux_range input_pd
;
91 struct pinmux_range input_pu
;
92 struct pinmux_range output
;
93 struct pinmux_range mark
;
94 struct pinmux_range function
;
96 unsigned first_gpio
, last_gpio
;
98 struct pinmux_gpio
*gpios
;
99 struct pinmux_cfg_reg
*cfg_regs
;
100 struct pinmux_data_reg
*data_regs
;
102 pinmux_enum_t
*gpio_data
;
103 unsigned int gpio_data_size
;
105 struct pinmux_irq
*gpio_irq
;
106 unsigned int gpio_irq_size
;
108 struct resource
*resource
;
109 unsigned int num_resources
;
110 unsigned long unlock_reg
;
113 int register_pinmux(struct pinmux_info
*pip
);
114 int unregister_pinmux(struct pinmux_info
*pip
);
116 /* helper macro for port */
117 #define PORT_1(fn, pfx, sfx) fn(pfx, sfx)
119 #define PORT_10(fn, pfx, sfx) \
120 PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \
121 PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \
122 PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \
123 PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \
124 PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)
126 #define PORT_90(fn, pfx, sfx) \
127 PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx), \
128 PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx), \
129 PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx), \
130 PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx), \
131 PORT_10(fn, pfx##9, sfx)
133 #define _PORT_ALL(pfx, sfx) pfx##_##sfx
134 #define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
135 #define PORT_ALL(str) CPU_ALL_PORT(_PORT_ALL, PORT, str)
136 #define GPIO_PORT_ALL() CPU_ALL_PORT(_GPIO_PORT, , unused)
137 #define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
139 /* helper macro for pinmux_enum_t */
140 #define PORT_DATA_I(nr) \
141 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
143 #define PORT_DATA_I_PD(nr) \
144 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
145 PORT##nr##_IN, PORT##nr##_IN_PD)
147 #define PORT_DATA_I_PU(nr) \
148 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
149 PORT##nr##_IN, PORT##nr##_IN_PU)
151 #define PORT_DATA_I_PU_PD(nr) \
152 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
153 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
155 #define PORT_DATA_O(nr) \
156 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
158 #define PORT_DATA_IO(nr) \
159 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
162 #define PORT_DATA_IO_PD(nr) \
163 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
164 PORT##nr##_IN, PORT##nr##_IN_PD)
166 #define PORT_DATA_IO_PU(nr) \
167 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
168 PORT##nr##_IN, PORT##nr##_IN_PU)
170 #define PORT_DATA_IO_PU_PD(nr) \
171 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
172 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
174 /* helper macro for top 4 bits in PORTnCR */
175 #define _PCRH(in, in_pd, in_pu, out) \
181 #define PORTCR(nr, reg) \
183 PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
184 _PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
185 PORT##nr##_IN_PU, PORT##nr##_OUT), \
186 PORT##nr##_FN0, PORT##nr##_FN1, \
187 PORT##nr##_FN2, PORT##nr##_FN3, \
188 PORT##nr##_FN4, PORT##nr##_FN5, \
189 PORT##nr##_FN6, PORT##nr##_FN7 } \
192 #endif /* __SH_PFC_H */