include/soc/tegra/mc.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (C) 2014 NVIDIA Corporation
   4  */
   5
   6 #ifndef __SOC_TEGRA_MC_H__
   7 #define __SOC_TEGRA_MC_H__
   8
   9 #include <linux/bits.h>
  10 #include <linux/debugfs.h>
  11 #include <linux/err.h>
  12 #include <linux/interconnect-provider.h>
  13 #include <linux/irq.h>
  14 #include <linux/reset-controller.h>
  15 #include <linux/types.h>
  16 #include <linux/tegra-icc.h>
  17
  18 struct clk;
  19 struct device;
  20 struct page;
  21
  22 struct tegra_mc_timing {
  23         unsigned long rate;
  24
  25         u32 *emem_data;
  26 };
  27
  28 struct tegra_mc_client {
  29         unsigned int id;
  30         unsigned int bpmp_id;
  31         enum tegra_icc_client_type type;
  32         const char *name;
  33         /*
  34          * For Tegra210 and earlier, this is the SWGROUP ID used for IOVA translations in the
  35          * Tegra SMMU, whereas on Tegra186 and later this is the ID used to override the ARM SMMU
  36          * stream ID used for IOVA translations for the given memory client.
  37          */
  38         union {
  39                 unsigned int swgroup;
  40                 unsigned int sid;
  41         };
  42
  43         unsigned int fifo_size;
  44
  45         struct {
  46                 /* Tegra SMMU enable (Tegra210 and earlier) */
  47                 struct {
  48                         unsigned int reg;
  49                         unsigned int bit;
  50                 } smmu;
  51
  52                 /* latency allowance */
  53                 struct {
  54                         unsigned int reg;
  55                         unsigned int shift;
  56                         unsigned int mask;
  57                         unsigned int def;
  58                 } la;
  59
  60                 /* stream ID overrides (Tegra186 and later) */
  61                 struct {
  62                         unsigned int override;
  63                         unsigned int security;
  64                 } sid;
  65         } regs;
  66 };
  67
  68 struct tegra_smmu_swgroup {
  69         const char *name;
  70         unsigned int swgroup;
  71         unsigned int reg;
  72 };
  73
  74 struct tegra_smmu_group_soc {
  75         const char *name;
  76         const unsigned int *swgroups;
  77         unsigned int num_swgroups;
  78 };
  79
  80 struct tegra_smmu_soc {
  81         const struct tegra_mc_client *clients;
  82         unsigned int num_clients;
  83
  84         const struct tegra_smmu_swgroup *swgroups;
  85         unsigned int num_swgroups;
  86
  87         const struct tegra_smmu_group_soc *groups;
  88         unsigned int num_groups;
  89
  90         bool supports_round_robin_arbitration;
  91         bool supports_request_limit;
  92
  93         unsigned int num_tlb_lines;
  94         unsigned int num_asids;
  95 };
  96
  97 struct tegra_mc;
  98 struct tegra_smmu;
  99 struct gart_device;
 100
 101 #ifdef CONFIG_TEGRA_IOMMU_SMMU
 102 struct tegra_smmu *tegra_smmu_probe(struct device *dev,
 103                                     const struct tegra_smmu_soc *soc,
 104                                     struct tegra_mc *mc);
 105 void tegra_smmu_remove(struct tegra_smmu *smmu);
 106 #else
 107 static inline struct tegra_smmu *
 108 tegra_smmu_probe(struct device *dev, const struct tegra_smmu_soc *soc,
 109                  struct tegra_mc *mc)
 110 {
 111         return NULL;
 112 }
 113
 114 static inline void tegra_smmu_remove(struct tegra_smmu *smmu)
 115 {
 116 }
 117 #endif
 118
 119 #ifdef CONFIG_TEGRA_IOMMU_GART
 120 struct gart_device *tegra_gart_probe(struct device *dev, struct tegra_mc *mc);
 121 int tegra_gart_suspend(struct gart_device *gart);
 122 int tegra_gart_resume(struct gart_device *gart);
 123 #else
 124 static inline struct gart_device *
 125 tegra_gart_probe(struct device *dev, struct tegra_mc *mc)
 126 {
 127         return ERR_PTR(-ENODEV);
 128 }
 129
 130 static inline int tegra_gart_suspend(struct gart_device *gart)
 131 {
 132         return -ENODEV;
 133 }
 134
 135 static inline int tegra_gart_resume(struct gart_device *gart)
 136 {
 137         return -ENODEV;
 138 }
 139 #endif
 140
 141 struct tegra_mc_reset {
 142         const char *name;
 143         unsigned long id;
 144         unsigned int control;
 145         unsigned int status;
 146         unsigned int reset;
 147         unsigned int bit;
 148 };
 149
 150 struct tegra_mc_reset_ops {
 151         int (*hotreset_assert)(struct tegra_mc *mc,
 152                                const struct tegra_mc_reset *rst);
 153         int (*hotreset_deassert)(struct tegra_mc *mc,
 154                                  const struct tegra_mc_reset *rst);
 155         int (*block_dma)(struct tegra_mc *mc,
 156                          const struct tegra_mc_reset *rst);
 157         bool (*dma_idling)(struct tegra_mc *mc,
 158                            const struct tegra_mc_reset *rst);
 159         int (*unblock_dma)(struct tegra_mc *mc,
 160                            const struct tegra_mc_reset *rst);
 161         int (*reset_status)(struct tegra_mc *mc,
 162                             const struct tegra_mc_reset *rst);
 163 };
 164
 165 #define TEGRA_MC_ICC_TAG_DEFAULT                                0
 166 #define TEGRA_MC_ICC_TAG_ISO                                    BIT(0)
 167
 168 struct tegra_mc_icc_ops {
 169         int (*set)(struct icc_node *src, struct icc_node *dst);
 170         int (*aggregate)(struct icc_node *node, u32 tag, u32 avg_bw,
 171                          u32 peak_bw, u32 *agg_avg, u32 *agg_peak);
 172         struct icc_node* (*xlate)(struct of_phandle_args *spec, void *data);
 173         struct icc_node_data *(*xlate_extended)(struct of_phandle_args *spec,
 174                                                 void *data);
 175         int (*get_bw)(struct icc_node *node, u32 *avg, u32 *peak);
 176 };
 177
 178 struct tegra_mc_ops {
 179         /*
 180          * @probe: Callback to set up SoC-specific bits of the memory controller. This is called
 181          * after basic, common set up that is done by the SoC-agnostic bits.
 182          */
 183         int (*probe)(struct tegra_mc *mc);
 184         void (*remove)(struct tegra_mc *mc);
 185         int (*suspend)(struct tegra_mc *mc);
 186         int (*resume)(struct tegra_mc *mc);
 187         irqreturn_t (*handle_irq)(int irq, void *data);
 188         int (*probe_device)(struct tegra_mc *mc, struct device *dev);
 189 };
 190
 191 struct tegra_mc_soc {
 192         const struct tegra_mc_client *clients;
 193         unsigned int num_clients;
 194
 195         const unsigned long *emem_regs;
 196         unsigned int num_emem_regs;
 197
 198         unsigned int num_address_bits;
 199         unsigned int atom_size;
 200
 201         unsigned int num_carveouts;
 202
 203         u16 client_id_mask;
 204         u8 num_channels;
 205
 206         const struct tegra_smmu_soc *smmu;
 207
 208         u32 intmask;
 209         u32 ch_intmask;
 210         u32 global_intstatus_channel_shift;
 211         bool has_addr_hi_reg;
 212
 213         const struct tegra_mc_reset_ops *reset_ops;
 214         const struct tegra_mc_reset *resets;
 215         unsigned int num_resets;
 216
 217         const struct tegra_mc_icc_ops *icc_ops;
 218         const struct tegra_mc_ops *ops;
 219 };
 220
 221 struct tegra_mc {
 222         struct tegra_bpmp *bpmp;
 223         struct device *dev;
 224         struct tegra_smmu *smmu;
 225         struct gart_device *gart;
 226         void __iomem *regs;
 227         void __iomem *bcast_ch_regs;
 228         void __iomem **ch_regs;
 229         struct clk *clk;
 230         int irq;
 231
 232         const struct tegra_mc_soc *soc;
 233         unsigned long tick;
 234
 235         struct tegra_mc_timing *timings;
 236         unsigned int num_timings;
 237         unsigned int num_channels;
 238
 239         bool bwmgr_mrq_supported;
 240         struct reset_controller_dev reset;
 241
 242         struct icc_provider provider;
 243
 244         spinlock_t lock;
 245
 246         struct {
 247                 struct dentry *root;
 248         } debugfs;
 249 };
 250
 251 int tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate);
 252 unsigned int tegra_mc_get_emem_device_count(struct tegra_mc *mc);
 253
 254 #ifdef CONFIG_TEGRA_MC
 255 struct tegra_mc *devm_tegra_memory_controller_get(struct device *dev);
 256 int tegra_mc_probe_device(struct tegra_mc *mc, struct device *dev);
 257 int tegra_mc_get_carveout_info(struct tegra_mc *mc, unsigned int id,
 258                                phys_addr_t *base, u64 *size);
 259 #else
 260 static inline struct tegra_mc *
 261 devm_tegra_memory_controller_get(struct device *dev)
 262 {
 263         return ERR_PTR(-ENODEV);
 264 }
 265
 266 static inline int
 267 tegra_mc_probe_device(struct tegra_mc *mc, struct device *dev)
 268 {
 269         return -ENODEV;
 270 }
 271
 272 static inline int
 273 tegra_mc_get_carveout_info(struct tegra_mc *mc, unsigned int id,
 274                            phys_addr_t *base, u64 *size)
 275 {
 276         return -ENODEV;
 277 }
 278 #endif
 279
 280 #endif /* __SOC_TEGRA_MC_H__ */