2 * Copyright (c) 2012-2016 VMware, Inc. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of EITHER the GNU General Public License
6 * version 2 as published by the Free Software Foundation or the BSD
7 * 2-Clause License. This program is distributed in the hope that it
8 * will be useful, but WITHOUT ANY WARRANTY; WITHOUT EVEN THE IMPLIED
9 * WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
10 * See the GNU General Public License version 2 for more details at
11 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html.
13 * You should have received a copy of the GNU General Public License
14 * along with this program available in the file COPYING in the main
15 * directory of this source tree.
17 * The BSD 2-Clause License
19 * Redistribution and use in source and binary forms, with or
20 * without modification, are permitted provided that the following
23 * - Redistributions of source code must retain the above
24 * copyright notice, this list of conditions and the following
27 * - Redistributions in binary form must reproduce the above
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32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
33 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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35 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
36 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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38 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
39 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
41 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
42 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
43 * OF THE POSSIBILITY OF SUCH DAMAGE.
46 #ifndef __PVRDMA_DEV_API_H__
47 #define __PVRDMA_DEV_API_H__
49 #include "standard-headers/linux/types.h"
51 #include "pvrdma_verbs.h"
54 * PVRDMA version macros. Some new features require updates to PVRDMA_VERSION.
55 * These macros allow us to check for different features if necessary.
58 #define PVRDMA_ROCEV1_VERSION 17
59 #define PVRDMA_ROCEV2_VERSION 18
60 #define PVRDMA_PPN64_VERSION 19
61 #define PVRDMA_VERSION PVRDMA_PPN64_VERSION
63 #define PVRDMA_BOARD_ID 1
64 #define PVRDMA_REV_ID 1
67 * Masks and accessors for page directory, which is a two-level lookup:
68 * page directory -> page table -> page. Only one directory for now, but we
69 * could expand that easily. 9 bits for tables, 9 bits for pages, gives one
70 * gigabyte for memory regions and so forth.
73 #define PVRDMA_PDIR_SHIFT 18
74 #define PVRDMA_PTABLE_SHIFT 9
75 #define PVRDMA_PAGE_DIR_DIR(x) (((x) >> PVRDMA_PDIR_SHIFT) & 0x1)
76 #define PVRDMA_PAGE_DIR_TABLE(x) (((x) >> PVRDMA_PTABLE_SHIFT) & 0x1ff)
77 #define PVRDMA_PAGE_DIR_PAGE(x) ((x) & 0x1ff)
78 #define PVRDMA_PAGE_DIR_MAX_PAGES (1 * 512 * 512)
79 #define PVRDMA_MAX_FAST_REG_PAGES 128
85 #define PVRDMA_MAX_INTERRUPTS 3
87 /* Register offsets within PCI resource on BAR1. */
88 #define PVRDMA_REG_VERSION 0x00 /* R: Version of device. */
89 #define PVRDMA_REG_DSRLOW 0x04 /* W: Device shared region low PA. */
90 #define PVRDMA_REG_DSRHIGH 0x08 /* W: Device shared region high PA. */
91 #define PVRDMA_REG_CTL 0x0c /* W: PVRDMA_DEVICE_CTL */
92 #define PVRDMA_REG_REQUEST 0x10 /* W: Indicate device request. */
93 #define PVRDMA_REG_ERR 0x14 /* R: Device error. */
94 #define PVRDMA_REG_ICR 0x18 /* R: Interrupt cause. */
95 #define PVRDMA_REG_IMR 0x1c /* R/W: Interrupt mask. */
96 #define PVRDMA_REG_MACL 0x20 /* R/W: MAC address low. */
97 #define PVRDMA_REG_MACH 0x24 /* R/W: MAC address high. */
100 #define PVRDMA_CQ_FLAG_ARMED_SOL BIT(0) /* Armed for solicited-only. */
101 #define PVRDMA_CQ_FLAG_ARMED BIT(1) /* Armed. */
102 #define PVRDMA_MR_FLAG_DMA BIT(0) /* DMA region. */
103 #define PVRDMA_MR_FLAG_FRMR BIT(1) /* Fast reg memory region. */
106 * Atomic operation capability (masked versions are extended atomic
110 #define PVRDMA_ATOMIC_OP_COMP_SWAP BIT(0) /* Compare and swap. */
111 #define PVRDMA_ATOMIC_OP_FETCH_ADD BIT(1) /* Fetch and add. */
112 #define PVRDMA_ATOMIC_OP_MASK_COMP_SWAP BIT(2) /* Masked compare and swap. */
113 #define PVRDMA_ATOMIC_OP_MASK_FETCH_ADD BIT(3) /* Masked fetch and add. */
116 * Base Memory Management Extension flags to support Fast Reg Memory Regions
117 * and Fast Reg Work Requests. Each flag represents a verb operation and we
118 * must support all of them to qualify for the BMME device cap.
121 #define PVRDMA_BMME_FLAG_LOCAL_INV BIT(0) /* Local Invalidate. */
122 #define PVRDMA_BMME_FLAG_REMOTE_INV BIT(1) /* Remote Invalidate. */
123 #define PVRDMA_BMME_FLAG_FAST_REG_WR BIT(2) /* Fast Reg Work Request. */
126 * GID types. The interpretation of the gid_types bit field in the device
127 * capabilities will depend on the device mode. For now, the device only
128 * supports RoCE as mode, so only the different GID types for RoCE are
132 #define PVRDMA_GID_TYPE_FLAG_ROCE_V1 BIT(0)
133 #define PVRDMA_GID_TYPE_FLAG_ROCE_V2 BIT(1)
136 * Version checks. This checks whether each version supports specific
137 * capabilities from the device.
140 #define PVRDMA_IS_VERSION17(_dev) \
141 (_dev->dsr_version == PVRDMA_ROCEV1_VERSION && \
142 _dev->dsr->caps.gid_types == PVRDMA_GID_TYPE_FLAG_ROCE_V1)
144 #define PVRDMA_IS_VERSION18(_dev) \
145 (_dev->dsr_version >= PVRDMA_ROCEV2_VERSION && \
146 (_dev->dsr->caps.gid_types == PVRDMA_GID_TYPE_FLAG_ROCE_V1 || \
147 _dev->dsr->caps.gid_types == PVRDMA_GID_TYPE_FLAG_ROCE_V2)) \
149 #define PVRDMA_SUPPORTED(_dev) \
150 ((_dev->dsr->caps.mode == PVRDMA_DEVICE_MODE_ROCE) && \
151 (PVRDMA_IS_VERSION17(_dev) || PVRDMA_IS_VERSION18(_dev)))
154 * Get capability values based on device version.
157 #define PVRDMA_GET_CAP(_dev, _old_val, _val) \
158 ((PVRDMA_IS_VERSION18(_dev)) ? _val : _old_val)
160 enum pvrdma_pci_resource
{
161 PVRDMA_PCI_RESOURCE_MSIX
, /* BAR0: MSI-X, MMIO. */
162 PVRDMA_PCI_RESOURCE_REG
, /* BAR1: Registers, MMIO. */
163 PVRDMA_PCI_RESOURCE_UAR
, /* BAR2: UAR pages, MMIO, 64-bit. */
164 PVRDMA_PCI_RESOURCE_LAST
, /* Last. */
167 enum pvrdma_device_ctl
{
168 PVRDMA_DEVICE_CTL_ACTIVATE
, /* Activate device. */
169 PVRDMA_DEVICE_CTL_UNQUIESCE
, /* Unquiesce device. */
170 PVRDMA_DEVICE_CTL_RESET
, /* Reset device. */
173 enum pvrdma_intr_vector
{
174 PVRDMA_INTR_VECTOR_RESPONSE
, /* Command response. */
175 PVRDMA_INTR_VECTOR_ASYNC
, /* Async events. */
176 PVRDMA_INTR_VECTOR_CQ
, /* CQ notification. */
177 /* Additional CQ notification vectors. */
180 enum pvrdma_intr_cause
{
181 PVRDMA_INTR_CAUSE_RESPONSE
= (1 << PVRDMA_INTR_VECTOR_RESPONSE
),
182 PVRDMA_INTR_CAUSE_ASYNC
= (1 << PVRDMA_INTR_VECTOR_ASYNC
),
183 PVRDMA_INTR_CAUSE_CQ
= (1 << PVRDMA_INTR_VECTOR_CQ
),
186 enum pvrdma_gos_bits
{
187 PVRDMA_GOS_BITS_UNK
, /* Unknown. */
188 PVRDMA_GOS_BITS_32
, /* 32-bit. */
189 PVRDMA_GOS_BITS_64
, /* 64-bit. */
192 enum pvrdma_gos_type
{
193 PVRDMA_GOS_TYPE_UNK
, /* Unknown. */
194 PVRDMA_GOS_TYPE_LINUX
, /* Linux. */
197 enum pvrdma_device_mode
{
198 PVRDMA_DEVICE_MODE_ROCE
, /* RoCE. */
199 PVRDMA_DEVICE_MODE_IWARP
, /* iWarp. */
200 PVRDMA_DEVICE_MODE_IB
, /* InfiniBand. */
203 struct pvrdma_gos_info
{
204 uint32_t gos_bits
:2; /* W: PVRDMA_GOS_BITS_ */
205 uint32_t gos_type
:4; /* W: PVRDMA_GOS_TYPE_ */
206 uint32_t gos_ver
:16; /* W: Guest OS version. */
207 uint32_t gos_misc
:10; /* W: Other. */
208 uint32_t pad
; /* Pad to 8-byte alignment. */
211 struct pvrdma_device_caps
{
212 uint64_t fw_ver
; /* R: Query device. */
214 uint64_t sys_image_guid
;
215 uint64_t max_mr_size
;
216 uint64_t page_size_cap
;
217 uint64_t atomic_arg_sizes
; /* EX verbs. */
218 uint32_t ex_comp_mask
; /* EX verbs. */
219 uint32_t device_cap_flags2
; /* EX verbs. */
220 uint32_t max_fa_bit_boundary
; /* EX verbs. */
221 uint32_t log_max_atomic_inline_arg
; /* EX verbs. */
223 uint32_t vendor_part_id
;
227 uint32_t device_cap_flags
;
234 uint32_t max_qp_rd_atom
;
235 uint32_t max_ee_rd_atom
;
236 uint32_t max_res_rd_atom
;
237 uint32_t max_qp_init_rd_atom
;
238 uint32_t max_ee_init_rd_atom
;
242 uint32_t max_raw_ipv6_qp
;
243 uint32_t max_raw_ethy_qp
;
244 uint32_t max_mcast_grp
;
245 uint32_t max_mcast_qp_attach
;
246 uint32_t max_total_mcast_qp_attach
;
249 uint32_t max_map_per_fmr
;
252 uint32_t max_srq_sge
;
254 uint32_t gid_tbl_len
;
256 uint8_t local_ca_ack_delay
;
257 uint8_t phys_port_cnt
;
258 uint8_t mode
; /* PVRDMA_DEVICE_MODE_ */
259 uint8_t atomic_ops
; /* PVRDMA_ATOMIC_OP_* bits */
260 uint8_t bmme_flags
; /* FRWR Mem Mgmt Extensions */
261 uint8_t gid_types
; /* PVRDMA_GID_TYPE_FLAG_ */
262 uint32_t max_fast_reg_page_list_len
;
265 struct pvrdma_ring_page_info
{
266 uint32_t num_pages
; /* Num pages incl. header. */
267 uint32_t reserved
; /* Reserved. */
268 uint64_t pdir_dma
; /* Page directory PA. */
271 #pragma pack(push, 1)
273 struct pvrdma_device_shared_region
{
274 uint32_t driver_version
; /* W: Driver version. */
275 uint32_t pad
; /* Pad to 8-byte align. */
276 struct pvrdma_gos_info gos_info
; /* W: Guest OS information. */
277 uint64_t cmd_slot_dma
; /* W: Command slot address. */
278 uint64_t resp_slot_dma
; /* W: Response slot address. */
279 struct pvrdma_ring_page_info async_ring_pages
;
280 /* W: Async ring page info. */
281 struct pvrdma_ring_page_info cq_ring_pages
;
282 /* W: CQ ring page info. */
284 uint32_t uar_pfn
; /* W: UAR pageframe. */
285 uint64_t uar_pfn64
; /* W: 64-bit UAR page frame. */
287 struct pvrdma_device_caps caps
; /* R: Device capabilities. */
292 /* Event types. Currently a 1:1 mapping with enum ib_event. */
293 enum pvrdma_eqe_type
{
295 PVRDMA_EVENT_QP_FATAL
,
296 PVRDMA_EVENT_QP_REQ_ERR
,
297 PVRDMA_EVENT_QP_ACCESS_ERR
,
298 PVRDMA_EVENT_COMM_EST
,
299 PVRDMA_EVENT_SQ_DRAINED
,
300 PVRDMA_EVENT_PATH_MIG
,
301 PVRDMA_EVENT_PATH_MIG_ERR
,
302 PVRDMA_EVENT_DEVICE_FATAL
,
303 PVRDMA_EVENT_PORT_ACTIVE
,
304 PVRDMA_EVENT_PORT_ERR
,
305 PVRDMA_EVENT_LID_CHANGE
,
306 PVRDMA_EVENT_PKEY_CHANGE
,
307 PVRDMA_EVENT_SM_CHANGE
,
308 PVRDMA_EVENT_SRQ_ERR
,
309 PVRDMA_EVENT_SRQ_LIMIT_REACHED
,
310 PVRDMA_EVENT_QP_LAST_WQE_REACHED
,
311 PVRDMA_EVENT_CLIENT_REREGISTER
,
312 PVRDMA_EVENT_GID_CHANGE
,
315 /* Event queue element. */
317 uint32_t type
; /* Event type. */
318 uint32_t info
; /* Handle, other. */
321 /* CQ notification queue element. */
323 uint32_t info
; /* Handle */
328 PVRDMA_CMD_QUERY_PORT
= PVRDMA_CMD_FIRST
,
329 PVRDMA_CMD_QUERY_PKEY
,
330 PVRDMA_CMD_CREATE_PD
,
331 PVRDMA_CMD_DESTROY_PD
,
332 PVRDMA_CMD_CREATE_MR
,
333 PVRDMA_CMD_DESTROY_MR
,
334 PVRDMA_CMD_CREATE_CQ
,
335 PVRDMA_CMD_RESIZE_CQ
,
336 PVRDMA_CMD_DESTROY_CQ
,
337 PVRDMA_CMD_CREATE_QP
,
338 PVRDMA_CMD_MODIFY_QP
,
340 PVRDMA_CMD_DESTROY_QP
,
341 PVRDMA_CMD_CREATE_UC
,
342 PVRDMA_CMD_DESTROY_UC
,
343 PVRDMA_CMD_CREATE_BIND
,
344 PVRDMA_CMD_DESTROY_BIND
,
345 PVRDMA_CMD_CREATE_SRQ
,
346 PVRDMA_CMD_MODIFY_SRQ
,
347 PVRDMA_CMD_QUERY_SRQ
,
348 PVRDMA_CMD_DESTROY_SRQ
,
353 PVRDMA_CMD_FIRST_RESP
= (1 << 31),
354 PVRDMA_CMD_QUERY_PORT_RESP
= PVRDMA_CMD_FIRST_RESP
,
355 PVRDMA_CMD_QUERY_PKEY_RESP
,
356 PVRDMA_CMD_CREATE_PD_RESP
,
357 PVRDMA_CMD_DESTROY_PD_RESP_NOOP
,
358 PVRDMA_CMD_CREATE_MR_RESP
,
359 PVRDMA_CMD_DESTROY_MR_RESP_NOOP
,
360 PVRDMA_CMD_CREATE_CQ_RESP
,
361 PVRDMA_CMD_RESIZE_CQ_RESP
,
362 PVRDMA_CMD_DESTROY_CQ_RESP_NOOP
,
363 PVRDMA_CMD_CREATE_QP_RESP
,
364 PVRDMA_CMD_MODIFY_QP_RESP
,
365 PVRDMA_CMD_QUERY_QP_RESP
,
366 PVRDMA_CMD_DESTROY_QP_RESP
,
367 PVRDMA_CMD_CREATE_UC_RESP
,
368 PVRDMA_CMD_DESTROY_UC_RESP_NOOP
,
369 PVRDMA_CMD_CREATE_BIND_RESP_NOOP
,
370 PVRDMA_CMD_DESTROY_BIND_RESP_NOOP
,
371 PVRDMA_CMD_CREATE_SRQ_RESP
,
372 PVRDMA_CMD_MODIFY_SRQ_RESP
,
373 PVRDMA_CMD_QUERY_SRQ_RESP
,
374 PVRDMA_CMD_DESTROY_SRQ_RESP
,
378 struct pvrdma_cmd_hdr
{
379 uint64_t response
; /* Key for response lookup. */
380 uint32_t cmd
; /* PVRDMA_CMD_ */
381 uint32_t reserved
; /* Reserved. */
384 struct pvrdma_cmd_resp_hdr
{
385 uint64_t response
; /* From cmd hdr. */
386 uint32_t ack
; /* PVRDMA_CMD_XXX_RESP */
387 uint8_t err
; /* Error. */
388 uint8_t reserved
[3]; /* Reserved. */
391 struct pvrdma_cmd_query_port
{
392 struct pvrdma_cmd_hdr hdr
;
397 struct pvrdma_cmd_query_port_resp
{
398 struct pvrdma_cmd_resp_hdr hdr
;
399 struct pvrdma_port_attr attrs
;
402 struct pvrdma_cmd_query_pkey
{
403 struct pvrdma_cmd_hdr hdr
;
409 struct pvrdma_cmd_query_pkey_resp
{
410 struct pvrdma_cmd_resp_hdr hdr
;
415 struct pvrdma_cmd_create_uc
{
416 struct pvrdma_cmd_hdr hdr
;
418 uint32_t pfn
; /* UAR page frame number */
419 uint64_t pfn64
; /* 64-bit UAR page frame number */
423 struct pvrdma_cmd_create_uc_resp
{
424 struct pvrdma_cmd_resp_hdr hdr
;
429 struct pvrdma_cmd_destroy_uc
{
430 struct pvrdma_cmd_hdr hdr
;
435 struct pvrdma_cmd_create_pd
{
436 struct pvrdma_cmd_hdr hdr
;
441 struct pvrdma_cmd_create_pd_resp
{
442 struct pvrdma_cmd_resp_hdr hdr
;
447 struct pvrdma_cmd_destroy_pd
{
448 struct pvrdma_cmd_hdr hdr
;
453 struct pvrdma_cmd_create_mr
{
454 struct pvrdma_cmd_hdr hdr
;
459 uint32_t access_flags
;
464 struct pvrdma_cmd_create_mr_resp
{
465 struct pvrdma_cmd_resp_hdr hdr
;
472 struct pvrdma_cmd_destroy_mr
{
473 struct pvrdma_cmd_hdr hdr
;
478 struct pvrdma_cmd_create_cq
{
479 struct pvrdma_cmd_hdr hdr
;
487 struct pvrdma_cmd_create_cq_resp
{
488 struct pvrdma_cmd_resp_hdr hdr
;
493 struct pvrdma_cmd_resize_cq
{
494 struct pvrdma_cmd_hdr hdr
;
499 struct pvrdma_cmd_resize_cq_resp
{
500 struct pvrdma_cmd_resp_hdr hdr
;
505 struct pvrdma_cmd_destroy_cq
{
506 struct pvrdma_cmd_hdr hdr
;
511 struct pvrdma_cmd_create_srq
{
512 struct pvrdma_cmd_hdr hdr
;
516 struct pvrdma_srq_attr attrs
;
521 struct pvrdma_cmd_create_srq_resp
{
522 struct pvrdma_cmd_resp_hdr hdr
;
527 struct pvrdma_cmd_modify_srq
{
528 struct pvrdma_cmd_hdr hdr
;
531 struct pvrdma_srq_attr attrs
;
534 struct pvrdma_cmd_query_srq
{
535 struct pvrdma_cmd_hdr hdr
;
540 struct pvrdma_cmd_query_srq_resp
{
541 struct pvrdma_cmd_resp_hdr hdr
;
542 struct pvrdma_srq_attr attrs
;
545 struct pvrdma_cmd_destroy_srq
{
546 struct pvrdma_cmd_hdr hdr
;
551 struct pvrdma_cmd_create_qp
{
552 struct pvrdma_cmd_hdr hdr
;
555 uint32_t send_cq_handle
;
556 uint32_t recv_cq_handle
;
558 uint32_t max_send_wr
;
559 uint32_t max_recv_wr
;
560 uint32_t max_send_sge
;
561 uint32_t max_recv_sge
;
562 uint32_t max_inline_data
;
564 uint32_t access_flags
;
565 uint16_t total_chunks
;
566 uint16_t send_chunks
;
567 uint16_t max_atomic_arg
;
574 struct pvrdma_cmd_create_qp_resp
{
575 struct pvrdma_cmd_resp_hdr hdr
;
577 uint32_t max_send_wr
;
578 uint32_t max_recv_wr
;
579 uint32_t max_send_sge
;
580 uint32_t max_recv_sge
;
581 uint32_t max_inline_data
;
584 struct pvrdma_cmd_modify_qp
{
585 struct pvrdma_cmd_hdr hdr
;
588 struct pvrdma_qp_attr attrs
;
591 struct pvrdma_cmd_query_qp
{
592 struct pvrdma_cmd_hdr hdr
;
597 struct pvrdma_cmd_query_qp_resp
{
598 struct pvrdma_cmd_resp_hdr hdr
;
599 struct pvrdma_qp_attr attrs
;
602 struct pvrdma_cmd_destroy_qp
{
603 struct pvrdma_cmd_hdr hdr
;
608 struct pvrdma_cmd_destroy_qp_resp
{
609 struct pvrdma_cmd_resp_hdr hdr
;
610 uint32_t events_reported
;
614 struct pvrdma_cmd_create_bind
{
615 struct pvrdma_cmd_hdr hdr
;
624 struct pvrdma_cmd_destroy_bind
{
625 struct pvrdma_cmd_hdr hdr
;
627 uint8_t dest_gid
[16];
631 union pvrdma_cmd_req
{
632 struct pvrdma_cmd_hdr hdr
;
633 struct pvrdma_cmd_query_port query_port
;
634 struct pvrdma_cmd_query_pkey query_pkey
;
635 struct pvrdma_cmd_create_uc create_uc
;
636 struct pvrdma_cmd_destroy_uc destroy_uc
;
637 struct pvrdma_cmd_create_pd create_pd
;
638 struct pvrdma_cmd_destroy_pd destroy_pd
;
639 struct pvrdma_cmd_create_mr create_mr
;
640 struct pvrdma_cmd_destroy_mr destroy_mr
;
641 struct pvrdma_cmd_create_cq create_cq
;
642 struct pvrdma_cmd_resize_cq resize_cq
;
643 struct pvrdma_cmd_destroy_cq destroy_cq
;
644 struct pvrdma_cmd_create_qp create_qp
;
645 struct pvrdma_cmd_modify_qp modify_qp
;
646 struct pvrdma_cmd_query_qp query_qp
;
647 struct pvrdma_cmd_destroy_qp destroy_qp
;
648 struct pvrdma_cmd_create_bind create_bind
;
649 struct pvrdma_cmd_destroy_bind destroy_bind
;
650 struct pvrdma_cmd_create_srq create_srq
;
651 struct pvrdma_cmd_modify_srq modify_srq
;
652 struct pvrdma_cmd_query_srq query_srq
;
653 struct pvrdma_cmd_destroy_srq destroy_srq
;
656 union pvrdma_cmd_resp
{
657 struct pvrdma_cmd_resp_hdr hdr
;
658 struct pvrdma_cmd_query_port_resp query_port_resp
;
659 struct pvrdma_cmd_query_pkey_resp query_pkey_resp
;
660 struct pvrdma_cmd_create_uc_resp create_uc_resp
;
661 struct pvrdma_cmd_create_pd_resp create_pd_resp
;
662 struct pvrdma_cmd_create_mr_resp create_mr_resp
;
663 struct pvrdma_cmd_create_cq_resp create_cq_resp
;
664 struct pvrdma_cmd_resize_cq_resp resize_cq_resp
;
665 struct pvrdma_cmd_create_qp_resp create_qp_resp
;
666 struct pvrdma_cmd_query_qp_resp query_qp_resp
;
667 struct pvrdma_cmd_destroy_qp_resp destroy_qp_resp
;
668 struct pvrdma_cmd_create_srq_resp create_srq_resp
;
669 struct pvrdma_cmd_query_srq_resp query_srq_resp
;
672 #endif /* __PVRDMA_DEV_API_H__ */