3 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4 * Keith Outwater, keith_outwater@mvis.com
6 * SPDX-License-Identifier: GPL-2.0+
15 * Slave SelectMap Implementation function table.
26 xilinx_rdata_fn rdata
;
27 xilinx_wdata_fn wdata
;
29 xilinx_abort_fn abort
;
31 } xilinx_virtex2_slave_selectmap_fns
;
33 /* Slave Serial Implementation function table */
37 xilinx_rdata_fn rdata
;
38 xilinx_wdata_fn wdata
;
39 } xilinx_virtex2_slave_serial_fns
;
41 #if defined(CONFIG_FPGA_VIRTEX2)
42 extern struct xilinx_fpga_op virtex2_op
;
43 # define FPGA_VIRTEX2_OPS &virtex2_op
45 # define FPGA_VIRTEX2_OPS NULL
48 /* Device Image Sizes (in bytes)
49 *********************************************************************/
50 #define XILINX_XC2V40_SIZE (338208 / 8)
51 #define XILINX_XC2V80_SIZE (597408 / 8)
52 #define XILINX_XC2V250_SIZE (1591584 / 8)
53 #define XILINX_XC2V500_SIZE (2557857 / 8)
54 #define XILINX_XC2V1000_SIZE (3749408 / 8)
55 #define XILINX_XC2V1500_SIZE (5166240 / 8)
56 #define XILINX_XC2V2000_SIZE (6808352 / 8)
57 #define XILINX_XC2V3000_SIZE (9589408 / 8)
58 #define XILINX_XC2V4000_SIZE (14220192 / 8)
59 #define XILINX_XC2V6000_SIZE (19752096 / 8)
60 #define XILINX_XC2V8000_SIZE (26185120 / 8)
61 #define XILINX_XC2V10000_SIZE (33519264 / 8)
64 *********************************************************************/
65 #define XILINX_XC2V40_DESC(iface, fn_table, cookie) \
66 { xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie, \
69 #define XILINX_XC2V80_DESC(iface, fn_table, cookie) \
70 { xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie, \
73 #define XILINX_XC2V250_DESC(iface, fn_table, cookie) \
74 { xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie, \
77 #define XILINX_XC2V500_DESC(iface, fn_table, cookie) \
78 { xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie, \
81 #define XILINX_XC2V1000_DESC(iface, fn_table, cookie) \
82 { xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie, \
85 #define XILINX_XC2V1500_DESC(iface, fn_table, cookie) \
86 { xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie, \
89 #define XILINX_XC2V2000_DESC(iface, fn_table, cookie) \
90 { xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie, \
93 #define XILINX_XC2V3000_DESC(iface, fn_table, cookie) \
94 { xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie, \
97 #define XILINX_XC2V4000_DESC(iface, fn_table, cookie) \
98 { xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie, \
101 #define XILINX_XC2V6000_DESC(iface, fn_table, cookie) \
102 { xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie, \
105 #define XILINX_XC2V8000_DESC(iface, fn_table, cookie) \
106 { xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie, \
109 #define XILINX_XC2V10000_DESC(iface, fn_table, cookie) \
110 { xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie, \
113 #endif /* _VIRTEX2_H_ */