1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Xilinx Zynq MPSoC Firmware driver
5 * Copyright (C) 2018-2019 Xilinx, Inc.
8 #ifndef _ZYNQMP_FIRMWARE_H_
9 #define _ZYNQMP_FIRMWARE_H_
12 PM_GET_API_VERSION
= 1,
15 PM_GET_OPERATING_CHARACTERISTIC
,
40 PM_PINCTRL_GET_FUNCTION
,
41 PM_PINCTRL_SET_FUNCTION
,
42 PM_PINCTRL_CONFIG_PARAM_GET
,
43 PM_PINCTRL_CONFIG_PARAM_SET
,
58 PM_CLOCK_PLL_GETPARAM
= 49,
59 PM_REGISTER_ACCESS
= 52,
61 PM_FEATURE_CHECK
= 63,
65 #define PM_SIP_SVC 0xc2000000
67 #define ZYNQMP_PM_VERSION_MAJOR 1
68 #define ZYNQMP_PM_VERSION_MINOR 0
69 #define ZYNQMP_PM_VERSION_MAJOR_SHIFT 16
70 #define ZYNQMP_PM_VERSION_MINOR_MASK 0xFFFF
72 #define ZYNQMP_PM_VERSION \
73 ((ZYNQMP_PM_VERSION_MAJOR << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | \
74 ZYNQMP_PM_VERSION_MINOR)
76 #define ZYNQMP_PM_VERSION_INVALID ~0
78 #define PMUFW_V1_0 ((1 << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | 0)
80 unsigned int zynqmp_firmware_version(void);
81 void zynqmp_pmufw_load_config_object(const void *cfg_obj
, size_t size
);
82 int xilinx_pm_request(u32 api_id
, u32 arg0
, u32 arg1
, u32 arg2
,
83 u32 arg3
, u32
*ret_payload
);
85 #endif /* _ZYNQMP_FIRMWARE_H_ */