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git.ipfire.org Git - people/ms/u-boot.git/blob - include/zynqpl.h
2 * (C) Copyright 2012-2013, Xilinx, Michal Simek
5 * Joe Hershberger <joe.hershberger@ni.com>
7 * SPDX-License-Identifier: GPL-2.0+
15 #if defined(CONFIG_FPGA_ZYNQPL)
16 extern struct xilinx_fpga_op zynq_op
;
17 # define FPGA_ZYNQPL_OPS &zynq_op
19 # define FPGA_ZYNQPL_OPS NULL
22 #define XILINX_ZYNQ_7010 0x2
23 #define XILINX_ZYNQ_7015 0x1b
24 #define XILINX_ZYNQ_7020 0x7
25 #define XILINX_ZYNQ_7030 0xc
26 #define XILINX_ZYNQ_7035 0x12
27 #define XILINX_ZYNQ_7045 0x11
28 #define XILINX_ZYNQ_7100 0x16
30 /* Device Image Sizes */
31 #define XILINX_XC7Z010_SIZE 16669920/8
32 #define XILINX_XC7Z015_SIZE 28085344/8
33 #define XILINX_XC7Z020_SIZE 32364512/8
34 #define XILINX_XC7Z030_SIZE 47839328/8
35 #define XILINX_XC7Z035_SIZE 106571232/8
36 #define XILINX_XC7Z045_SIZE 106571232/8
37 #define XILINX_XC7Z100_SIZE 139330784/8
39 /* Descriptor Macros */
40 #define XILINX_XC7Z010_DESC(cookie) \
41 { xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
44 #define XILINX_XC7Z015_DESC(cookie) \
45 { xilinx_zynq, devcfg, XILINX_XC7Z015_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
48 #define XILINX_XC7Z020_DESC(cookie) \
49 { xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
52 #define XILINX_XC7Z030_DESC(cookie) \
53 { xilinx_zynq, devcfg, XILINX_XC7Z030_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
56 #define XILINX_XC7Z035_DESC(cookie) \
57 { xilinx_zynq, devcfg, XILINX_XC7Z035_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
60 #define XILINX_XC7Z045_DESC(cookie) \
61 { xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
64 #define XILINX_XC7Z100_DESC(cookie) \
65 { xilinx_zynq, devcfg, XILINX_XC7Z100_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
68 #endif /* _ZYNQPL_H_ */