include/zynqpl.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * (C) Copyright 2012-2013, Xilinx, Michal Simek
   4  *
   5  * (C) Copyright 2012
   6  * Joe Hershberger <joe.hershberger@ni.com>
   7  */
   8
   9 #ifndef _ZYNQPL_H_
  10 #define _ZYNQPL_H_
  11
  12 #include <xilinx.h>
  13
  14 #ifdef CONFIG_CMD_ZYNQ_AES
  15 int zynq_decrypt_load(u32 srcaddr, u32 dstaddr, u32 srclen, u32 dstlen);
  16 #endif
  17
  18 extern struct xilinx_fpga_op zynq_op;
  19
  20 #define XILINX_ZYNQ_XC7Z007S    0x3
  21 #define XILINX_ZYNQ_XC7Z010     0x2
  22 #define XILINX_ZYNQ_XC7Z012S    0x1c
  23 #define XILINX_ZYNQ_XC7Z014S    0x8
  24 #define XILINX_ZYNQ_XC7Z015     0x1b
  25 #define XILINX_ZYNQ_XC7Z020     0x7
  26 #define XILINX_ZYNQ_XC7Z030     0xc
  27 #define XILINX_ZYNQ_XC7Z035     0x12
  28 #define XILINX_ZYNQ_XC7Z045     0x11
  29 #define XILINX_ZYNQ_XC7Z100     0x16
  30
  31 /* Device Image Sizes */
  32 #define XILINX_XC7Z007S_SIZE    16669920/8
  33 #define XILINX_XC7Z010_SIZE     16669920/8
  34 #define XILINX_XC7Z012S_SIZE    28085344/8
  35 #define XILINX_XC7Z014S_SIZE    32364512/8
  36 #define XILINX_XC7Z015_SIZE     28085344/8
  37 #define XILINX_XC7Z020_SIZE     32364512/8
  38 #define XILINX_XC7Z030_SIZE     47839328/8
  39 #define XILINX_XC7Z035_SIZE     106571232/8
  40 #define XILINX_XC7Z045_SIZE     106571232/8
  41 #define XILINX_XC7Z100_SIZE     139330784/8
  42
  43 /* Device Names */
  44 #define XILINX_XC7Z007S_NAME    "7z007s"
  45 #define XILINX_XC7Z010_NAME     "7z010"
  46 #define XILINX_XC7Z012S_NAME    "7z012s"
  47 #define XILINX_XC7Z014S_NAME    "7z014s"
  48 #define XILINX_XC7Z015_NAME     "7z015"
  49 #define XILINX_XC7Z020_NAME     "7z020"
  50 #define XILINX_XC7Z030_NAME     "7z030"
  51 #define XILINX_XC7Z035_NAME     "7z035"
  52 #define XILINX_XC7Z045_NAME     "7z045"
  53 #define XILINX_XC7Z100_NAME     "7z100"
  54
  55 #if defined(CONFIG_FPGA)
  56 #define ZYNQ_DESC(name) { \
  57         .idcode = XILINX_ZYNQ_XC##name, \
  58         .fpga_size = XILINX_XC##name##_SIZE, \
  59         .devicename = XILINX_XC##name##_NAME \
  60         }
  61 #else
  62 #define ZYNQ_DESC(name) { \
  63         .idcode = XILINX_ZYNQ_XC##name, \
  64         .devicename = XILINX_XC##name##_NAME \
  65         }
  66 #endif
  67
  68 #endif /* _ZYNQPL_H_ */