2 * Copyright (c) 2011 The Chromium OS Authors.
3 * SPDX-License-Identifier: GPL-2.0+
13 #include <fdt_support.h>
15 #include <asm/sections.h>
16 #include <dm/of_extra.h>
17 #include <linux/ctype.h>
19 DECLARE_GLOBAL_DATA_PTR
;
22 * Here are the type we know about. One day we might allow drivers to
23 * register. For now we just put them here. The COMPAT macro allows us to
24 * turn this into a sparse list later, and keeps the ID with the name.
26 * NOTE: This list is basically a TODO list for things that need to be
27 * converted to driver model. So don't add new things here unless there is a
28 * good reason why driver-model conversion is infeasible. Examples include
29 * things which are used before driver model is available.
31 #define COMPAT(id, name) name
32 static const char * const compat_names
[COMPAT_COUNT
] = {
33 COMPAT(UNKNOWN
, "<none>"),
34 COMPAT(NVIDIA_TEGRA20_EMC
, "nvidia,tegra20-emc"),
35 COMPAT(NVIDIA_TEGRA20_EMC_TABLE
, "nvidia,tegra20-emc-table"),
36 COMPAT(NVIDIA_TEGRA20_NAND
, "nvidia,tegra20-nand"),
37 COMPAT(NVIDIA_TEGRA124_PMC
, "nvidia,tegra124-pmc"),
38 COMPAT(NVIDIA_TEGRA186_SDMMC
, "nvidia,tegra186-sdhci"),
39 COMPAT(NVIDIA_TEGRA210_SDMMC
, "nvidia,tegra210-sdhci"),
40 COMPAT(NVIDIA_TEGRA124_SDMMC
, "nvidia,tegra124-sdhci"),
41 COMPAT(NVIDIA_TEGRA30_SDMMC
, "nvidia,tegra30-sdhci"),
42 COMPAT(NVIDIA_TEGRA20_SDMMC
, "nvidia,tegra20-sdhci"),
43 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL
, "nvidia,tegra124-xusb-padctl"),
44 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL
, "nvidia,tegra210-xusb-padctl"),
45 COMPAT(SMSC_LAN9215
, "smsc,lan9215"),
46 COMPAT(SAMSUNG_EXYNOS5_SROMC
, "samsung,exynos-sromc"),
47 COMPAT(SAMSUNG_S3C2440_I2C
, "samsung,s3c2440-i2c"),
48 COMPAT(SAMSUNG_EXYNOS5_SOUND
, "samsung,exynos-sound"),
49 COMPAT(WOLFSON_WM8994_CODEC
, "wolfson,wm8994-codec"),
50 COMPAT(SAMSUNG_EXYNOS_USB_PHY
, "samsung,exynos-usb-phy"),
51 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY
, "samsung,exynos5250-usb3-phy"),
52 COMPAT(SAMSUNG_EXYNOS_TMU
, "samsung,exynos-tmu"),
53 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI
, "samsung,exynos-mipi-dsi"),
54 COMPAT(SAMSUNG_EXYNOS_DWMMC
, "samsung,exynos-dwmmc"),
55 COMPAT(SAMSUNG_EXYNOS_MMC
, "samsung,exynos-mmc"),
56 COMPAT(MAXIM_MAX77686_PMIC
, "maxim,max77686"),
57 COMPAT(GENERIC_SPI_FLASH
, "spi-flash"),
58 COMPAT(MAXIM_98095_CODEC
, "maxim,max98095-codec"),
59 COMPAT(SAMSUNG_EXYNOS5_I2C
, "samsung,exynos5-hsi2c"),
60 COMPAT(SAMSUNG_EXYNOS_SYSMMU
, "samsung,sysmmu-v3.3"),
61 COMPAT(INTEL_MICROCODE
, "intel,microcode"),
62 COMPAT(AMS_AS3722
, "ams,as3722"),
63 COMPAT(INTEL_QRK_MRC
, "intel,quark-mrc"),
64 COMPAT(ALTERA_SOCFPGA_DWMAC
, "altr,socfpga-stmmac"),
65 COMPAT(ALTERA_SOCFPGA_DWMMC
, "altr,socfpga-dw-mshc"),
66 COMPAT(ALTERA_SOCFPGA_DWC2USB
, "snps,dwc2"),
67 COMPAT(INTEL_BAYTRAIL_FSP
, "intel,baytrail-fsp"),
68 COMPAT(INTEL_BAYTRAIL_FSP_MDP
, "intel,baytrail-fsp-mdp"),
69 COMPAT(INTEL_IVYBRIDGE_FSP
, "intel,ivybridge-fsp"),
70 COMPAT(COMPAT_SUNXI_NAND
, "allwinner,sun4i-a10-nand"),
71 COMPAT(ALTERA_SOCFPGA_CLK
, "altr,clk-mgr"),
72 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE
, "pinctrl-single"),
73 COMPAT(ALTERA_SOCFPGA_H2F_BRG
, "altr,socfpga-hps2fpga-bridge"),
74 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG
, "altr,socfpga-lwhps2fpga-bridge"),
75 COMPAT(ALTERA_SOCFPGA_F2H_BRG
, "altr,socfpga-fpga2hps-bridge"),
76 COMPAT(ALTERA_SOCFPGA_F2SDR0
, "altr,socfpga-fpga2sdram0-bridge"),
77 COMPAT(ALTERA_SOCFPGA_F2SDR1
, "altr,socfpga-fpga2sdram1-bridge"),
78 COMPAT(ALTERA_SOCFPGA_F2SDR2
, "altr,socfpga-fpga2sdram2-bridge"),
81 const char *fdtdec_get_compatible(enum fdt_compat_id id
)
83 /* We allow reading of the 'unknown' ID for testing purposes */
84 assert(id
>= 0 && id
< COMPAT_COUNT
);
85 return compat_names
[id
];
88 fdt_addr_t
fdtdec_get_addr_size_fixed(const void *blob
, int node
,
89 const char *prop_name
, int index
, int na
, int ns
,
90 fdt_size_t
*sizep
, bool translate
)
92 const fdt32_t
*prop
, *prop_end
;
93 const fdt32_t
*prop_addr
, *prop_size
, *prop_after_size
;
97 debug("%s: %s: ", __func__
, prop_name
);
99 if (na
> (sizeof(fdt_addr_t
) / sizeof(fdt32_t
))) {
100 debug("(na too large for fdt_addr_t type)\n");
101 return FDT_ADDR_T_NONE
;
104 if (ns
> (sizeof(fdt_size_t
) / sizeof(fdt32_t
))) {
105 debug("(ns too large for fdt_size_t type)\n");
106 return FDT_ADDR_T_NONE
;
109 prop
= fdt_getprop(blob
, node
, prop_name
, &len
);
111 debug("(not found)\n");
112 return FDT_ADDR_T_NONE
;
114 prop_end
= prop
+ (len
/ sizeof(*prop
));
116 prop_addr
= prop
+ (index
* (na
+ ns
));
117 prop_size
= prop_addr
+ na
;
118 prop_after_size
= prop_size
+ ns
;
119 if (prop_after_size
> prop_end
) {
120 debug("(not enough data: expected >= %d cells, got %d cells)\n",
121 (u32
)(prop_after_size
- prop
), ((u32
)(prop_end
- prop
)));
122 return FDT_ADDR_T_NONE
;
125 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
127 addr
= fdt_translate_address(blob
, node
, prop_addr
);
130 addr
= fdtdec_get_number(prop_addr
, na
);
133 *sizep
= fdtdec_get_number(prop_size
, ns
);
134 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr
,
135 (unsigned long long)*sizep
);
137 debug("addr=%08llx\n", (unsigned long long)addr
);
143 fdt_addr_t
fdtdec_get_addr_size_auto_parent(const void *blob
, int parent
,
144 int node
, const char *prop_name
, int index
, fdt_size_t
*sizep
,
149 debug("%s: ", __func__
);
151 na
= fdt_address_cells(blob
, parent
);
153 debug("(bad #address-cells)\n");
154 return FDT_ADDR_T_NONE
;
157 ns
= fdt_size_cells(blob
, parent
);
159 debug("(bad #size-cells)\n");
160 return FDT_ADDR_T_NONE
;
163 debug("na=%d, ns=%d, ", na
, ns
);
165 return fdtdec_get_addr_size_fixed(blob
, node
, prop_name
, index
, na
,
166 ns
, sizep
, translate
);
169 fdt_addr_t
fdtdec_get_addr_size_auto_noparent(const void *blob
, int node
,
170 const char *prop_name
, int index
, fdt_size_t
*sizep
,
175 debug("%s: ", __func__
);
177 parent
= fdt_parent_offset(blob
, node
);
179 debug("(no parent found)\n");
180 return FDT_ADDR_T_NONE
;
183 return fdtdec_get_addr_size_auto_parent(blob
, parent
, node
, prop_name
,
184 index
, sizep
, translate
);
187 fdt_addr_t
fdtdec_get_addr_size(const void *blob
, int node
,
188 const char *prop_name
, fdt_size_t
*sizep
)
190 int ns
= sizep
? (sizeof(fdt_size_t
) / sizeof(fdt32_t
)) : 0;
192 return fdtdec_get_addr_size_fixed(blob
, node
, prop_name
, 0,
193 sizeof(fdt_addr_t
) / sizeof(fdt32_t
),
197 fdt_addr_t
fdtdec_get_addr(const void *blob
, int node
,
198 const char *prop_name
)
200 return fdtdec_get_addr_size(blob
, node
, prop_name
, NULL
);
203 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
204 int fdtdec_get_pci_addr(const void *blob
, int node
, enum fdt_pci_space type
,
205 const char *prop_name
, struct fdt_pci_addr
*addr
)
211 debug("%s: %s: ", __func__
, prop_name
);
214 * If we follow the pci bus bindings strictly, we should check
215 * the value of the node's parent node's #address-cells and
216 * #size-cells. They need to be 3 and 2 accordingly. However,
217 * for simplicity we skip the check here.
219 cell
= fdt_getprop(blob
, node
, prop_name
, &len
);
223 if ((len
% FDT_PCI_REG_SIZE
) == 0) {
224 int num
= len
/ FDT_PCI_REG_SIZE
;
227 for (i
= 0; i
< num
; i
++) {
228 debug("pci address #%d: %08lx %08lx %08lx\n", i
,
229 (ulong
)fdt32_to_cpu(cell
[0]),
230 (ulong
)fdt32_to_cpu(cell
[1]),
231 (ulong
)fdt32_to_cpu(cell
[2]));
232 if ((fdt32_to_cpu(*cell
) & type
) == type
) {
233 addr
->phys_hi
= fdt32_to_cpu(cell
[0]);
234 addr
->phys_mid
= fdt32_to_cpu(cell
[1]);
235 addr
->phys_lo
= fdt32_to_cpu(cell
[1]);
238 cell
+= (FDT_PCI_ADDR_CELLS
+
254 debug("(not found)\n");
258 int fdtdec_get_pci_vendev(const void *blob
, int node
, u16
*vendor
, u16
*device
)
260 const char *list
, *end
;
263 list
= fdt_getprop(blob
, node
, "compatible", &len
);
272 if (len
>= strlen("pciVVVV,DDDD")) {
273 s
= strstr(list
, "pci");
276 * check if the string is something like pciVVVV,DDDD.RR
277 * or just pciVVVV,DDDD
279 if (s
&& s
[7] == ',' &&
280 (s
[12] == '.' || s
[12] == 0)) {
282 *vendor
= simple_strtol(s
, NULL
, 16);
285 *device
= simple_strtol(s
, NULL
, 16);
296 int fdtdec_get_pci_bar32(struct udevice
*dev
, struct fdt_pci_addr
*addr
,
301 /* extract the bar number from fdt_pci_addr */
302 barnum
= addr
->phys_hi
& 0xff;
303 if ((barnum
< PCI_BASE_ADDRESS_0
) || (barnum
> PCI_CARDBUS_CIS
))
306 barnum
= (barnum
- PCI_BASE_ADDRESS_0
) / 4;
307 *bar
= dm_pci_read_bar32(dev
, barnum
);
313 uint64_t fdtdec_get_uint64(const void *blob
, int node
, const char *prop_name
,
314 uint64_t default_val
)
316 const uint64_t *cell64
;
319 cell64
= fdt_getprop(blob
, node
, prop_name
, &length
);
320 if (!cell64
|| length
< sizeof(*cell64
))
323 return fdt64_to_cpu(*cell64
);
326 int fdtdec_get_is_enabled(const void *blob
, int node
)
331 * It should say "okay", so only allow that. Some fdts use "ok" but
332 * this is a bug. Please fix your device tree source file. See here
335 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
337 cell
= fdt_getprop(blob
, node
, "status", NULL
);
339 return 0 == strcmp(cell
, "okay");
343 enum fdt_compat_id
fdtdec_lookup(const void *blob
, int node
)
345 enum fdt_compat_id id
;
347 /* Search our drivers */
348 for (id
= COMPAT_UNKNOWN
; id
< COMPAT_COUNT
; id
++)
349 if (0 == fdt_node_check_compatible(blob
, node
,
352 return COMPAT_UNKNOWN
;
355 int fdtdec_next_compatible(const void *blob
, int node
,
356 enum fdt_compat_id id
)
358 return fdt_node_offset_by_compatible(blob
, node
, compat_names
[id
]);
361 int fdtdec_next_compatible_subnode(const void *blob
, int node
,
362 enum fdt_compat_id id
, int *depthp
)
365 node
= fdt_next_node(blob
, node
, depthp
);
366 } while (*depthp
> 1);
368 /* If this is a direct subnode, and compatible, return it */
369 if (*depthp
== 1 && 0 == fdt_node_check_compatible(
370 blob
, node
, compat_names
[id
]))
373 return -FDT_ERR_NOTFOUND
;
376 int fdtdec_next_alias(const void *blob
, const char *name
,
377 enum fdt_compat_id id
, int *upto
)
379 #define MAX_STR_LEN 20
380 char str
[MAX_STR_LEN
+ 20];
383 /* snprintf() is not available */
384 assert(strlen(name
) < MAX_STR_LEN
);
385 sprintf(str
, "%.*s%d", MAX_STR_LEN
, name
, *upto
);
386 node
= fdt_path_offset(blob
, str
);
389 err
= fdt_node_check_compatible(blob
, node
, compat_names
[id
]);
393 return -FDT_ERR_NOTFOUND
;
398 int fdtdec_find_aliases_for_id(const void *blob
, const char *name
,
399 enum fdt_compat_id id
, int *node_list
, int maxcount
)
401 memset(node_list
, '\0', sizeof(*node_list
) * maxcount
);
403 return fdtdec_add_aliases_for_id(blob
, name
, id
, node_list
, maxcount
);
406 /* TODO: Can we tighten this code up a little? */
407 int fdtdec_add_aliases_for_id(const void *blob
, const char *name
,
408 enum fdt_compat_id id
, int *node_list
, int maxcount
)
410 int name_len
= strlen(name
);
418 /* find the alias node if present */
419 alias_node
= fdt_path_offset(blob
, "/aliases");
422 * start with nothing, and we can assume that the root node can't
425 memset(nodes
, '\0', sizeof(nodes
));
427 /* First find all the compatible nodes */
428 for (node
= count
= 0; node
>= 0 && count
< maxcount
;) {
429 node
= fdtdec_next_compatible(blob
, node
, id
);
431 nodes
[count
++] = node
;
434 debug("%s: warning: maxcount exceeded with alias '%s'\n",
437 /* Now find all the aliases */
438 for (offset
= fdt_first_property_offset(blob
, alias_node
);
440 offset
= fdt_next_property_offset(blob
, offset
)) {
441 const struct fdt_property
*prop
;
447 prop
= fdt_get_property_by_offset(blob
, offset
, NULL
);
448 path
= fdt_string(blob
, fdt32_to_cpu(prop
->nameoff
));
449 if (prop
->len
&& 0 == strncmp(path
, name
, name_len
))
450 node
= fdt_path_offset(blob
, prop
->data
);
454 /* Get the alias number */
455 number
= simple_strtoul(path
+ name_len
, NULL
, 10);
456 if (number
< 0 || number
>= maxcount
) {
457 debug("%s: warning: alias '%s' is out of range\n",
462 /* Make sure the node we found is actually in our list! */
464 for (j
= 0; j
< count
; j
++)
465 if (nodes
[j
] == node
) {
471 debug("%s: warning: alias '%s' points to a node "
472 "'%s' that is missing or is not compatible "
473 " with '%s'\n", __func__
, path
,
474 fdt_get_name(blob
, node
, NULL
),
480 * Add this node to our list in the right place, and mark
483 if (fdtdec_get_is_enabled(blob
, node
)) {
484 if (node_list
[number
]) {
485 debug("%s: warning: alias '%s' requires that "
486 "a node be placed in the list in a "
487 "position which is already filled by "
488 "node '%s'\n", __func__
, path
,
489 fdt_get_name(blob
, node
, NULL
));
492 node_list
[number
] = node
;
493 if (number
>= num_found
)
494 num_found
= number
+ 1;
499 /* Add any nodes not mentioned by an alias */
500 for (i
= j
= 0; i
< maxcount
; i
++) {
502 for (; j
< maxcount
; j
++)
504 fdtdec_get_is_enabled(blob
, nodes
[j
]))
507 /* Have we run out of nodes to add? */
511 assert(!node_list
[i
]);
512 node_list
[i
] = nodes
[j
++];
521 int fdtdec_get_alias_seq(const void *blob
, const char *base
, int offset
,
524 int base_len
= strlen(base
);
525 const char *find_name
;
530 find_name
= fdt_get_name(blob
, offset
, &find_namelen
);
531 debug("Looking for '%s' at %d, name %s\n", base
, offset
, find_name
);
533 aliases
= fdt_path_offset(blob
, "/aliases");
534 for (prop_offset
= fdt_first_property_offset(blob
, aliases
);
536 prop_offset
= fdt_next_property_offset(blob
, prop_offset
)) {
542 prop
= fdt_getprop_by_offset(blob
, prop_offset
, &name
, &len
);
543 debug(" - %s, %s\n", name
, prop
);
544 if (len
< find_namelen
|| *prop
!= '/' || prop
[len
- 1] ||
545 strncmp(name
, base
, base_len
))
548 slash
= strrchr(prop
, '/');
549 if (strcmp(slash
+ 1, find_name
))
551 val
= trailing_strtol(name
);
554 debug("Found seq %d\n", *seqp
);
559 debug("Not found\n");
563 const char *fdtdec_get_chosen_prop(const void *blob
, const char *name
)
569 chosen_node
= fdt_path_offset(blob
, "/chosen");
570 return fdt_getprop(blob
, chosen_node
, name
, NULL
);
573 int fdtdec_get_chosen_node(const void *blob
, const char *name
)
577 prop
= fdtdec_get_chosen_prop(blob
, name
);
579 return -FDT_ERR_NOTFOUND
;
580 return fdt_path_offset(blob
, prop
);
583 int fdtdec_check_fdt(void)
586 * We must have an FDT, but we cannot panic() yet since the console
587 * is not ready. So for now, just assert(). Boards which need an early
588 * FDT (prior to console ready) will need to make their own
589 * arrangements and do their own checks.
591 assert(!fdtdec_prepare_fdt());
596 * This function is a little odd in that it accesses global data. At some
597 * point if the architecture board.c files merge this will make more sense.
598 * Even now, it is common code.
600 int fdtdec_prepare_fdt(void)
602 if (!gd
->fdt_blob
|| ((uintptr_t)gd
->fdt_blob
& 3) ||
603 fdt_check_header(gd
->fdt_blob
)) {
604 #ifdef CONFIG_SPL_BUILD
605 puts("Missing DTB\n");
607 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
610 printf("fdt_blob=%p\n", gd
->fdt_blob
);
611 print_buffer((ulong
)gd
->fdt_blob
, gd
->fdt_blob
, 4,
621 int fdtdec_lookup_phandle(const void *blob
, int node
, const char *prop_name
)
626 debug("%s: %s\n", __func__
, prop_name
);
627 phandle
= fdt_getprop(blob
, node
, prop_name
, NULL
);
629 return -FDT_ERR_NOTFOUND
;
631 lookup
= fdt_node_offset_by_phandle(blob
, fdt32_to_cpu(*phandle
));
636 * Look up a property in a node and check that it has a minimum length.
638 * @param blob FDT blob
639 * @param node node to examine
640 * @param prop_name name of property to find
641 * @param min_len minimum property length in bytes
642 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
643 found, or -FDT_ERR_BADLAYOUT if not enough data
644 * @return pointer to cell, which is only valid if err == 0
646 static const void *get_prop_check_min_len(const void *blob
, int node
,
647 const char *prop_name
, int min_len
, int *err
)
652 debug("%s: %s\n", __func__
, prop_name
);
653 cell
= fdt_getprop(blob
, node
, prop_name
, &len
);
655 *err
= -FDT_ERR_NOTFOUND
;
656 else if (len
< min_len
)
657 *err
= -FDT_ERR_BADLAYOUT
;
663 int fdtdec_get_int_array(const void *blob
, int node
, const char *prop_name
,
664 u32
*array
, int count
)
669 debug("%s: %s\n", __func__
, prop_name
);
670 cell
= get_prop_check_min_len(blob
, node
, prop_name
,
671 sizeof(u32
) * count
, &err
);
673 for (i
= 0; i
< count
; i
++)
674 array
[i
] = fdt32_to_cpu(cell
[i
]);
679 int fdtdec_get_int_array_count(const void *blob
, int node
,
680 const char *prop_name
, u32
*array
, int count
)
686 debug("%s: %s\n", __func__
, prop_name
);
687 cell
= fdt_getprop(blob
, node
, prop_name
, &len
);
689 return -FDT_ERR_NOTFOUND
;
690 elems
= len
/ sizeof(u32
);
693 for (i
= 0; i
< count
; i
++)
694 array
[i
] = fdt32_to_cpu(cell
[i
]);
699 const u32
*fdtdec_locate_array(const void *blob
, int node
,
700 const char *prop_name
, int count
)
705 cell
= get_prop_check_min_len(blob
, node
, prop_name
,
706 sizeof(u32
) * count
, &err
);
707 return err
? NULL
: cell
;
710 int fdtdec_get_bool(const void *blob
, int node
, const char *prop_name
)
715 debug("%s: %s\n", __func__
, prop_name
);
716 cell
= fdt_getprop(blob
, node
, prop_name
, &len
);
720 int fdtdec_parse_phandle_with_args(const void *blob
, int src_node
,
721 const char *list_name
,
722 const char *cells_name
,
723 int cell_count
, int index
,
724 struct fdtdec_phandle_args
*out_args
)
726 const __be32
*list
, *list_end
;
727 int rc
= 0, size
, cur_index
= 0;
732 /* Retrieve the phandle list property */
733 list
= fdt_getprop(blob
, src_node
, list_name
, &size
);
736 list_end
= list
+ size
/ sizeof(*list
);
738 /* Loop over the phandles until all the requested entry is found */
739 while (list
< list_end
) {
744 * If phandle is 0, then it is an empty entry with no
745 * arguments. Skip forward to the next entry.
747 phandle
= be32_to_cpup(list
++);
750 * Find the provider node and parse the #*-cells
751 * property to determine the argument length.
753 * This is not needed if the cell count is hard-coded
754 * (i.e. cells_name not set, but cell_count is set),
755 * except when we're going to return the found node
758 if (cells_name
|| cur_index
== index
) {
759 node
= fdt_node_offset_by_phandle(blob
,
762 debug("%s: could not find phandle\n",
763 fdt_get_name(blob
, src_node
,
770 count
= fdtdec_get_int(blob
, node
, cells_name
,
773 debug("%s: could not get %s for %s\n",
774 fdt_get_name(blob
, src_node
,
777 fdt_get_name(blob
, node
,
786 * Make sure that the arguments actually fit in the
787 * remaining property data length
789 if (list
+ count
> list_end
) {
790 debug("%s: arguments longer than property\n",
791 fdt_get_name(blob
, src_node
, NULL
));
797 * All of the error cases above bail out of the loop, so at
798 * this point, the parsing is successful. If the requested
799 * index matches, then fill the out_args structure and return,
800 * or return -ENOENT for an empty entry.
803 if (cur_index
== index
) {
810 if (count
> MAX_PHANDLE_ARGS
) {
811 debug("%s: too many arguments %d\n",
812 fdt_get_name(blob
, src_node
,
814 count
= MAX_PHANDLE_ARGS
;
816 out_args
->node
= node
;
817 out_args
->args_count
= count
;
818 for (i
= 0; i
< count
; i
++) {
820 be32_to_cpup(list
++);
824 /* Found it! return success */
834 * Result will be one of:
835 * -ENOENT : index is for empty phandle
836 * -EINVAL : parsing error on data
837 * [1..n] : Number of phandle (count mode; when index = -1)
839 rc
= index
< 0 ? cur_index
: -ENOENT
;
844 int fdtdec_get_child_count(const void *blob
, int node
)
849 fdt_for_each_subnode(subnode
, blob
, node
)
855 int fdtdec_get_byte_array(const void *blob
, int node
, const char *prop_name
,
856 u8
*array
, int count
)
861 cell
= get_prop_check_min_len(blob
, node
, prop_name
, count
, &err
);
863 memcpy(array
, cell
, count
);
867 const u8
*fdtdec_locate_byte_array(const void *blob
, int node
,
868 const char *prop_name
, int count
)
873 cell
= get_prop_check_min_len(blob
, node
, prop_name
, count
, &err
);
879 int fdtdec_get_config_int(const void *blob
, const char *prop_name
,
884 debug("%s: %s\n", __func__
, prop_name
);
885 config_node
= fdt_path_offset(blob
, "/config");
888 return fdtdec_get_int(blob
, config_node
, prop_name
, default_val
);
891 int fdtdec_get_config_bool(const void *blob
, const char *prop_name
)
896 debug("%s: %s\n", __func__
, prop_name
);
897 config_node
= fdt_path_offset(blob
, "/config");
900 prop
= fdt_get_property(blob
, config_node
, prop_name
, NULL
);
905 char *fdtdec_get_config_string(const void *blob
, const char *prop_name
)
911 debug("%s: %s\n", __func__
, prop_name
);
912 nodeoffset
= fdt_path_offset(blob
, "/config");
916 nodep
= fdt_getprop(blob
, nodeoffset
, prop_name
, &len
);
920 return (char *)nodep
;
923 int fdtdec_decode_region(const void *blob
, int node
, const char *prop_name
,
924 fdt_addr_t
*basep
, fdt_size_t
*sizep
)
926 const fdt_addr_t
*cell
;
929 debug("%s: %s: %s\n", __func__
, fdt_get_name(blob
, node
, NULL
),
931 cell
= fdt_getprop(blob
, node
, prop_name
, &len
);
932 if (!cell
|| (len
< sizeof(fdt_addr_t
) * 2)) {
933 debug("cell=%p, len=%d\n", cell
, len
);
937 *basep
= fdt_addr_to_cpu(*cell
);
938 *sizep
= fdt_size_to_cpu(cell
[1]);
939 debug("%s: base=%08lx, size=%lx\n", __func__
, (ulong
)*basep
,
945 u64
fdtdec_get_number(const fdt32_t
*ptr
, unsigned int cells
)
950 number
= (number
<< 32) | fdt32_to_cpu(*ptr
++);
955 int fdt_get_resource(const void *fdt
, int node
, const char *property
,
956 unsigned int index
, struct fdt_resource
*res
)
958 const fdt32_t
*ptr
, *end
;
959 int na
, ns
, len
, parent
;
962 parent
= fdt_parent_offset(fdt
, node
);
966 na
= fdt_address_cells(fdt
, parent
);
967 ns
= fdt_size_cells(fdt
, parent
);
969 ptr
= fdt_getprop(fdt
, node
, property
, &len
);
973 end
= ptr
+ len
/ sizeof(*ptr
);
975 while (ptr
+ na
+ ns
<= end
) {
977 res
->start
= res
->end
= fdtdec_get_number(ptr
, na
);
978 res
->end
+= fdtdec_get_number(&ptr
[na
], ns
) - 1;
986 return -FDT_ERR_NOTFOUND
;
989 int fdt_get_named_resource(const void *fdt
, int node
, const char *property
,
990 const char *prop_names
, const char *name
,
991 struct fdt_resource
*res
)
995 index
= fdt_stringlist_search(fdt
, node
, prop_names
, name
);
999 return fdt_get_resource(fdt
, node
, property
, index
, res
);
1002 int fdtdec_decode_memory_region(const void *blob
, int config_node
,
1003 const char *mem_type
, const char *suffix
,
1004 fdt_addr_t
*basep
, fdt_size_t
*sizep
)
1008 fdt_size_t size
, offset_size
;
1009 fdt_addr_t base
, offset
;
1012 if (config_node
== -1) {
1013 config_node
= fdt_path_offset(blob
, "/config");
1014 if (config_node
< 0) {
1015 debug("%s: Cannot find /config node\n", __func__
);
1022 snprintf(prop_name
, sizeof(prop_name
), "%s-memory%s", mem_type
,
1024 mem
= fdt_getprop(blob
, config_node
, prop_name
, NULL
);
1026 debug("%s: No memory type for '%s', using /memory\n", __func__
,
1031 node
= fdt_path_offset(blob
, mem
);
1033 debug("%s: Failed to find node '%s': %s\n", __func__
, mem
,
1034 fdt_strerror(node
));
1039 * Not strictly correct - the memory may have multiple banks. We just
1042 if (fdtdec_decode_region(blob
, node
, "reg", &base
, &size
)) {
1043 debug("%s: Failed to decode memory region %s\n", __func__
,
1048 snprintf(prop_name
, sizeof(prop_name
), "%s-offset%s", mem_type
,
1050 if (fdtdec_decode_region(blob
, config_node
, prop_name
, &offset
,
1052 debug("%s: Failed to decode memory region '%s'\n", __func__
,
1057 *basep
= base
+ offset
;
1058 *sizep
= offset_size
;
1063 static int decode_timing_property(const void *blob
, int node
, const char *name
,
1064 struct timing_entry
*result
)
1066 int length
, ret
= 0;
1069 prop
= fdt_getprop(blob
, node
, name
, &length
);
1071 debug("%s: could not find property %s\n",
1072 fdt_get_name(blob
, node
, NULL
), name
);
1076 if (length
== sizeof(u32
)) {
1077 result
->typ
= fdtdec_get_int(blob
, node
, name
, 0);
1078 result
->min
= result
->typ
;
1079 result
->max
= result
->typ
;
1081 ret
= fdtdec_get_int_array(blob
, node
, name
, &result
->min
, 3);
1087 int fdtdec_decode_display_timing(const void *blob
, int parent
, int index
,
1088 struct display_timing
*dt
)
1090 int i
, node
, timings_node
;
1094 timings_node
= fdt_subnode_offset(blob
, parent
, "display-timings");
1095 if (timings_node
< 0)
1096 return timings_node
;
1098 for (i
= 0, node
= fdt_first_subnode(blob
, timings_node
);
1099 node
> 0 && i
!= index
;
1100 node
= fdt_next_subnode(blob
, node
))
1106 memset(dt
, 0, sizeof(*dt
));
1108 ret
|= decode_timing_property(blob
, node
, "hback-porch",
1110 ret
|= decode_timing_property(blob
, node
, "hfront-porch",
1112 ret
|= decode_timing_property(blob
, node
, "hactive", &dt
->hactive
);
1113 ret
|= decode_timing_property(blob
, node
, "hsync-len", &dt
->hsync_len
);
1114 ret
|= decode_timing_property(blob
, node
, "vback-porch",
1116 ret
|= decode_timing_property(blob
, node
, "vfront-porch",
1118 ret
|= decode_timing_property(blob
, node
, "vactive", &dt
->vactive
);
1119 ret
|= decode_timing_property(blob
, node
, "vsync-len", &dt
->vsync_len
);
1120 ret
|= decode_timing_property(blob
, node
, "clock-frequency",
1124 val
= fdtdec_get_int(blob
, node
, "vsync-active", -1);
1126 dt
->flags
|= val
? DISPLAY_FLAGS_VSYNC_HIGH
:
1127 DISPLAY_FLAGS_VSYNC_LOW
;
1129 val
= fdtdec_get_int(blob
, node
, "hsync-active", -1);
1131 dt
->flags
|= val
? DISPLAY_FLAGS_HSYNC_HIGH
:
1132 DISPLAY_FLAGS_HSYNC_LOW
;
1134 val
= fdtdec_get_int(blob
, node
, "de-active", -1);
1136 dt
->flags
|= val
? DISPLAY_FLAGS_DE_HIGH
:
1137 DISPLAY_FLAGS_DE_LOW
;
1139 val
= fdtdec_get_int(blob
, node
, "pixelclk-active", -1);
1141 dt
->flags
|= val
? DISPLAY_FLAGS_PIXDATA_POSEDGE
:
1142 DISPLAY_FLAGS_PIXDATA_NEGEDGE
;
1145 if (fdtdec_get_bool(blob
, node
, "interlaced"))
1146 dt
->flags
|= DISPLAY_FLAGS_INTERLACED
;
1147 if (fdtdec_get_bool(blob
, node
, "doublescan"))
1148 dt
->flags
|= DISPLAY_FLAGS_DOUBLESCAN
;
1149 if (fdtdec_get_bool(blob
, node
, "doubleclk"))
1150 dt
->flags
|= DISPLAY_FLAGS_DOUBLECLK
;
1155 int fdtdec_setup_memory_size(void)
1158 struct fdt_resource res
;
1160 mem
= fdt_path_offset(gd
->fdt_blob
, "/memory");
1162 debug("%s: Missing /memory node\n", __func__
);
1166 ret
= fdt_get_resource(gd
->fdt_blob
, mem
, "reg", 0, &res
);
1168 debug("%s: Unable to decode first memory bank\n", __func__
);
1172 gd
->ram_size
= (phys_size_t
)(res
.end
- res
.start
+ 1);
1173 debug("%s: Initial DRAM size %llx\n", __func__
,
1174 (unsigned long long)gd
->ram_size
);
1179 #if defined(CONFIG_NR_DRAM_BANKS)
1180 int fdtdec_setup_memory_banksize(void)
1183 struct fdt_resource res
;
1185 mem
= fdt_path_offset(gd
->fdt_blob
, "/memory");
1187 debug("%s: Missing /memory node\n", __func__
);
1191 for (bank
= 0; bank
< CONFIG_NR_DRAM_BANKS
; bank
++) {
1192 ret
= fdt_get_resource(gd
->fdt_blob
, mem
, "reg", bank
, &res
);
1193 if (ret
== -FDT_ERR_NOTFOUND
)
1198 gd
->bd
->bi_dram
[bank
].start
= (phys_addr_t
)res
.start
;
1199 gd
->bd
->bi_dram
[bank
].size
=
1200 (phys_size_t
)(res
.end
- res
.start
+ 1);
1202 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1204 (unsigned long long)gd
->bd
->bi_dram
[bank
].start
,
1205 (unsigned long long)gd
->bd
->bi_dram
[bank
].size
);
1212 int fdtdec_setup(void)
1214 #if CONFIG_IS_ENABLED(OF_CONTROL)
1215 # ifdef CONFIG_OF_EMBED
1216 /* Get a pointer to the FDT */
1217 gd
->fdt_blob
= __dtb_dt_begin
;
1218 # elif defined CONFIG_OF_SEPARATE
1219 # ifdef CONFIG_SPL_BUILD
1220 /* FDT is at end of BSS unless it is in a different memory region */
1221 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS
))
1222 gd
->fdt_blob
= (ulong
*)&_image_binary_end
;
1224 gd
->fdt_blob
= (ulong
*)&__bss_end
;
1226 # elif defined CONFIG_FIT_EMBED
1227 gd
->fdt_blob
= locate_dtb_in_fit(&_end
);
1229 if (gd
->fdt_blob
== NULL
|| gd
->fdt_blob
<= ((void *)&_end
)) {
1230 puts("Failed to find proper dtb in embedded FIT Image\n");
1235 /* FDT is at end of image */
1236 gd
->fdt_blob
= (ulong
*)&_end
;
1238 # elif defined(CONFIG_OF_BOARD)
1239 /* Allow the board to override the fdt address. */
1240 gd
->fdt_blob
= board_fdt_blob_setup();
1241 # elif defined(CONFIG_OF_HOSTFILE)
1242 if (sandbox_read_fdt_from_file()) {
1243 puts("Failed to read control FDT\n");
1247 # ifndef CONFIG_SPL_BUILD
1248 /* Allow the early environment to override the fdt address */
1249 gd
->fdt_blob
= (void *)getenv_ulong("fdtcontroladdr", 16,
1250 (uintptr_t)gd
->fdt_blob
);
1253 return fdtdec_prepare_fdt();
1256 #endif /* !USE_HOSTCC */