1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
9 #include <display_options.h>
16 #include <dm/of_extra.h>
20 #include <fdt_support.h>
23 #include <linux/libfdt.h>
25 #include <asm/global_data.h>
26 #include <asm/sections.h>
27 #include <linux/ctype.h>
28 #include <linux/lzo.h>
29 #include <linux/ioport.h>
31 DECLARE_GLOBAL_DATA_PTR
;
34 * Here are the type we know about. One day we might allow drivers to
35 * register. For now we just put them here. The COMPAT macro allows us to
36 * turn this into a sparse list later, and keeps the ID with the name.
38 * NOTE: This list is basically a TODO list for things that need to be
39 * converted to driver model. So don't add new things here unless there is a
40 * good reason why driver-model conversion is infeasible. Examples include
41 * things which are used before driver model is available.
43 #define COMPAT(id, name) name
44 static const char * const compat_names
[COMPAT_COUNT
] = {
45 COMPAT(UNKNOWN
, "<none>"),
46 COMPAT(NVIDIA_TEGRA20_EMC
, "nvidia,tegra20-emc"),
47 COMPAT(NVIDIA_TEGRA20_EMC_TABLE
, "nvidia,tegra20-emc-table"),
48 COMPAT(NVIDIA_TEGRA20_NAND
, "nvidia,tegra20-nand"),
49 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL
, "nvidia,tegra124-xusb-padctl"),
50 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL
, "nvidia,tegra210-xusb-padctl"),
51 COMPAT(SAMSUNG_EXYNOS_USB_PHY
, "samsung,exynos-usb-phy"),
52 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY
, "samsung,exynos5250-usb3-phy"),
53 COMPAT(SAMSUNG_EXYNOS_TMU
, "samsung,exynos-tmu"),
54 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI
, "samsung,exynos-mipi-dsi"),
55 COMPAT(SAMSUNG_EXYNOS_DWMMC
, "samsung,exynos-dwmmc"),
56 COMPAT(GENERIC_SPI_FLASH
, "jedec,spi-nor"),
57 COMPAT(SAMSUNG_EXYNOS_SYSMMU
, "samsung,sysmmu-v3.3"),
58 COMPAT(INTEL_MICROCODE
, "intel,microcode"),
59 COMPAT(INTEL_QRK_MRC
, "intel,quark-mrc"),
60 COMPAT(ALTERA_SOCFPGA_DWMAC
, "altr,socfpga-stmmac"),
61 COMPAT(ALTERA_SOCFPGA_DWMMC
, "altr,socfpga-dw-mshc"),
62 COMPAT(ALTERA_SOCFPGA_DWC2USB
, "snps,dwc2"),
63 COMPAT(INTEL_BAYTRAIL_FSP
, "intel,baytrail-fsp"),
64 COMPAT(INTEL_BAYTRAIL_FSP_MDP
, "intel,baytrail-fsp-mdp"),
65 COMPAT(INTEL_IVYBRIDGE_FSP
, "intel,ivybridge-fsp"),
66 COMPAT(COMPAT_SUNXI_NAND
, "allwinner,sun4i-a10-nand"),
67 COMPAT(ALTERA_SOCFPGA_CLK
, "altr,clk-mgr"),
68 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE
, "pinctrl-single"),
69 COMPAT(ALTERA_SOCFPGA_H2F_BRG
, "altr,socfpga-hps2fpga-bridge"),
70 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG
, "altr,socfpga-lwhps2fpga-bridge"),
71 COMPAT(ALTERA_SOCFPGA_F2H_BRG
, "altr,socfpga-fpga2hps-bridge"),
72 COMPAT(ALTERA_SOCFPGA_F2SDR0
, "altr,socfpga-fpga2sdram0-bridge"),
73 COMPAT(ALTERA_SOCFPGA_F2SDR1
, "altr,socfpga-fpga2sdram1-bridge"),
74 COMPAT(ALTERA_SOCFPGA_F2SDR2
, "altr,socfpga-fpga2sdram2-bridge"),
75 COMPAT(ALTERA_SOCFPGA_FPGA0
, "altr,socfpga-a10-fpga-mgr"),
76 COMPAT(ALTERA_SOCFPGA_NOC
, "altr,socfpga-a10-noc"),
77 COMPAT(ALTERA_SOCFPGA_CLK_INIT
, "altr,socfpga-a10-clk-init")
80 static const char *const fdt_src_name
[] = {
81 [FDTSRC_SEPARATE
] = "separate",
83 [FDTSRC_BOARD
] = "board",
84 [FDTSRC_EMBED
] = "embed",
88 const char *fdtdec_get_srcname(void)
90 return fdt_src_name
[gd
->fdt_src
];
93 const char *fdtdec_get_compatible(enum fdt_compat_id id
)
95 /* We allow reading of the 'unknown' ID for testing purposes */
96 assert(id
>= 0 && id
< COMPAT_COUNT
);
97 return compat_names
[id
];
100 fdt_addr_t
fdtdec_get_addr_size_fixed(const void *blob
, int node
,
101 const char *prop_name
, int index
, int na
,
102 int ns
, fdt_size_t
*sizep
,
105 const fdt32_t
*prop
, *prop_end
;
106 const fdt32_t
*prop_addr
, *prop_size
, *prop_after_size
;
110 debug("%s: %s: ", __func__
, prop_name
);
112 prop
= fdt_getprop(blob
, node
, prop_name
, &len
);
114 debug("(not found)\n");
115 return FDT_ADDR_T_NONE
;
117 prop_end
= prop
+ (len
/ sizeof(*prop
));
119 prop_addr
= prop
+ (index
* (na
+ ns
));
120 prop_size
= prop_addr
+ na
;
121 prop_after_size
= prop_size
+ ns
;
122 if (prop_after_size
> prop_end
) {
123 debug("(not enough data: expected >= %d cells, got %d cells)\n",
124 (u32
)(prop_after_size
- prop
), ((u32
)(prop_end
- prop
)));
125 return FDT_ADDR_T_NONE
;
128 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
130 addr
= fdt_translate_address(blob
, node
, prop_addr
);
133 addr
= fdtdec_get_number(prop_addr
, na
);
136 *sizep
= fdtdec_get_number(prop_size
, ns
);
137 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr
,
138 (unsigned long long)*sizep
);
140 debug("addr=%08llx\n", (unsigned long long)addr
);
146 fdt_addr_t
fdtdec_get_addr_size_auto_parent(const void *blob
, int parent
,
147 int node
, const char *prop_name
,
148 int index
, fdt_size_t
*sizep
,
153 debug("%s: ", __func__
);
155 na
= fdt_address_cells(blob
, parent
);
157 debug("(bad #address-cells)\n");
158 return FDT_ADDR_T_NONE
;
161 ns
= fdt_size_cells(blob
, parent
);
163 debug("(bad #size-cells)\n");
164 return FDT_ADDR_T_NONE
;
167 debug("na=%d, ns=%d, ", na
, ns
);
169 return fdtdec_get_addr_size_fixed(blob
, node
, prop_name
, index
, na
,
170 ns
, sizep
, translate
);
173 fdt_addr_t
fdtdec_get_addr_size_auto_noparent(const void *blob
, int node
,
174 const char *prop_name
, int index
,
180 debug("%s: ", __func__
);
182 parent
= fdt_parent_offset(blob
, node
);
184 debug("(no parent found)\n");
185 return FDT_ADDR_T_NONE
;
188 return fdtdec_get_addr_size_auto_parent(blob
, parent
, node
, prop_name
,
189 index
, sizep
, translate
);
192 fdt_addr_t
fdtdec_get_addr_size(const void *blob
, int node
,
193 const char *prop_name
, fdt_size_t
*sizep
)
195 int ns
= sizep
? (sizeof(fdt_size_t
) / sizeof(fdt32_t
)) : 0;
197 return fdtdec_get_addr_size_fixed(blob
, node
, prop_name
, 0,
198 sizeof(fdt_addr_t
) / sizeof(fdt32_t
),
202 fdt_addr_t
fdtdec_get_addr(const void *blob
, int node
, const char *prop_name
)
204 return fdtdec_get_addr_size(blob
, node
, prop_name
, NULL
);
207 int fdtdec_get_pci_vendev(const void *blob
, int node
, u16
*vendor
, u16
*device
)
209 const char *list
, *end
;
212 list
= fdt_getprop(blob
, node
, "compatible", &len
);
219 if (len
>= strlen("pciVVVV,DDDD")) {
220 char *s
= strstr(list
, "pci");
223 * check if the string is something like pciVVVV,DDDD.RR
224 * or just pciVVVV,DDDD
226 if (s
&& s
[7] == ',' &&
227 (s
[12] == '.' || s
[12] == 0)) {
229 *vendor
= simple_strtol(s
, NULL
, 16);
232 *device
= simple_strtol(s
, NULL
, 16);
243 int fdtdec_get_pci_bar32(const struct udevice
*dev
, struct fdt_pci_addr
*addr
,
248 /* extract the bar number from fdt_pci_addr */
249 barnum
= addr
->phys_hi
& 0xff;
250 if (barnum
< PCI_BASE_ADDRESS_0
|| barnum
> PCI_CARDBUS_CIS
)
253 barnum
= (barnum
- PCI_BASE_ADDRESS_0
) / 4;
255 *bar
= dm_pci_read_bar32(dev
, barnum
);
260 int fdtdec_get_pci_bus_range(const void *blob
, int node
,
261 struct fdt_resource
*res
)
266 values
= fdt_getprop(blob
, node
, "bus-range", &len
);
267 if (!values
|| len
< sizeof(*values
) * 2)
270 res
->start
= fdt32_to_cpu(*values
++);
271 res
->end
= fdt32_to_cpu(*values
);
276 uint64_t fdtdec_get_uint64(const void *blob
, int node
, const char *prop_name
,
277 uint64_t default_val
)
279 const unaligned_fdt64_t
*cell64
;
282 cell64
= fdt_getprop(blob
, node
, prop_name
, &length
);
283 if (!cell64
|| length
< sizeof(*cell64
))
286 return fdt64_to_cpu(*cell64
);
289 int fdtdec_get_is_enabled(const void *blob
, int node
)
294 * It should say "okay", so only allow that. Some fdts use "ok" but
295 * this is a bug. Please fix your device tree source file. See here
298 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
300 cell
= fdt_getprop(blob
, node
, "status", NULL
);
302 return strcmp(cell
, "okay") == 0;
306 enum fdt_compat_id
fdtdec_lookup(const void *blob
, int node
)
308 enum fdt_compat_id id
;
310 /* Search our drivers */
311 for (id
= COMPAT_UNKNOWN
; id
< COMPAT_COUNT
; id
++)
312 if (fdt_node_check_compatible(blob
, node
,
313 compat_names
[id
]) == 0)
315 return COMPAT_UNKNOWN
;
318 int fdtdec_next_compatible(const void *blob
, int node
, enum fdt_compat_id id
)
320 return fdt_node_offset_by_compatible(blob
, node
, compat_names
[id
]);
323 int fdtdec_next_compatible_subnode(const void *blob
, int node
,
324 enum fdt_compat_id id
, int *depthp
)
327 node
= fdt_next_node(blob
, node
, depthp
);
328 } while (*depthp
> 1);
330 /* If this is a direct subnode, and compatible, return it */
331 if (*depthp
== 1 && 0 == fdt_node_check_compatible(
332 blob
, node
, compat_names
[id
]))
335 return -FDT_ERR_NOTFOUND
;
338 int fdtdec_next_alias(const void *blob
, const char *name
, enum fdt_compat_id id
,
341 #define MAX_STR_LEN 20
342 char str
[MAX_STR_LEN
+ 20];
345 /* snprintf() is not available */
346 assert(strlen(name
) < MAX_STR_LEN
);
347 sprintf(str
, "%.*s%d", MAX_STR_LEN
, name
, *upto
);
348 node
= fdt_path_offset(blob
, str
);
351 err
= fdt_node_check_compatible(blob
, node
, compat_names
[id
]);
355 return -FDT_ERR_NOTFOUND
;
360 int fdtdec_find_aliases_for_id(const void *blob
, const char *name
,
361 enum fdt_compat_id id
, int *node_list
,
364 memset(node_list
, '\0', sizeof(*node_list
) * maxcount
);
366 return fdtdec_add_aliases_for_id(blob
, name
, id
, node_list
, maxcount
);
369 /* TODO: Can we tighten this code up a little? */
370 int fdtdec_add_aliases_for_id(const void *blob
, const char *name
,
371 enum fdt_compat_id id
, int *node_list
,
374 int name_len
= strlen(name
);
382 /* find the alias node if present */
383 alias_node
= fdt_path_offset(blob
, "/aliases");
386 * start with nothing, and we can assume that the root node can't
389 memset(nodes
, '\0', sizeof(nodes
));
391 /* First find all the compatible nodes */
392 for (node
= count
= 0; node
>= 0 && count
< maxcount
;) {
393 node
= fdtdec_next_compatible(blob
, node
, id
);
395 nodes
[count
++] = node
;
398 debug("%s: warning: maxcount exceeded with alias '%s'\n",
401 /* Now find all the aliases */
402 for (offset
= fdt_first_property_offset(blob
, alias_node
);
404 offset
= fdt_next_property_offset(blob
, offset
)) {
405 const struct fdt_property
*prop
;
411 prop
= fdt_get_property_by_offset(blob
, offset
, NULL
);
412 path
= fdt_string(blob
, fdt32_to_cpu(prop
->nameoff
));
413 if (prop
->len
&& 0 == strncmp(path
, name
, name_len
))
414 node
= fdt_path_offset(blob
, prop
->data
);
418 /* Get the alias number */
419 number
= dectoul(path
+ name_len
, NULL
);
420 if (number
< 0 || number
>= maxcount
) {
421 debug("%s: warning: alias '%s' is out of range\n",
426 /* Make sure the node we found is actually in our list! */
428 for (j
= 0; j
< count
; j
++)
429 if (nodes
[j
] == node
) {
435 debug("%s: warning: alias '%s' points to a node "
436 "'%s' that is missing or is not compatible "
437 " with '%s'\n", __func__
, path
,
438 fdt_get_name(blob
, node
, NULL
),
444 * Add this node to our list in the right place, and mark
447 if (fdtdec_get_is_enabled(blob
, node
)) {
448 if (node_list
[number
]) {
449 debug("%s: warning: alias '%s' requires that "
450 "a node be placed in the list in a "
451 "position which is already filled by "
452 "node '%s'\n", __func__
, path
,
453 fdt_get_name(blob
, node
, NULL
));
456 node_list
[number
] = node
;
457 if (number
>= num_found
)
458 num_found
= number
+ 1;
463 /* Add any nodes not mentioned by an alias */
464 for (i
= j
= 0; i
< maxcount
; i
++) {
466 for (; j
< maxcount
; j
++)
468 fdtdec_get_is_enabled(blob
, nodes
[j
]))
471 /* Have we run out of nodes to add? */
475 assert(!node_list
[i
]);
476 node_list
[i
] = nodes
[j
++];
485 int fdtdec_get_alias_seq(const void *blob
, const char *base
, int offset
,
488 int base_len
= strlen(base
);
489 const char *find_name
;
494 find_name
= fdt_get_name(blob
, offset
, &find_namelen
);
495 debug("Looking for '%s' at %d, name %s\n", base
, offset
, find_name
);
497 aliases
= fdt_path_offset(blob
, "/aliases");
498 for (prop_offset
= fdt_first_property_offset(blob
, aliases
);
500 prop_offset
= fdt_next_property_offset(blob
, prop_offset
)) {
506 prop
= fdt_getprop_by_offset(blob
, prop_offset
, &name
, &len
);
507 debug(" - %s, %s\n", name
, prop
);
508 if (len
< find_namelen
|| *prop
!= '/' || prop
[len
- 1] ||
509 strncmp(name
, base
, base_len
))
512 slash
= strrchr(prop
, '/');
513 if (strcmp(slash
+ 1, find_name
))
517 * Adding an extra check to distinguish DT nodes with
520 if (offset
!= fdt_path_offset(blob
, prop
))
523 val
= trailing_strtol(name
);
526 debug("Found seq %d\n", *seqp
);
531 debug("Not found\n");
535 int fdtdec_get_alias_highest_id(const void *blob
, const char *base
)
537 int base_len
= strlen(base
);
542 debug("Looking for highest alias id for '%s'\n", base
);
544 aliases
= fdt_path_offset(blob
, "/aliases");
545 for (prop_offset
= fdt_first_property_offset(blob
, aliases
);
547 prop_offset
= fdt_next_property_offset(blob
, prop_offset
)) {
552 prop
= fdt_getprop_by_offset(blob
, prop_offset
, &name
, &len
);
553 debug(" - %s, %s\n", name
, prop
);
554 if (*prop
!= '/' || prop
[len
- 1] ||
555 strncmp(name
, base
, base_len
))
558 val
= trailing_strtol(name
);
560 debug("Found seq %d\n", val
);
568 const char *fdtdec_get_chosen_prop(const void *blob
, const char *name
)
574 chosen_node
= fdt_path_offset(blob
, "/chosen");
575 return fdt_getprop(blob
, chosen_node
, name
, NULL
);
578 int fdtdec_get_chosen_node(const void *blob
, const char *name
)
582 prop
= fdtdec_get_chosen_prop(blob
, name
);
584 return -FDT_ERR_NOTFOUND
;
585 return fdt_path_offset(blob
, prop
);
588 int fdtdec_check_fdt(void)
591 * We must have an FDT, but we cannot panic() yet since the console
592 * is not ready. So for now, just assert(). Boards which need an early
593 * FDT (prior to console ready) will need to make their own
594 * arrangements and do their own checks.
596 assert(!fdtdec_prepare_fdt());
601 * This function is a little odd in that it accesses global data. At some
602 * point if the architecture board.c files merge this will make more sense.
603 * Even now, it is common code.
605 int fdtdec_prepare_fdt(void)
607 if (!gd
->fdt_blob
|| ((uintptr_t)gd
->fdt_blob
& 3) ||
608 fdt_check_header(gd
->fdt_blob
)) {
609 #ifdef CONFIG_SPL_BUILD
610 puts("Missing DTB\n");
612 printf("No valid device tree binary found at %p\n",
616 printf("fdt_blob=%p\n", gd
->fdt_blob
);
617 print_buffer((ulong
)gd
->fdt_blob
, gd
->fdt_blob
, 4,
627 int fdtdec_lookup_phandle(const void *blob
, int node
, const char *prop_name
)
632 debug("%s: %s\n", __func__
, prop_name
);
633 phandle
= fdt_getprop(blob
, node
, prop_name
, NULL
);
635 return -FDT_ERR_NOTFOUND
;
637 lookup
= fdt_node_offset_by_phandle(blob
, fdt32_to_cpu(*phandle
));
642 * Look up a property in a node and check that it has a minimum length.
644 * @param blob FDT blob
645 * @param node node to examine
646 * @param prop_name name of property to find
647 * @param min_len minimum property length in bytes
648 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
649 found, or -FDT_ERR_BADLAYOUT if not enough data
650 * Return: pointer to cell, which is only valid if err == 0
652 static const void *get_prop_check_min_len(const void *blob
, int node
,
653 const char *prop_name
, int min_len
,
659 debug("%s: %s\n", __func__
, prop_name
);
660 cell
= fdt_getprop(blob
, node
, prop_name
, &len
);
662 *err
= -FDT_ERR_NOTFOUND
;
663 else if (len
< min_len
)
664 *err
= -FDT_ERR_BADLAYOUT
;
670 int fdtdec_get_int_array(const void *blob
, int node
, const char *prop_name
,
671 u32
*array
, int count
)
676 debug("%s: %s\n", __func__
, prop_name
);
677 cell
= get_prop_check_min_len(blob
, node
, prop_name
,
678 sizeof(u32
) * count
, &err
);
682 for (i
= 0; i
< count
; i
++)
683 array
[i
] = fdt32_to_cpu(cell
[i
]);
688 int fdtdec_get_int_array_count(const void *blob
, int node
,
689 const char *prop_name
, u32
*array
, int count
)
695 debug("%s: %s\n", __func__
, prop_name
);
696 cell
= fdt_getprop(blob
, node
, prop_name
, &len
);
698 return -FDT_ERR_NOTFOUND
;
699 elems
= len
/ sizeof(u32
);
702 for (i
= 0; i
< count
; i
++)
703 array
[i
] = fdt32_to_cpu(cell
[i
]);
708 const u32
*fdtdec_locate_array(const void *blob
, int node
,
709 const char *prop_name
, int count
)
714 cell
= get_prop_check_min_len(blob
, node
, prop_name
,
715 sizeof(u32
) * count
, &err
);
716 return err
? NULL
: cell
;
719 int fdtdec_get_bool(const void *blob
, int node
, const char *prop_name
)
724 debug("%s: %s\n", __func__
, prop_name
);
725 cell
= fdt_getprop(blob
, node
, prop_name
, &len
);
729 int fdtdec_parse_phandle_with_args(const void *blob
, int src_node
,
730 const char *list_name
,
731 const char *cells_name
,
732 int cell_count
, int index
,
733 struct fdtdec_phandle_args
*out_args
)
735 const __be32
*list
, *list_end
;
736 int rc
= 0, size
, cur_index
= 0;
741 /* Retrieve the phandle list property */
742 list
= fdt_getprop(blob
, src_node
, list_name
, &size
);
745 list_end
= list
+ size
/ sizeof(*list
);
747 /* Loop over the phandles until all the requested entry is found */
748 while (list
< list_end
) {
753 * If phandle is 0, then it is an empty entry with no
754 * arguments. Skip forward to the next entry.
756 phandle
= be32_to_cpup(list
++);
759 * Find the provider node and parse the #*-cells
760 * property to determine the argument length.
762 * This is not needed if the cell count is hard-coded
763 * (i.e. cells_name not set, but cell_count is set),
764 * except when we're going to return the found node
767 if (cells_name
|| cur_index
== index
) {
768 node
= fdt_node_offset_by_phandle(blob
,
771 debug("%s: could not find phandle\n",
772 fdt_get_name(blob
, src_node
,
779 count
= fdtdec_get_int(blob
, node
, cells_name
,
782 debug("%s: could not get %s for %s\n",
783 fdt_get_name(blob
, src_node
,
786 fdt_get_name(blob
, node
,
795 * Make sure that the arguments actually fit in the
796 * remaining property data length
798 if (list
+ count
> list_end
) {
799 debug("%s: arguments longer than property\n",
800 fdt_get_name(blob
, src_node
, NULL
));
806 * All of the error cases above bail out of the loop, so at
807 * this point, the parsing is successful. If the requested
808 * index matches, then fill the out_args structure and return,
809 * or return -ENOENT for an empty entry.
812 if (cur_index
== index
) {
819 if (count
> MAX_PHANDLE_ARGS
) {
820 debug("%s: too many arguments %d\n",
821 fdt_get_name(blob
, src_node
,
823 count
= MAX_PHANDLE_ARGS
;
825 out_args
->node
= node
;
826 out_args
->args_count
= count
;
827 for (i
= 0; i
< count
; i
++) {
829 be32_to_cpup(list
++);
833 /* Found it! return success */
843 * Result will be one of:
844 * -ENOENT : index is for empty phandle
845 * -EINVAL : parsing error on data
846 * [1..n] : Number of phandle (count mode; when index = -1)
848 rc
= index
< 0 ? cur_index
: -ENOENT
;
853 int fdtdec_get_byte_array(const void *blob
, int node
, const char *prop_name
,
854 u8
*array
, int count
)
859 cell
= get_prop_check_min_len(blob
, node
, prop_name
, count
, &err
);
861 memcpy(array
, cell
, count
);
865 const u8
*fdtdec_locate_byte_array(const void *blob
, int node
,
866 const char *prop_name
, int count
)
871 cell
= get_prop_check_min_len(blob
, node
, prop_name
, count
, &err
);
877 u64
fdtdec_get_number(const fdt32_t
*ptr
, unsigned int cells
)
882 number
= (number
<< 32) | fdt32_to_cpu(*ptr
++);
887 int fdt_get_resource(const void *fdt
, int node
, const char *property
,
888 unsigned int index
, struct fdt_resource
*res
)
890 const fdt32_t
*ptr
, *end
;
891 int na
, ns
, len
, parent
;
894 parent
= fdt_parent_offset(fdt
, node
);
898 na
= fdt_address_cells(fdt
, parent
);
899 ns
= fdt_size_cells(fdt
, parent
);
901 ptr
= fdt_getprop(fdt
, node
, property
, &len
);
905 end
= ptr
+ len
/ sizeof(*ptr
);
907 while (ptr
+ na
+ ns
<= end
) {
909 if (CONFIG_IS_ENABLED(OF_TRANSLATE
))
910 res
->start
= fdt_translate_address(fdt
, node
, ptr
);
912 res
->start
= fdtdec_get_number(ptr
, na
);
914 res
->end
= res
->start
;
915 res
->end
+= fdtdec_get_number(&ptr
[na
], ns
) - 1;
923 return -FDT_ERR_NOTFOUND
;
926 int fdt_get_named_resource(const void *fdt
, int node
, const char *property
,
927 const char *prop_names
, const char *name
,
928 struct fdt_resource
*res
)
932 index
= fdt_stringlist_search(fdt
, node
, prop_names
, name
);
936 return fdt_get_resource(fdt
, node
, property
, index
, res
);
939 static int decode_timing_property(const void *blob
, int node
, const char *name
,
940 struct timing_entry
*result
)
945 prop
= fdt_getprop(blob
, node
, name
, &length
);
947 debug("%s: could not find property %s\n",
948 fdt_get_name(blob
, node
, NULL
), name
);
952 if (length
== sizeof(u32
)) {
953 result
->typ
= fdtdec_get_int(blob
, node
, name
, 0);
954 result
->min
= result
->typ
;
955 result
->max
= result
->typ
;
957 ret
= fdtdec_get_int_array(blob
, node
, name
, &result
->min
, 3);
963 int fdtdec_decode_display_timing(const void *blob
, int parent
, int index
,
964 struct display_timing
*dt
)
966 int i
, node
, timings_node
;
970 timings_node
= fdt_subnode_offset(blob
, parent
, "display-timings");
971 if (timings_node
< 0)
974 for (i
= 0, node
= fdt_first_subnode(blob
, timings_node
);
975 node
> 0 && i
!= index
;
976 node
= fdt_next_subnode(blob
, node
))
982 memset(dt
, 0, sizeof(*dt
));
984 ret
|= decode_timing_property(blob
, node
, "hback-porch",
986 ret
|= decode_timing_property(blob
, node
, "hfront-porch",
988 ret
|= decode_timing_property(blob
, node
, "hactive", &dt
->hactive
);
989 ret
|= decode_timing_property(blob
, node
, "hsync-len", &dt
->hsync_len
);
990 ret
|= decode_timing_property(blob
, node
, "vback-porch",
992 ret
|= decode_timing_property(blob
, node
, "vfront-porch",
994 ret
|= decode_timing_property(blob
, node
, "vactive", &dt
->vactive
);
995 ret
|= decode_timing_property(blob
, node
, "vsync-len", &dt
->vsync_len
);
996 ret
|= decode_timing_property(blob
, node
, "clock-frequency",
1000 val
= fdtdec_get_int(blob
, node
, "vsync-active", -1);
1002 dt
->flags
|= val
? DISPLAY_FLAGS_VSYNC_HIGH
:
1003 DISPLAY_FLAGS_VSYNC_LOW
;
1005 val
= fdtdec_get_int(blob
, node
, "hsync-active", -1);
1007 dt
->flags
|= val
? DISPLAY_FLAGS_HSYNC_HIGH
:
1008 DISPLAY_FLAGS_HSYNC_LOW
;
1010 val
= fdtdec_get_int(blob
, node
, "de-active", -1);
1012 dt
->flags
|= val
? DISPLAY_FLAGS_DE_HIGH
:
1013 DISPLAY_FLAGS_DE_LOW
;
1015 val
= fdtdec_get_int(blob
, node
, "pixelclk-active", -1);
1017 dt
->flags
|= val
? DISPLAY_FLAGS_PIXDATA_POSEDGE
:
1018 DISPLAY_FLAGS_PIXDATA_NEGEDGE
;
1021 if (fdtdec_get_bool(blob
, node
, "interlaced"))
1022 dt
->flags
|= DISPLAY_FLAGS_INTERLACED
;
1023 if (fdtdec_get_bool(blob
, node
, "doublescan"))
1024 dt
->flags
|= DISPLAY_FLAGS_DOUBLESCAN
;
1025 if (fdtdec_get_bool(blob
, node
, "doubleclk"))
1026 dt
->flags
|= DISPLAY_FLAGS_DOUBLECLK
;
1031 int fdtdec_setup_mem_size_base(void)
1035 struct resource res
;
1037 mem
= ofnode_path("/memory");
1038 if (!ofnode_valid(mem
)) {
1039 debug("%s: Missing /memory node\n", __func__
);
1043 ret
= ofnode_read_resource(mem
, 0, &res
);
1045 debug("%s: Unable to decode first memory bank\n", __func__
);
1049 gd
->ram_size
= (phys_size_t
)(res
.end
- res
.start
+ 1);
1050 gd
->ram_base
= (unsigned long)res
.start
;
1051 debug("%s: Initial DRAM size %llx\n", __func__
,
1052 (unsigned long long)gd
->ram_size
);
1057 ofnode
get_next_memory_node(ofnode mem
)
1060 mem
= ofnode_by_prop_value(mem
, "device_type", "memory", 7);
1061 } while (!ofnode_is_available(mem
));
1066 int fdtdec_setup_memory_banksize(void)
1068 int bank
, ret
, reg
= 0;
1069 struct resource res
;
1070 ofnode mem
= ofnode_null();
1072 mem
= get_next_memory_node(mem
);
1073 if (!ofnode_valid(mem
)) {
1074 debug("%s: Missing /memory node\n", __func__
);
1078 for (bank
= 0; bank
< CONFIG_NR_DRAM_BANKS
; bank
++) {
1079 ret
= ofnode_read_resource(mem
, reg
++, &res
);
1082 mem
= get_next_memory_node(mem
);
1083 if (!ofnode_valid(mem
))
1086 ret
= ofnode_read_resource(mem
, reg
++, &res
);
1094 gd
->bd
->bi_dram
[bank
].start
= (phys_addr_t
)res
.start
;
1095 gd
->bd
->bi_dram
[bank
].size
=
1096 (phys_size_t
)(res
.end
- res
.start
+ 1);
1098 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1100 (unsigned long long)gd
->bd
->bi_dram
[bank
].start
,
1101 (unsigned long long)gd
->bd
->bi_dram
[bank
].size
);
1107 int fdtdec_setup_mem_size_base_lowest(void)
1109 int bank
, ret
, reg
= 0;
1110 struct resource res
;
1113 ofnode mem
= ofnode_null();
1115 gd
->ram_base
= (unsigned long)~0;
1117 mem
= get_next_memory_node(mem
);
1118 if (!ofnode_valid(mem
)) {
1119 debug("%s: Missing /memory node\n", __func__
);
1123 for (bank
= 0; bank
< CONFIG_NR_DRAM_BANKS
; bank
++) {
1124 ret
= ofnode_read_resource(mem
, reg
++, &res
);
1127 mem
= get_next_memory_node(mem
);
1128 if (!ofnode_valid(mem
))
1131 ret
= ofnode_read_resource(mem
, reg
++, &res
);
1139 base
= (unsigned long)res
.start
;
1140 size
= (phys_size_t
)(res
.end
- res
.start
+ 1);
1142 if (gd
->ram_base
> base
&& size
) {
1143 gd
->ram_base
= base
;
1144 gd
->ram_size
= size
;
1145 debug("%s: Initial DRAM base %lx size %lx\n",
1146 __func__
, base
, (unsigned long)size
);
1153 static int uncompress_blob(const void *src
, ulong sz_src
, void **dstp
)
1155 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1156 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1157 size_t sz_out
= CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ
);
1158 bool gzip
= 0, lzo
= 0;
1159 ulong sz_in
= sz_src
;
1163 if (CONFIG_IS_ENABLED(GZIP
))
1164 if (gzip_parse_header(src
, sz_in
) >= 0)
1166 if (CONFIG_IS_ENABLED(LZO
))
1167 if (!gzip
&& lzop_is_valid_header(src
))
1174 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC
)) {
1175 dst
= malloc(sz_out
);
1177 puts("uncompress_blob: Unable to allocate memory\n");
1181 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1182 dst
= (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR
);
1188 if (CONFIG_IS_ENABLED(GZIP
) && gzip
)
1189 rc
= gunzip(dst
, sz_out
, (u8
*)src
, &sz_in
);
1190 else if (CONFIG_IS_ENABLED(LZO
) && lzo
)
1191 rc
= lzop_decompress(src
, sz_in
, dst
, &sz_out
);
1196 /* not a valid compressed blob */
1197 puts("uncompress_blob: Unable to uncompress\n");
1198 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC
))
1204 *dstp
= (void *)src
;
1205 *dstp
= (void *)src
;
1211 * fdt_find_separate() - Find a devicetree at the end of the image
1213 * Return: pointer to FDT blob
1215 static void *fdt_find_separate(void)
1217 void *fdt_blob
= NULL
;
1219 if (IS_ENABLED(CONFIG_SANDBOX
))
1222 #ifdef CONFIG_SPL_BUILD
1223 /* FDT is at end of BSS unless it is in a different memory region */
1224 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS
))
1225 fdt_blob
= (ulong
*)&_image_binary_end
;
1227 fdt_blob
= (ulong
*)&__bss_end
;
1229 /* FDT is at end of image */
1230 fdt_blob
= (ulong
*)&_end
;
1236 int fdtdec_set_ethernet_mac_address(void *fdt
, const u8
*mac
, size_t size
)
1241 if (!is_valid_ethaddr(mac
))
1244 path
= fdt_get_alias(fdt
, "ethernet");
1248 debug("ethernet alias found: %s\n", path
);
1250 offset
= fdt_path_offset(fdt
, path
);
1252 debug("ethernet alias points to absent node %s\n", path
);
1256 err
= fdt_setprop_inplace(fdt
, offset
, "local-mac-address", mac
, size
);
1260 debug("MAC address: %pM\n", mac
);
1265 static int fdtdec_init_reserved_memory(void *blob
)
1267 int na
, ns
, node
, err
;
1270 /* inherit #address-cells and #size-cells from the root node */
1271 na
= fdt_address_cells(blob
, 0);
1272 ns
= fdt_size_cells(blob
, 0);
1274 node
= fdt_add_subnode(blob
, 0, "reserved-memory");
1278 err
= fdt_setprop(blob
, node
, "ranges", NULL
, 0);
1282 value
= cpu_to_fdt32(ns
);
1284 err
= fdt_setprop(blob
, node
, "#size-cells", &value
, sizeof(value
));
1288 value
= cpu_to_fdt32(na
);
1290 err
= fdt_setprop(blob
, node
, "#address-cells", &value
, sizeof(value
));
1297 int fdtdec_add_reserved_memory(void *blob
, const char *basename
,
1298 const struct fdt_memory
*carveout
,
1299 const char **compatibles
, unsigned int count
,
1300 uint32_t *phandlep
, unsigned long flags
)
1302 fdt32_t cells
[4] = {}, *ptr
= cells
;
1303 uint32_t upper
, lower
, phandle
;
1304 int parent
, node
, na
, ns
, err
;
1308 /* create an empty /reserved-memory node if one doesn't exist */
1309 parent
= fdt_path_offset(blob
, "/reserved-memory");
1311 parent
= fdtdec_init_reserved_memory(blob
);
1316 /* only 1 or 2 #address-cells and #size-cells are supported */
1317 na
= fdt_address_cells(blob
, parent
);
1318 if (na
< 1 || na
> 2)
1319 return -FDT_ERR_BADNCELLS
;
1321 ns
= fdt_size_cells(blob
, parent
);
1322 if (ns
< 1 || ns
> 2)
1323 return -FDT_ERR_BADNCELLS
;
1325 /* find a matching node and return the phandle to that */
1326 fdt_for_each_subnode(node
, blob
, parent
) {
1327 const char *name
= fdt_get_name(blob
, node
, NULL
);
1331 addr
= fdtdec_get_addr_size_fixed(blob
, node
, "reg", 0, na
, ns
,
1333 if (addr
== FDT_ADDR_T_NONE
) {
1334 debug("failed to read address/size for %s\n", name
);
1338 if (addr
== carveout
->start
&& (addr
+ size
- 1) ==
1341 *phandlep
= fdt_get_phandle(blob
, node
);
1347 * Unpack the start address and generate the name of the new node
1348 * base on the basename and the unit-address.
1350 upper
= upper_32_bits(carveout
->start
);
1351 lower
= lower_32_bits(carveout
->start
);
1353 if (na
> 1 && upper
> 0)
1354 snprintf(name
, sizeof(name
), "%s@%x,%x", basename
, upper
,
1358 debug("address %08x:%08x exceeds addressable space\n",
1360 return -FDT_ERR_BADVALUE
;
1363 snprintf(name
, sizeof(name
), "%s@%x", basename
, lower
);
1366 node
= fdt_add_subnode(blob
, parent
, name
);
1370 if (flags
& FDTDEC_RESERVED_MEMORY_NO_MAP
) {
1371 err
= fdt_setprop(blob
, node
, "no-map", NULL
, 0);
1377 err
= fdt_generate_phandle(blob
, &phandle
);
1381 err
= fdtdec_set_phandle(blob
, node
, phandle
);
1386 /* store one or two address cells */
1388 *ptr
++ = cpu_to_fdt32(upper
);
1390 *ptr
++ = cpu_to_fdt32(lower
);
1392 /* store one or two size cells */
1393 size
= carveout
->end
- carveout
->start
+ 1;
1394 upper
= upper_32_bits(size
);
1395 lower
= lower_32_bits(size
);
1398 *ptr
++ = cpu_to_fdt32(upper
);
1400 *ptr
++ = cpu_to_fdt32(lower
);
1402 err
= fdt_setprop(blob
, node
, "reg", cells
, (na
+ ns
) * sizeof(*cells
));
1406 if (compatibles
&& count
> 0) {
1407 size_t length
= 0, len
= 0;
1411 for (i
= 0; i
< count
; i
++)
1412 length
+= strlen(compatibles
[i
]) + 1;
1414 buffer
= malloc(length
);
1416 return -FDT_ERR_INTERNAL
;
1418 for (i
= 0; i
< count
; i
++)
1419 len
+= strlcpy(buffer
+ len
, compatibles
[i
],
1422 err
= fdt_setprop(blob
, node
, "compatible", buffer
, length
);
1428 /* return the phandle for the new node for the caller to use */
1430 *phandlep
= phandle
;
1435 int fdtdec_get_carveout(const void *blob
, const char *node
,
1436 const char *prop_name
, unsigned int index
,
1437 struct fdt_memory
*carveout
, const char **name
,
1438 const char ***compatiblesp
, unsigned int *countp
,
1439 unsigned long *flags
)
1441 const fdt32_t
*prop
;
1446 offset
= fdt_path_offset(blob
, node
);
1450 prop
= fdt_getprop(blob
, offset
, prop_name
, &len
);
1452 debug("failed to get %s for %s\n", prop_name
, node
);
1453 return -FDT_ERR_NOTFOUND
;
1456 if ((len
% sizeof(phandle
)) != 0) {
1457 debug("invalid phandle property\n");
1458 return -FDT_ERR_BADPHANDLE
;
1461 if (len
< (sizeof(phandle
) * (index
+ 1))) {
1462 debug("invalid phandle index\n");
1463 return -FDT_ERR_NOTFOUND
;
1466 phandle
= fdt32_to_cpu(prop
[index
]);
1468 offset
= fdt_node_offset_by_phandle(blob
, phandle
);
1470 debug("failed to find node for phandle %u\n", phandle
);
1475 *name
= fdt_get_name(blob
, offset
, NULL
);
1478 const char **compatibles
= NULL
;
1479 const char *start
, *end
, *ptr
;
1480 unsigned int count
= 0;
1482 prop
= fdt_getprop(blob
, offset
, "compatible", &len
);
1486 start
= ptr
= (const char *)prop
;
1490 ptr
= strchrnul(ptr
, '\0');
1495 compatibles
= malloc(sizeof(ptr
) * count
);
1497 return -FDT_ERR_INTERNAL
;
1503 compatibles
[count
] = ptr
;
1504 ptr
= strchrnul(ptr
, '\0');
1510 *compatiblesp
= compatibles
;
1516 carveout
->start
= fdtdec_get_addr_size_auto_noparent(blob
, offset
,
1519 if (carveout
->start
== FDT_ADDR_T_NONE
) {
1520 debug("failed to read address/size from \"reg\" property\n");
1521 return -FDT_ERR_NOTFOUND
;
1524 carveout
->end
= carveout
->start
+ size
- 1;
1529 if (fdtdec_get_bool(blob
, offset
, "no-map"))
1530 *flags
|= FDTDEC_RESERVED_MEMORY_NO_MAP
;
1536 int fdtdec_set_carveout(void *blob
, const char *node
, const char *prop_name
,
1537 unsigned int index
, const struct fdt_memory
*carveout
,
1538 const char *name
, const char **compatibles
,
1539 unsigned int count
, unsigned long flags
)
1542 int err
, offset
, len
;
1546 err
= fdtdec_add_reserved_memory(blob
, name
, carveout
, compatibles
,
1547 count
, &phandle
, flags
);
1549 debug("failed to add reserved memory: %d\n", err
);
1553 offset
= fdt_path_offset(blob
, node
);
1555 debug("failed to find offset for node %s: %d\n", node
, offset
);
1559 value
= cpu_to_fdt32(phandle
);
1561 if (!fdt_getprop(blob
, offset
, prop_name
, &len
)) {
1562 if (len
== -FDT_ERR_NOTFOUND
)
1568 if ((index
+ 1) * sizeof(value
) > len
) {
1569 err
= fdt_setprop_placeholder(blob
, offset
, prop_name
,
1570 (index
+ 1) * sizeof(value
),
1573 debug("failed to resize reserved memory property: %s\n",
1579 err
= fdt_setprop_inplace_namelen_partial(blob
, offset
, prop_name
,
1581 index
* sizeof(value
),
1582 &value
, sizeof(value
));
1584 debug("failed to update %s property for node %s: %s\n",
1585 prop_name
, node
, fdt_strerror(err
));
1592 /* TODO(sjg@chromium.org): This function should not be weak */
1593 __weak
int fdtdec_board_setup(const void *fdt_blob
)
1599 * setup_multi_dtb_fit() - locate the correct dtb from a FIT
1601 * This supports the CONFIG_MULTI_DTB_FIT feature, looking for the dtb in a
1604 * It accepts the current value of gd->fdt_blob, which points to the FIT, then
1605 * updates that gd->fdt_blob, to point to the chosen dtb so that U-Boot uses the
1608 static void setup_multi_dtb_fit(void)
1613 * Try and uncompress the blob.
1614 * Unfortunately there is no way to know how big the input blob really
1615 * is. So let us set the maximum input size arbitrarily high. 16MB
1616 * ought to be more than enough for packed DTBs.
1618 if (uncompress_blob(gd
->fdt_blob
, 0x1000000, &blob
) == 0)
1619 gd
->fdt_blob
= blob
;
1622 * Check if blob is a FIT images containings DTBs.
1623 * If so, pick the most relevant
1625 blob
= locate_dtb_in_fit(gd
->fdt_blob
);
1627 gd_set_multi_dtb_fit(gd
->fdt_blob
);
1628 gd
->fdt_blob
= blob
;
1629 gd
->fdt_src
= FDTSRC_FIT
;
1633 int fdtdec_setup(void)
1637 /* The devicetree is typically appended to U-Boot */
1638 if (IS_ENABLED(CONFIG_OF_SEPARATE
)) {
1639 gd
->fdt_blob
= fdt_find_separate();
1640 gd
->fdt_src
= FDTSRC_SEPARATE
;
1641 } else { /* embed dtb in ELF file for testing / development */
1642 gd
->fdt_blob
= dtb_dt_embedded();
1643 gd
->fdt_src
= FDTSRC_EMBED
;
1646 /* Allow the board to override the fdt address. */
1647 if (IS_ENABLED(CONFIG_OF_BOARD
)) {
1648 gd
->fdt_blob
= board_fdt_blob_setup(&ret
);
1651 gd
->fdt_src
= FDTSRC_BOARD
;
1654 /* Allow the early environment to override the fdt address */
1655 if (!IS_ENABLED(CONFIG_SPL_BUILD
)) {
1658 addr
= env_get_hex("fdtcontroladdr", 0);
1660 gd
->fdt_blob
= map_sysmem(addr
, 0);
1661 gd
->fdt_src
= FDTSRC_ENV
;
1665 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT
))
1666 setup_multi_dtb_fit();
1668 ret
= fdtdec_prepare_fdt();
1670 ret
= fdtdec_board_setup(gd
->fdt_blob
);
1674 int fdtdec_resetup(int *rescan
)
1679 * If the current DTB is part of a compressed FIT image,
1680 * try to locate the best match from the uncompressed
1681 * FIT image stillpresent there. Save the time and space
1682 * required to uncompress it again.
1684 if (gd_multi_dtb_fit()) {
1685 fdt_blob
= locate_dtb_in_fit(gd_multi_dtb_fit());
1687 if (fdt_blob
== gd
->fdt_blob
) {
1689 * The best match did not change. no need to tear down
1690 * the DM and rescan the fdt.
1697 gd
->fdt_blob
= fdt_blob
;
1698 return fdtdec_prepare_fdt();
1702 * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
1703 * not a FIT image containings DTB, but a single DTB. There is no need
1704 * to teard down DM and rescan the DT in this case.
1710 int fdtdec_decode_ram_size(const void *blob
, const char *area
, int board_id
,
1711 phys_addr_t
*basep
, phys_size_t
*sizep
,
1714 int addr_cells
, size_cells
;
1715 const u32
*cell
, *end
;
1716 u64 total_size
, size
, addr
;
1722 debug("%s: board_id=%d\n", __func__
, board_id
);
1725 node
= fdt_path_offset(blob
, area
);
1727 debug("No %s node found\n", area
);
1731 cell
= fdt_getprop(blob
, node
, "reg", &len
);
1733 debug("No reg property found\n");
1737 addr_cells
= fdt_address_cells(blob
, node
);
1738 size_cells
= fdt_size_cells(blob
, node
);
1740 /* Check the board id and mask */
1741 for (child
= fdt_first_subnode(blob
, node
);
1743 child
= fdt_next_subnode(blob
, child
)) {
1744 int match_mask
, match_value
;
1746 match_mask
= fdtdec_get_int(blob
, child
, "match-mask", -1);
1747 match_value
= fdtdec_get_int(blob
, child
, "match-value", -1);
1749 if (match_value
>= 0 &&
1750 ((board_id
& match_mask
) == match_value
)) {
1751 /* Found matching mask */
1752 debug("Found matching mask %d\n", match_mask
);
1754 cell
= fdt_getprop(blob
, node
, "reg", &len
);
1756 debug("No memory-banks property found\n");
1762 /* Note: if no matching subnode was found we use the parent node */
1765 memset(bd
->bi_dram
, '\0', sizeof(bd
->bi_dram
[0]) *
1766 CONFIG_NR_DRAM_BANKS
);
1769 auto_size
= fdtdec_get_bool(blob
, node
, "auto-size");
1772 end
= cell
+ len
/ 4 - addr_cells
- size_cells
;
1773 debug("cell at %p, end %p\n", cell
, end
);
1774 for (bank
= 0; bank
< CONFIG_NR_DRAM_BANKS
; bank
++) {
1778 if (addr_cells
== 2)
1779 addr
+= (u64
)fdt32_to_cpu(*cell
++) << 32UL;
1780 addr
+= fdt32_to_cpu(*cell
++);
1782 bd
->bi_dram
[bank
].start
= addr
;
1784 *basep
= (phys_addr_t
)addr
;
1787 if (size_cells
== 2)
1788 size
+= (u64
)fdt32_to_cpu(*cell
++) << 32UL;
1789 size
+= fdt32_to_cpu(*cell
++);
1794 debug("Auto-sizing %llx, size %llx: ", addr
, size
);
1795 new_size
= get_ram_size((long *)(uintptr_t)addr
, size
);
1796 if (new_size
== size
) {
1799 debug("sized to %llx\n", new_size
);
1805 bd
->bi_dram
[bank
].size
= size
;
1809 debug("Memory size %llu\n", total_size
);
1811 *sizep
= (phys_size_t
)total_size
;
1816 #endif /* !USE_HOSTCC */