2 * Copyright (c) 2011 The Chromium OS Authors.
3 * SPDX-License-Identifier: GPL-2.0+
12 #include <fdt_support.h>
14 #include <asm/sections.h>
15 #include <dm/of_extra.h>
16 #include <linux/ctype.h>
18 DECLARE_GLOBAL_DATA_PTR
;
21 * Here are the type we know about. One day we might allow drivers to
22 * register. For now we just put them here. The COMPAT macro allows us to
23 * turn this into a sparse list later, and keeps the ID with the name.
25 * NOTE: This list is basically a TODO list for things that need to be
26 * converted to driver model. So don't add new things here unless there is a
27 * good reason why driver-model conversion is infeasible. Examples include
28 * things which are used before driver model is available.
30 #define COMPAT(id, name) name
31 static const char * const compat_names
[COMPAT_COUNT
] = {
32 COMPAT(UNKNOWN
, "<none>"),
33 COMPAT(NVIDIA_TEGRA20_EMC
, "nvidia,tegra20-emc"),
34 COMPAT(NVIDIA_TEGRA20_EMC_TABLE
, "nvidia,tegra20-emc-table"),
35 COMPAT(NVIDIA_TEGRA20_NAND
, "nvidia,tegra20-nand"),
36 COMPAT(NVIDIA_TEGRA124_PMC
, "nvidia,tegra124-pmc"),
37 COMPAT(NVIDIA_TEGRA186_SDMMC
, "nvidia,tegra186-sdhci"),
38 COMPAT(NVIDIA_TEGRA210_SDMMC
, "nvidia,tegra210-sdhci"),
39 COMPAT(NVIDIA_TEGRA124_SDMMC
, "nvidia,tegra124-sdhci"),
40 COMPAT(NVIDIA_TEGRA30_SDMMC
, "nvidia,tegra30-sdhci"),
41 COMPAT(NVIDIA_TEGRA20_SDMMC
, "nvidia,tegra20-sdhci"),
42 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL
, "nvidia,tegra124-xusb-padctl"),
43 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL
, "nvidia,tegra210-xusb-padctl"),
44 COMPAT(SMSC_LAN9215
, "smsc,lan9215"),
45 COMPAT(SAMSUNG_EXYNOS5_SROMC
, "samsung,exynos-sromc"),
46 COMPAT(SAMSUNG_S3C2440_I2C
, "samsung,s3c2440-i2c"),
47 COMPAT(SAMSUNG_EXYNOS5_SOUND
, "samsung,exynos-sound"),
48 COMPAT(WOLFSON_WM8994_CODEC
, "wolfson,wm8994-codec"),
49 COMPAT(SAMSUNG_EXYNOS_USB_PHY
, "samsung,exynos-usb-phy"),
50 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY
, "samsung,exynos5250-usb3-phy"),
51 COMPAT(SAMSUNG_EXYNOS_TMU
, "samsung,exynos-tmu"),
52 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI
, "samsung,exynos-mipi-dsi"),
53 COMPAT(SAMSUNG_EXYNOS_DWMMC
, "samsung,exynos-dwmmc"),
54 COMPAT(SAMSUNG_EXYNOS_MMC
, "samsung,exynos-mmc"),
55 COMPAT(MAXIM_MAX77686_PMIC
, "maxim,max77686"),
56 COMPAT(GENERIC_SPI_FLASH
, "spi-flash"),
57 COMPAT(MAXIM_98095_CODEC
, "maxim,max98095-codec"),
58 COMPAT(SAMSUNG_EXYNOS5_I2C
, "samsung,exynos5-hsi2c"),
59 COMPAT(SAMSUNG_EXYNOS_SYSMMU
, "samsung,sysmmu-v3.3"),
60 COMPAT(INTEL_MICROCODE
, "intel,microcode"),
61 COMPAT(AMS_AS3722
, "ams,as3722"),
62 COMPAT(INTEL_QRK_MRC
, "intel,quark-mrc"),
63 COMPAT(ALTERA_SOCFPGA_DWMAC
, "altr,socfpga-stmmac"),
64 COMPAT(ALTERA_SOCFPGA_DWMMC
, "altr,socfpga-dw-mshc"),
65 COMPAT(ALTERA_SOCFPGA_DWC2USB
, "snps,dwc2"),
66 COMPAT(INTEL_BAYTRAIL_FSP
, "intel,baytrail-fsp"),
67 COMPAT(INTEL_BAYTRAIL_FSP_MDP
, "intel,baytrail-fsp-mdp"),
68 COMPAT(INTEL_IVYBRIDGE_FSP
, "intel,ivybridge-fsp"),
69 COMPAT(COMPAT_SUNXI_NAND
, "allwinner,sun4i-a10-nand"),
70 COMPAT(ALTERA_SOCFPGA_CLK
, "altr,clk-mgr"),
71 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE
, "pinctrl-single"),
72 COMPAT(ALTERA_SOCFPGA_H2F_BRG
, "altr,socfpga-hps2fpga-bridge"),
73 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG
, "altr,socfpga-lwhps2fpga-bridge"),
74 COMPAT(ALTERA_SOCFPGA_F2H_BRG
, "altr,socfpga-fpga2hps-bridge"),
75 COMPAT(ALTERA_SOCFPGA_F2SDR0
, "altr,socfpga-fpga2sdram0-bridge"),
76 COMPAT(ALTERA_SOCFPGA_F2SDR1
, "altr,socfpga-fpga2sdram1-bridge"),
77 COMPAT(ALTERA_SOCFPGA_F2SDR2
, "altr,socfpga-fpga2sdram2-bridge"),
80 const char *fdtdec_get_compatible(enum fdt_compat_id id
)
82 /* We allow reading of the 'unknown' ID for testing purposes */
83 assert(id
>= 0 && id
< COMPAT_COUNT
);
84 return compat_names
[id
];
87 fdt_addr_t
fdtdec_get_addr_size_fixed(const void *blob
, int node
,
88 const char *prop_name
, int index
, int na
, int ns
,
89 fdt_size_t
*sizep
, bool translate
)
91 const fdt32_t
*prop
, *prop_end
;
92 const fdt32_t
*prop_addr
, *prop_size
, *prop_after_size
;
96 debug("%s: %s: ", __func__
, prop_name
);
98 if (na
> (sizeof(fdt_addr_t
) / sizeof(fdt32_t
))) {
99 debug("(na too large for fdt_addr_t type)\n");
100 return FDT_ADDR_T_NONE
;
103 if (ns
> (sizeof(fdt_size_t
) / sizeof(fdt32_t
))) {
104 debug("(ns too large for fdt_size_t type)\n");
105 return FDT_ADDR_T_NONE
;
108 prop
= fdt_getprop(blob
, node
, prop_name
, &len
);
110 debug("(not found)\n");
111 return FDT_ADDR_T_NONE
;
113 prop_end
= prop
+ (len
/ sizeof(*prop
));
115 prop_addr
= prop
+ (index
* (na
+ ns
));
116 prop_size
= prop_addr
+ na
;
117 prop_after_size
= prop_size
+ ns
;
118 if (prop_after_size
> prop_end
) {
119 debug("(not enough data: expected >= %d cells, got %d cells)\n",
120 (u32
)(prop_after_size
- prop
), ((u32
)(prop_end
- prop
)));
121 return FDT_ADDR_T_NONE
;
124 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
126 addr
= fdt_translate_address(blob
, node
, prop_addr
);
129 addr
= fdtdec_get_number(prop_addr
, na
);
132 *sizep
= fdtdec_get_number(prop_size
, ns
);
133 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr
,
134 (unsigned long long)*sizep
);
136 debug("addr=%08llx\n", (unsigned long long)addr
);
142 fdt_addr_t
fdtdec_get_addr_size_auto_parent(const void *blob
, int parent
,
143 int node
, const char *prop_name
, int index
, fdt_size_t
*sizep
,
148 debug("%s: ", __func__
);
150 na
= fdt_address_cells(blob
, parent
);
152 debug("(bad #address-cells)\n");
153 return FDT_ADDR_T_NONE
;
156 ns
= fdt_size_cells(blob
, parent
);
158 debug("(bad #size-cells)\n");
159 return FDT_ADDR_T_NONE
;
162 debug("na=%d, ns=%d, ", na
, ns
);
164 return fdtdec_get_addr_size_fixed(blob
, node
, prop_name
, index
, na
,
165 ns
, sizep
, translate
);
168 fdt_addr_t
fdtdec_get_addr_size_auto_noparent(const void *blob
, int node
,
169 const char *prop_name
, int index
, fdt_size_t
*sizep
,
174 debug("%s: ", __func__
);
176 parent
= fdt_parent_offset(blob
, node
);
178 debug("(no parent found)\n");
179 return FDT_ADDR_T_NONE
;
182 return fdtdec_get_addr_size_auto_parent(blob
, parent
, node
, prop_name
,
183 index
, sizep
, translate
);
186 fdt_addr_t
fdtdec_get_addr_size(const void *blob
, int node
,
187 const char *prop_name
, fdt_size_t
*sizep
)
189 int ns
= sizep
? (sizeof(fdt_size_t
) / sizeof(fdt32_t
)) : 0;
191 return fdtdec_get_addr_size_fixed(blob
, node
, prop_name
, 0,
192 sizeof(fdt_addr_t
) / sizeof(fdt32_t
),
196 fdt_addr_t
fdtdec_get_addr(const void *blob
, int node
,
197 const char *prop_name
)
199 return fdtdec_get_addr_size(blob
, node
, prop_name
, NULL
);
202 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
203 int fdtdec_get_pci_addr(const void *blob
, int node
, enum fdt_pci_space type
,
204 const char *prop_name
, struct fdt_pci_addr
*addr
)
210 debug("%s: %s: ", __func__
, prop_name
);
213 * If we follow the pci bus bindings strictly, we should check
214 * the value of the node's parent node's #address-cells and
215 * #size-cells. They need to be 3 and 2 accordingly. However,
216 * for simplicity we skip the check here.
218 cell
= fdt_getprop(blob
, node
, prop_name
, &len
);
222 if ((len
% FDT_PCI_REG_SIZE
) == 0) {
223 int num
= len
/ FDT_PCI_REG_SIZE
;
226 for (i
= 0; i
< num
; i
++) {
227 debug("pci address #%d: %08lx %08lx %08lx\n", i
,
228 (ulong
)fdt32_to_cpu(cell
[0]),
229 (ulong
)fdt32_to_cpu(cell
[1]),
230 (ulong
)fdt32_to_cpu(cell
[2]));
231 if ((fdt32_to_cpu(*cell
) & type
) == type
) {
232 addr
->phys_hi
= fdt32_to_cpu(cell
[0]);
233 addr
->phys_mid
= fdt32_to_cpu(cell
[1]);
234 addr
->phys_lo
= fdt32_to_cpu(cell
[1]);
237 cell
+= (FDT_PCI_ADDR_CELLS
+
253 debug("(not found)\n");
257 int fdtdec_get_pci_vendev(const void *blob
, int node
, u16
*vendor
, u16
*device
)
259 const char *list
, *end
;
262 list
= fdt_getprop(blob
, node
, "compatible", &len
);
271 if (len
>= strlen("pciVVVV,DDDD")) {
272 s
= strstr(list
, "pci");
275 * check if the string is something like pciVVVV,DDDD.RR
276 * or just pciVVVV,DDDD
278 if (s
&& s
[7] == ',' &&
279 (s
[12] == '.' || s
[12] == 0)) {
281 *vendor
= simple_strtol(s
, NULL
, 16);
284 *device
= simple_strtol(s
, NULL
, 16);
295 int fdtdec_get_pci_bar32(struct udevice
*dev
, struct fdt_pci_addr
*addr
,
300 /* extract the bar number from fdt_pci_addr */
301 barnum
= addr
->phys_hi
& 0xff;
302 if ((barnum
< PCI_BASE_ADDRESS_0
) || (barnum
> PCI_CARDBUS_CIS
))
305 barnum
= (barnum
- PCI_BASE_ADDRESS_0
) / 4;
306 *bar
= dm_pci_read_bar32(dev
, barnum
);
312 uint64_t fdtdec_get_uint64(const void *blob
, int node
, const char *prop_name
,
313 uint64_t default_val
)
315 const uint64_t *cell64
;
318 cell64
= fdt_getprop(blob
, node
, prop_name
, &length
);
319 if (!cell64
|| length
< sizeof(*cell64
))
322 return fdt64_to_cpu(*cell64
);
325 int fdtdec_get_is_enabled(const void *blob
, int node
)
330 * It should say "okay", so only allow that. Some fdts use "ok" but
331 * this is a bug. Please fix your device tree source file. See here
334 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
336 cell
= fdt_getprop(blob
, node
, "status", NULL
);
338 return 0 == strcmp(cell
, "okay");
342 enum fdt_compat_id
fdtdec_lookup(const void *blob
, int node
)
344 enum fdt_compat_id id
;
346 /* Search our drivers */
347 for (id
= COMPAT_UNKNOWN
; id
< COMPAT_COUNT
; id
++)
348 if (0 == fdt_node_check_compatible(blob
, node
,
351 return COMPAT_UNKNOWN
;
354 int fdtdec_next_compatible(const void *blob
, int node
,
355 enum fdt_compat_id id
)
357 return fdt_node_offset_by_compatible(blob
, node
, compat_names
[id
]);
360 int fdtdec_next_compatible_subnode(const void *blob
, int node
,
361 enum fdt_compat_id id
, int *depthp
)
364 node
= fdt_next_node(blob
, node
, depthp
);
365 } while (*depthp
> 1);
367 /* If this is a direct subnode, and compatible, return it */
368 if (*depthp
== 1 && 0 == fdt_node_check_compatible(
369 blob
, node
, compat_names
[id
]))
372 return -FDT_ERR_NOTFOUND
;
375 int fdtdec_next_alias(const void *blob
, const char *name
,
376 enum fdt_compat_id id
, int *upto
)
378 #define MAX_STR_LEN 20
379 char str
[MAX_STR_LEN
+ 20];
382 /* snprintf() is not available */
383 assert(strlen(name
) < MAX_STR_LEN
);
384 sprintf(str
, "%.*s%d", MAX_STR_LEN
, name
, *upto
);
385 node
= fdt_path_offset(blob
, str
);
388 err
= fdt_node_check_compatible(blob
, node
, compat_names
[id
]);
392 return -FDT_ERR_NOTFOUND
;
397 int fdtdec_find_aliases_for_id(const void *blob
, const char *name
,
398 enum fdt_compat_id id
, int *node_list
, int maxcount
)
400 memset(node_list
, '\0', sizeof(*node_list
) * maxcount
);
402 return fdtdec_add_aliases_for_id(blob
, name
, id
, node_list
, maxcount
);
405 /* TODO: Can we tighten this code up a little? */
406 int fdtdec_add_aliases_for_id(const void *blob
, const char *name
,
407 enum fdt_compat_id id
, int *node_list
, int maxcount
)
409 int name_len
= strlen(name
);
417 /* find the alias node if present */
418 alias_node
= fdt_path_offset(blob
, "/aliases");
421 * start with nothing, and we can assume that the root node can't
424 memset(nodes
, '\0', sizeof(nodes
));
426 /* First find all the compatible nodes */
427 for (node
= count
= 0; node
>= 0 && count
< maxcount
;) {
428 node
= fdtdec_next_compatible(blob
, node
, id
);
430 nodes
[count
++] = node
;
433 debug("%s: warning: maxcount exceeded with alias '%s'\n",
436 /* Now find all the aliases */
437 for (offset
= fdt_first_property_offset(blob
, alias_node
);
439 offset
= fdt_next_property_offset(blob
, offset
)) {
440 const struct fdt_property
*prop
;
446 prop
= fdt_get_property_by_offset(blob
, offset
, NULL
);
447 path
= fdt_string(blob
, fdt32_to_cpu(prop
->nameoff
));
448 if (prop
->len
&& 0 == strncmp(path
, name
, name_len
))
449 node
= fdt_path_offset(blob
, prop
->data
);
453 /* Get the alias number */
454 number
= simple_strtoul(path
+ name_len
, NULL
, 10);
455 if (number
< 0 || number
>= maxcount
) {
456 debug("%s: warning: alias '%s' is out of range\n",
461 /* Make sure the node we found is actually in our list! */
463 for (j
= 0; j
< count
; j
++)
464 if (nodes
[j
] == node
) {
470 debug("%s: warning: alias '%s' points to a node "
471 "'%s' that is missing or is not compatible "
472 " with '%s'\n", __func__
, path
,
473 fdt_get_name(blob
, node
, NULL
),
479 * Add this node to our list in the right place, and mark
482 if (fdtdec_get_is_enabled(blob
, node
)) {
483 if (node_list
[number
]) {
484 debug("%s: warning: alias '%s' requires that "
485 "a node be placed in the list in a "
486 "position which is already filled by "
487 "node '%s'\n", __func__
, path
,
488 fdt_get_name(blob
, node
, NULL
));
491 node_list
[number
] = node
;
492 if (number
>= num_found
)
493 num_found
= number
+ 1;
498 /* Add any nodes not mentioned by an alias */
499 for (i
= j
= 0; i
< maxcount
; i
++) {
501 for (; j
< maxcount
; j
++)
503 fdtdec_get_is_enabled(blob
, nodes
[j
]))
506 /* Have we run out of nodes to add? */
510 assert(!node_list
[i
]);
511 node_list
[i
] = nodes
[j
++];
520 int fdtdec_get_alias_seq(const void *blob
, const char *base
, int offset
,
523 int base_len
= strlen(base
);
524 const char *find_name
;
529 find_name
= fdt_get_name(blob
, offset
, &find_namelen
);
530 debug("Looking for '%s' at %d, name %s\n", base
, offset
, find_name
);
532 aliases
= fdt_path_offset(blob
, "/aliases");
533 for (prop_offset
= fdt_first_property_offset(blob
, aliases
);
535 prop_offset
= fdt_next_property_offset(blob
, prop_offset
)) {
541 prop
= fdt_getprop_by_offset(blob
, prop_offset
, &name
, &len
);
542 debug(" - %s, %s\n", name
, prop
);
543 if (len
< find_namelen
|| *prop
!= '/' || prop
[len
- 1] ||
544 strncmp(name
, base
, base_len
))
547 slash
= strrchr(prop
, '/');
548 if (strcmp(slash
+ 1, find_name
))
550 val
= trailing_strtol(name
);
553 debug("Found seq %d\n", *seqp
);
558 debug("Not found\n");
562 const char *fdtdec_get_chosen_prop(const void *blob
, const char *name
)
568 chosen_node
= fdt_path_offset(blob
, "/chosen");
569 return fdt_getprop(blob
, chosen_node
, name
, NULL
);
572 int fdtdec_get_chosen_node(const void *blob
, const char *name
)
576 prop
= fdtdec_get_chosen_prop(blob
, name
);
578 return -FDT_ERR_NOTFOUND
;
579 return fdt_path_offset(blob
, prop
);
582 int fdtdec_check_fdt(void)
585 * We must have an FDT, but we cannot panic() yet since the console
586 * is not ready. So for now, just assert(). Boards which need an early
587 * FDT (prior to console ready) will need to make their own
588 * arrangements and do their own checks.
590 assert(!fdtdec_prepare_fdt());
595 * This function is a little odd in that it accesses global data. At some
596 * point if the architecture board.c files merge this will make more sense.
597 * Even now, it is common code.
599 int fdtdec_prepare_fdt(void)
601 if (!gd
->fdt_blob
|| ((uintptr_t)gd
->fdt_blob
& 3) ||
602 fdt_check_header(gd
->fdt_blob
)) {
603 #ifdef CONFIG_SPL_BUILD
604 puts("Missing DTB\n");
606 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
609 printf("fdt_blob=%p\n", gd
->fdt_blob
);
610 print_buffer((ulong
)gd
->fdt_blob
, gd
->fdt_blob
, 4,
620 int fdtdec_lookup_phandle(const void *blob
, int node
, const char *prop_name
)
625 debug("%s: %s\n", __func__
, prop_name
);
626 phandle
= fdt_getprop(blob
, node
, prop_name
, NULL
);
628 return -FDT_ERR_NOTFOUND
;
630 lookup
= fdt_node_offset_by_phandle(blob
, fdt32_to_cpu(*phandle
));
635 * Look up a property in a node and check that it has a minimum length.
637 * @param blob FDT blob
638 * @param node node to examine
639 * @param prop_name name of property to find
640 * @param min_len minimum property length in bytes
641 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
642 found, or -FDT_ERR_BADLAYOUT if not enough data
643 * @return pointer to cell, which is only valid if err == 0
645 static const void *get_prop_check_min_len(const void *blob
, int node
,
646 const char *prop_name
, int min_len
, int *err
)
651 debug("%s: %s\n", __func__
, prop_name
);
652 cell
= fdt_getprop(blob
, node
, prop_name
, &len
);
654 *err
= -FDT_ERR_NOTFOUND
;
655 else if (len
< min_len
)
656 *err
= -FDT_ERR_BADLAYOUT
;
662 int fdtdec_get_int_array(const void *blob
, int node
, const char *prop_name
,
663 u32
*array
, int count
)
668 debug("%s: %s\n", __func__
, prop_name
);
669 cell
= get_prop_check_min_len(blob
, node
, prop_name
,
670 sizeof(u32
) * count
, &err
);
672 for (i
= 0; i
< count
; i
++)
673 array
[i
] = fdt32_to_cpu(cell
[i
]);
678 int fdtdec_get_int_array_count(const void *blob
, int node
,
679 const char *prop_name
, u32
*array
, int count
)
685 debug("%s: %s\n", __func__
, prop_name
);
686 cell
= fdt_getprop(blob
, node
, prop_name
, &len
);
688 return -FDT_ERR_NOTFOUND
;
689 elems
= len
/ sizeof(u32
);
692 for (i
= 0; i
< count
; i
++)
693 array
[i
] = fdt32_to_cpu(cell
[i
]);
698 const u32
*fdtdec_locate_array(const void *blob
, int node
,
699 const char *prop_name
, int count
)
704 cell
= get_prop_check_min_len(blob
, node
, prop_name
,
705 sizeof(u32
) * count
, &err
);
706 return err
? NULL
: cell
;
709 int fdtdec_get_bool(const void *blob
, int node
, const char *prop_name
)
714 debug("%s: %s\n", __func__
, prop_name
);
715 cell
= fdt_getprop(blob
, node
, prop_name
, &len
);
719 int fdtdec_parse_phandle_with_args(const void *blob
, int src_node
,
720 const char *list_name
,
721 const char *cells_name
,
722 int cell_count
, int index
,
723 struct fdtdec_phandle_args
*out_args
)
725 const __be32
*list
, *list_end
;
726 int rc
= 0, size
, cur_index
= 0;
731 /* Retrieve the phandle list property */
732 list
= fdt_getprop(blob
, src_node
, list_name
, &size
);
735 list_end
= list
+ size
/ sizeof(*list
);
737 /* Loop over the phandles until all the requested entry is found */
738 while (list
< list_end
) {
743 * If phandle is 0, then it is an empty entry with no
744 * arguments. Skip forward to the next entry.
746 phandle
= be32_to_cpup(list
++);
749 * Find the provider node and parse the #*-cells
750 * property to determine the argument length.
752 * This is not needed if the cell count is hard-coded
753 * (i.e. cells_name not set, but cell_count is set),
754 * except when we're going to return the found node
757 if (cells_name
|| cur_index
== index
) {
758 node
= fdt_node_offset_by_phandle(blob
,
761 debug("%s: could not find phandle\n",
762 fdt_get_name(blob
, src_node
,
769 count
= fdtdec_get_int(blob
, node
, cells_name
,
772 debug("%s: could not get %s for %s\n",
773 fdt_get_name(blob
, src_node
,
776 fdt_get_name(blob
, node
,
785 * Make sure that the arguments actually fit in the
786 * remaining property data length
788 if (list
+ count
> list_end
) {
789 debug("%s: arguments longer than property\n",
790 fdt_get_name(blob
, src_node
, NULL
));
796 * All of the error cases above bail out of the loop, so at
797 * this point, the parsing is successful. If the requested
798 * index matches, then fill the out_args structure and return,
799 * or return -ENOENT for an empty entry.
802 if (cur_index
== index
) {
809 if (count
> MAX_PHANDLE_ARGS
) {
810 debug("%s: too many arguments %d\n",
811 fdt_get_name(blob
, src_node
,
813 count
= MAX_PHANDLE_ARGS
;
815 out_args
->node
= node
;
816 out_args
->args_count
= count
;
817 for (i
= 0; i
< count
; i
++) {
819 be32_to_cpup(list
++);
823 /* Found it! return success */
833 * Result will be one of:
834 * -ENOENT : index is for empty phandle
835 * -EINVAL : parsing error on data
836 * [1..n] : Number of phandle (count mode; when index = -1)
838 rc
= index
< 0 ? cur_index
: -ENOENT
;
843 int fdtdec_get_child_count(const void *blob
, int node
)
848 fdt_for_each_subnode(subnode
, blob
, node
)
854 int fdtdec_get_byte_array(const void *blob
, int node
, const char *prop_name
,
855 u8
*array
, int count
)
860 cell
= get_prop_check_min_len(blob
, node
, prop_name
, count
, &err
);
862 memcpy(array
, cell
, count
);
866 const u8
*fdtdec_locate_byte_array(const void *blob
, int node
,
867 const char *prop_name
, int count
)
872 cell
= get_prop_check_min_len(blob
, node
, prop_name
, count
, &err
);
878 int fdtdec_get_config_int(const void *blob
, const char *prop_name
,
883 debug("%s: %s\n", __func__
, prop_name
);
884 config_node
= fdt_path_offset(blob
, "/config");
887 return fdtdec_get_int(blob
, config_node
, prop_name
, default_val
);
890 int fdtdec_get_config_bool(const void *blob
, const char *prop_name
)
895 debug("%s: %s\n", __func__
, prop_name
);
896 config_node
= fdt_path_offset(blob
, "/config");
899 prop
= fdt_get_property(blob
, config_node
, prop_name
, NULL
);
904 char *fdtdec_get_config_string(const void *blob
, const char *prop_name
)
910 debug("%s: %s\n", __func__
, prop_name
);
911 nodeoffset
= fdt_path_offset(blob
, "/config");
915 nodep
= fdt_getprop(blob
, nodeoffset
, prop_name
, &len
);
919 return (char *)nodep
;
922 int fdtdec_decode_region(const void *blob
, int node
, const char *prop_name
,
923 fdt_addr_t
*basep
, fdt_size_t
*sizep
)
925 const fdt_addr_t
*cell
;
928 debug("%s: %s: %s\n", __func__
, fdt_get_name(blob
, node
, NULL
),
930 cell
= fdt_getprop(blob
, node
, prop_name
, &len
);
931 if (!cell
|| (len
< sizeof(fdt_addr_t
) * 2)) {
932 debug("cell=%p, len=%d\n", cell
, len
);
936 *basep
= fdt_addr_to_cpu(*cell
);
937 *sizep
= fdt_size_to_cpu(cell
[1]);
938 debug("%s: base=%08lx, size=%lx\n", __func__
, (ulong
)*basep
,
944 u64
fdtdec_get_number(const fdt32_t
*ptr
, unsigned int cells
)
949 number
= (number
<< 32) | fdt32_to_cpu(*ptr
++);
954 int fdt_get_resource(const void *fdt
, int node
, const char *property
,
955 unsigned int index
, struct fdt_resource
*res
)
957 const fdt32_t
*ptr
, *end
;
958 int na
, ns
, len
, parent
;
961 parent
= fdt_parent_offset(fdt
, node
);
965 na
= fdt_address_cells(fdt
, parent
);
966 ns
= fdt_size_cells(fdt
, parent
);
968 ptr
= fdt_getprop(fdt
, node
, property
, &len
);
972 end
= ptr
+ len
/ sizeof(*ptr
);
974 while (ptr
+ na
+ ns
<= end
) {
976 res
->start
= res
->end
= fdtdec_get_number(ptr
, na
);
977 res
->end
+= fdtdec_get_number(&ptr
[na
], ns
) - 1;
985 return -FDT_ERR_NOTFOUND
;
988 int fdt_get_named_resource(const void *fdt
, int node
, const char *property
,
989 const char *prop_names
, const char *name
,
990 struct fdt_resource
*res
)
994 index
= fdt_stringlist_search(fdt
, node
, prop_names
, name
);
998 return fdt_get_resource(fdt
, node
, property
, index
, res
);
1001 int fdtdec_decode_memory_region(const void *blob
, int config_node
,
1002 const char *mem_type
, const char *suffix
,
1003 fdt_addr_t
*basep
, fdt_size_t
*sizep
)
1007 fdt_size_t size
, offset_size
;
1008 fdt_addr_t base
, offset
;
1011 if (config_node
== -1) {
1012 config_node
= fdt_path_offset(blob
, "/config");
1013 if (config_node
< 0) {
1014 debug("%s: Cannot find /config node\n", __func__
);
1021 snprintf(prop_name
, sizeof(prop_name
), "%s-memory%s", mem_type
,
1023 mem
= fdt_getprop(blob
, config_node
, prop_name
, NULL
);
1025 debug("%s: No memory type for '%s', using /memory\n", __func__
,
1030 node
= fdt_path_offset(blob
, mem
);
1032 debug("%s: Failed to find node '%s': %s\n", __func__
, mem
,
1033 fdt_strerror(node
));
1038 * Not strictly correct - the memory may have multiple banks. We just
1041 if (fdtdec_decode_region(blob
, node
, "reg", &base
, &size
)) {
1042 debug("%s: Failed to decode memory region %s\n", __func__
,
1047 snprintf(prop_name
, sizeof(prop_name
), "%s-offset%s", mem_type
,
1049 if (fdtdec_decode_region(blob
, config_node
, prop_name
, &offset
,
1051 debug("%s: Failed to decode memory region '%s'\n", __func__
,
1056 *basep
= base
+ offset
;
1057 *sizep
= offset_size
;
1062 static int decode_timing_property(const void *blob
, int node
, const char *name
,
1063 struct timing_entry
*result
)
1065 int length
, ret
= 0;
1068 prop
= fdt_getprop(blob
, node
, name
, &length
);
1070 debug("%s: could not find property %s\n",
1071 fdt_get_name(blob
, node
, NULL
), name
);
1075 if (length
== sizeof(u32
)) {
1076 result
->typ
= fdtdec_get_int(blob
, node
, name
, 0);
1077 result
->min
= result
->typ
;
1078 result
->max
= result
->typ
;
1080 ret
= fdtdec_get_int_array(blob
, node
, name
, &result
->min
, 3);
1086 int fdtdec_decode_display_timing(const void *blob
, int parent
, int index
,
1087 struct display_timing
*dt
)
1089 int i
, node
, timings_node
;
1093 timings_node
= fdt_subnode_offset(blob
, parent
, "display-timings");
1094 if (timings_node
< 0)
1095 return timings_node
;
1097 for (i
= 0, node
= fdt_first_subnode(blob
, timings_node
);
1098 node
> 0 && i
!= index
;
1099 node
= fdt_next_subnode(blob
, node
))
1105 memset(dt
, 0, sizeof(*dt
));
1107 ret
|= decode_timing_property(blob
, node
, "hback-porch",
1109 ret
|= decode_timing_property(blob
, node
, "hfront-porch",
1111 ret
|= decode_timing_property(blob
, node
, "hactive", &dt
->hactive
);
1112 ret
|= decode_timing_property(blob
, node
, "hsync-len", &dt
->hsync_len
);
1113 ret
|= decode_timing_property(blob
, node
, "vback-porch",
1115 ret
|= decode_timing_property(blob
, node
, "vfront-porch",
1117 ret
|= decode_timing_property(blob
, node
, "vactive", &dt
->vactive
);
1118 ret
|= decode_timing_property(blob
, node
, "vsync-len", &dt
->vsync_len
);
1119 ret
|= decode_timing_property(blob
, node
, "clock-frequency",
1123 val
= fdtdec_get_int(blob
, node
, "vsync-active", -1);
1125 dt
->flags
|= val
? DISPLAY_FLAGS_VSYNC_HIGH
:
1126 DISPLAY_FLAGS_VSYNC_LOW
;
1128 val
= fdtdec_get_int(blob
, node
, "hsync-active", -1);
1130 dt
->flags
|= val
? DISPLAY_FLAGS_HSYNC_HIGH
:
1131 DISPLAY_FLAGS_HSYNC_LOW
;
1133 val
= fdtdec_get_int(blob
, node
, "de-active", -1);
1135 dt
->flags
|= val
? DISPLAY_FLAGS_DE_HIGH
:
1136 DISPLAY_FLAGS_DE_LOW
;
1138 val
= fdtdec_get_int(blob
, node
, "pixelclk-active", -1);
1140 dt
->flags
|= val
? DISPLAY_FLAGS_PIXDATA_POSEDGE
:
1141 DISPLAY_FLAGS_PIXDATA_NEGEDGE
;
1144 if (fdtdec_get_bool(blob
, node
, "interlaced"))
1145 dt
->flags
|= DISPLAY_FLAGS_INTERLACED
;
1146 if (fdtdec_get_bool(blob
, node
, "doublescan"))
1147 dt
->flags
|= DISPLAY_FLAGS_DOUBLESCAN
;
1148 if (fdtdec_get_bool(blob
, node
, "doubleclk"))
1149 dt
->flags
|= DISPLAY_FLAGS_DOUBLECLK
;
1154 int fdtdec_setup_memory_size(void)
1157 struct fdt_resource res
;
1159 mem
= fdt_path_offset(gd
->fdt_blob
, "/memory");
1161 debug("%s: Missing /memory node\n", __func__
);
1165 ret
= fdt_get_resource(gd
->fdt_blob
, mem
, "reg", 0, &res
);
1167 debug("%s: Unable to decode first memory bank\n", __func__
);
1171 gd
->ram_size
= (phys_size_t
)(res
.end
- res
.start
+ 1);
1172 debug("%s: Initial DRAM size %llx\n", __func__
,
1173 (unsigned long long)gd
->ram_size
);
1178 #if defined(CONFIG_NR_DRAM_BANKS)
1179 int fdtdec_setup_memory_banksize(void)
1182 struct fdt_resource res
;
1184 mem
= fdt_path_offset(gd
->fdt_blob
, "/memory");
1186 debug("%s: Missing /memory node\n", __func__
);
1190 for (bank
= 0; bank
< CONFIG_NR_DRAM_BANKS
; bank
++) {
1191 ret
= fdt_get_resource(gd
->fdt_blob
, mem
, "reg", bank
, &res
);
1192 if (ret
== -FDT_ERR_NOTFOUND
)
1197 gd
->bd
->bi_dram
[bank
].start
= (phys_addr_t
)res
.start
;
1198 gd
->bd
->bi_dram
[bank
].size
=
1199 (phys_size_t
)(res
.end
- res
.start
+ 1);
1201 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1203 (unsigned long long)gd
->bd
->bi_dram
[bank
].start
,
1204 (unsigned long long)gd
->bd
->bi_dram
[bank
].size
);
1211 int fdtdec_setup(void)
1213 #if CONFIG_IS_ENABLED(OF_CONTROL)
1214 # ifdef CONFIG_OF_EMBED
1215 /* Get a pointer to the FDT */
1216 gd
->fdt_blob
= __dtb_dt_begin
;
1217 # elif defined CONFIG_OF_SEPARATE
1218 # ifdef CONFIG_SPL_BUILD
1219 /* FDT is at end of BSS unless it is in a different memory region */
1220 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS
))
1221 gd
->fdt_blob
= (ulong
*)&_image_binary_end
;
1223 gd
->fdt_blob
= (ulong
*)&__bss_end
;
1225 /* FDT is at end of image */
1226 gd
->fdt_blob
= (ulong
*)&_end
;
1228 # elif defined(CONFIG_OF_BOARD)
1229 /* Allow the board to override the fdt address. */
1230 gd
->fdt_blob
= board_fdt_blob_setup();
1231 # elif defined(CONFIG_OF_HOSTFILE)
1232 if (sandbox_read_fdt_from_file()) {
1233 puts("Failed to read control FDT\n");
1237 # ifndef CONFIG_SPL_BUILD
1238 /* Allow the early environment to override the fdt address */
1239 gd
->fdt_blob
= (void *)getenv_ulong("fdtcontroladdr", 16,
1240 (uintptr_t)gd
->fdt_blob
);
1243 return fdtdec_prepare_fdt();
1246 #endif /* !USE_HOSTCC */