1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2011 The Chromium OS Authors.
5 * NOTE: Please do not add new devicetree-reading functionality into this file.
6 * Add it to the ofnode API instead, since that is compatible with livetree.
12 #include <display_options.h>
23 #include <fdt_support.h>
26 #include <linux/libfdt.h>
28 #include <asm/global_data.h>
29 #include <asm/sections.h>
30 #include <dm/ofnode.h>
31 #include <dm/of_extra.h>
32 #include <linux/ctype.h>
33 #include <linux/lzo.h>
34 #include <linux/ioport.h>
36 DECLARE_GLOBAL_DATA_PTR
;
39 * Here are the type we know about. One day we might allow drivers to
40 * register. For now we just put them here. The COMPAT macro allows us to
41 * turn this into a sparse list later, and keeps the ID with the name.
43 * NOTE: This list is basically a TODO list for things that need to be
44 * converted to driver model. So don't add new things here unless there is a
45 * good reason why driver-model conversion is infeasible. Examples include
46 * things which are used before driver model is available.
48 #define COMPAT(id, name) name
49 static const char * const compat_names
[COMPAT_COUNT
] = {
50 COMPAT(UNKNOWN
, "<none>"),
51 COMPAT(NVIDIA_TEGRA20_EMC
, "nvidia,tegra20-emc"),
52 COMPAT(NVIDIA_TEGRA20_EMC_TABLE
, "nvidia,tegra20-emc-table"),
53 COMPAT(NVIDIA_TEGRA20_NAND
, "nvidia,tegra20-nand"),
54 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL
, "nvidia,tegra124-xusb-padctl"),
55 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL
, "nvidia,tegra210-xusb-padctl"),
56 COMPAT(SAMSUNG_EXYNOS_USB_PHY
, "samsung,exynos-usb-phy"),
57 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY
, "samsung,exynos5250-usb3-phy"),
58 COMPAT(SAMSUNG_EXYNOS_TMU
, "samsung,exynos-tmu"),
59 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI
, "samsung,exynos-mipi-dsi"),
60 COMPAT(SAMSUNG_EXYNOS_DWMMC
, "samsung,exynos-dwmmc"),
61 COMPAT(GENERIC_SPI_FLASH
, "jedec,spi-nor"),
62 COMPAT(SAMSUNG_EXYNOS_SYSMMU
, "samsung,sysmmu-v3.3"),
63 COMPAT(INTEL_MICROCODE
, "intel,microcode"),
64 COMPAT(INTEL_QRK_MRC
, "intel,quark-mrc"),
65 COMPAT(ALTERA_SOCFPGA_DWMAC
, "altr,socfpga-stmmac"),
66 COMPAT(ALTERA_SOCFPGA_DWMMC
, "altr,socfpga-dw-mshc"),
67 COMPAT(ALTERA_SOCFPGA_DWC2USB
, "snps,dwc2"),
68 COMPAT(INTEL_BAYTRAIL_FSP
, "intel,baytrail-fsp"),
69 COMPAT(INTEL_BAYTRAIL_FSP_MDP
, "intel,baytrail-fsp-mdp"),
70 COMPAT(INTEL_IVYBRIDGE_FSP
, "intel,ivybridge-fsp"),
71 COMPAT(ALTERA_SOCFPGA_CLK
, "altr,clk-mgr"),
72 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE
, "pinctrl-single"),
73 COMPAT(ALTERA_SOCFPGA_H2F_BRG
, "altr,socfpga-hps2fpga-bridge"),
74 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG
, "altr,socfpga-lwhps2fpga-bridge"),
75 COMPAT(ALTERA_SOCFPGA_F2H_BRG
, "altr,socfpga-fpga2hps-bridge"),
76 COMPAT(ALTERA_SOCFPGA_F2SDR0
, "altr,socfpga-fpga2sdram0-bridge"),
77 COMPAT(ALTERA_SOCFPGA_F2SDR1
, "altr,socfpga-fpga2sdram1-bridge"),
78 COMPAT(ALTERA_SOCFPGA_F2SDR2
, "altr,socfpga-fpga2sdram2-bridge"),
79 COMPAT(ALTERA_SOCFPGA_FPGA0
, "altr,socfpga-a10-fpga-mgr"),
80 COMPAT(ALTERA_SOCFPGA_NOC
, "altr,socfpga-a10-noc"),
81 COMPAT(ALTERA_SOCFPGA_CLK_INIT
, "altr,socfpga-a10-clk-init")
84 static const char *const fdt_src_name
[] = {
85 [FDTSRC_SEPARATE
] = "separate",
87 [FDTSRC_BOARD
] = "board",
88 [FDTSRC_EMBED
] = "embed",
92 const char *fdtdec_get_srcname(void)
94 return fdt_src_name
[gd
->fdt_src
];
97 const char *fdtdec_get_compatible(enum fdt_compat_id id
)
99 /* We allow reading of the 'unknown' ID for testing purposes */
100 assert(id
>= 0 && id
< COMPAT_COUNT
);
101 return compat_names
[id
];
104 fdt_addr_t
fdtdec_get_addr_size_fixed(const void *blob
, int node
,
105 const char *prop_name
, int index
, int na
,
106 int ns
, fdt_size_t
*sizep
,
109 const fdt32_t
*prop
, *prop_end
;
110 const fdt32_t
*prop_addr
, *prop_size
, *prop_after_size
;
114 debug("%s: %s: ", __func__
, prop_name
);
116 prop
= fdt_getprop(blob
, node
, prop_name
, &len
);
118 debug("(not found)\n");
119 return FDT_ADDR_T_NONE
;
121 prop_end
= prop
+ (len
/ sizeof(*prop
));
123 prop_addr
= prop
+ (index
* (na
+ ns
));
124 prop_size
= prop_addr
+ na
;
125 prop_after_size
= prop_size
+ ns
;
126 if (prop_after_size
> prop_end
) {
127 debug("(not enough data: expected >= %d cells, got %d cells)\n",
128 (u32
)(prop_after_size
- prop
), ((u32
)(prop_end
- prop
)));
129 return FDT_ADDR_T_NONE
;
132 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
134 addr
= fdt_translate_address(blob
, node
, prop_addr
);
137 addr
= fdtdec_get_number(prop_addr
, na
);
140 *sizep
= fdtdec_get_number(prop_size
, ns
);
141 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr
,
142 (unsigned long long)*sizep
);
144 debug("addr=%08llx\n", (unsigned long long)addr
);
150 fdt_addr_t
fdtdec_get_addr_size_auto_parent(const void *blob
, int parent
,
151 int node
, const char *prop_name
,
152 int index
, fdt_size_t
*sizep
,
157 debug("%s: ", __func__
);
159 na
= fdt_address_cells(blob
, parent
);
161 debug("(bad #address-cells)\n");
162 return FDT_ADDR_T_NONE
;
165 ns
= fdt_size_cells(blob
, parent
);
167 debug("(bad #size-cells)\n");
168 return FDT_ADDR_T_NONE
;
171 debug("na=%d, ns=%d, ", na
, ns
);
173 return fdtdec_get_addr_size_fixed(blob
, node
, prop_name
, index
, na
,
174 ns
, sizep
, translate
);
177 fdt_addr_t
fdtdec_get_addr_size_auto_noparent(const void *blob
, int node
,
178 const char *prop_name
, int index
,
184 debug("%s: ", __func__
);
186 parent
= fdt_parent_offset(blob
, node
);
188 debug("(no parent found)\n");
189 return FDT_ADDR_T_NONE
;
192 return fdtdec_get_addr_size_auto_parent(blob
, parent
, node
, prop_name
,
193 index
, sizep
, translate
);
196 fdt_addr_t
fdtdec_get_addr_size(const void *blob
, int node
,
197 const char *prop_name
, fdt_size_t
*sizep
)
199 int ns
= sizep
? (sizeof(fdt_size_t
) / sizeof(fdt32_t
)) : 0;
201 return fdtdec_get_addr_size_fixed(blob
, node
, prop_name
, 0,
202 sizeof(fdt_addr_t
) / sizeof(fdt32_t
),
206 fdt_addr_t
fdtdec_get_addr(const void *blob
, int node
, const char *prop_name
)
208 return fdtdec_get_addr_size(blob
, node
, prop_name
, NULL
);
211 int fdtdec_get_pci_vendev(const void *blob
, int node
, u16
*vendor
, u16
*device
)
213 const char *list
, *end
;
216 list
= fdt_getprop(blob
, node
, "compatible", &len
);
223 if (len
>= strlen("pciVVVV,DDDD")) {
224 char *s
= strstr(list
, "pci");
227 * check if the string is something like pciVVVV,DDDD.RR
228 * or just pciVVVV,DDDD
230 if (s
&& s
[7] == ',' &&
231 (s
[12] == '.' || s
[12] == 0)) {
233 *vendor
= simple_strtol(s
, NULL
, 16);
236 *device
= simple_strtol(s
, NULL
, 16);
247 int fdtdec_get_pci_bar32(const struct udevice
*dev
, struct fdt_pci_addr
*addr
,
252 /* extract the bar number from fdt_pci_addr */
253 barnum
= addr
->phys_hi
& 0xff;
254 if (barnum
< PCI_BASE_ADDRESS_0
|| barnum
> PCI_CARDBUS_CIS
)
257 barnum
= (barnum
- PCI_BASE_ADDRESS_0
) / 4;
259 *bar
= dm_pci_read_bar32(dev
, barnum
);
264 int fdtdec_get_pci_bus_range(const void *blob
, int node
,
265 struct fdt_resource
*res
)
270 values
= fdt_getprop(blob
, node
, "bus-range", &len
);
271 if (!values
|| len
< sizeof(*values
) * 2)
274 res
->start
= fdt32_to_cpu(*values
++);
275 res
->end
= fdt32_to_cpu(*values
);
280 uint64_t fdtdec_get_uint64(const void *blob
, int node
, const char *prop_name
,
281 uint64_t default_val
)
283 const unaligned_fdt64_t
*cell64
;
286 cell64
= fdt_getprop(blob
, node
, prop_name
, &length
);
287 if (!cell64
|| length
< sizeof(*cell64
))
290 return fdt64_to_cpu(*cell64
);
293 int fdtdec_get_is_enabled(const void *blob
, int node
)
298 * It should say "okay", so only allow that. Some fdts use "ok" but
299 * this is a bug. Please fix your device tree source file. See here
302 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
304 cell
= fdt_getprop(blob
, node
, "status", NULL
);
306 return strcmp(cell
, "okay") == 0;
310 enum fdt_compat_id
fdtdec_lookup(const void *blob
, int node
)
312 enum fdt_compat_id id
;
314 /* Search our drivers */
315 for (id
= COMPAT_UNKNOWN
; id
< COMPAT_COUNT
; id
++)
316 if (fdt_node_check_compatible(blob
, node
,
317 compat_names
[id
]) == 0)
319 return COMPAT_UNKNOWN
;
322 int fdtdec_next_compatible(const void *blob
, int node
, enum fdt_compat_id id
)
324 return fdt_node_offset_by_compatible(blob
, node
, compat_names
[id
]);
327 int fdtdec_next_compatible_subnode(const void *blob
, int node
,
328 enum fdt_compat_id id
, int *depthp
)
331 node
= fdt_next_node(blob
, node
, depthp
);
332 } while (*depthp
> 1);
334 /* If this is a direct subnode, and compatible, return it */
335 if (*depthp
== 1 && 0 == fdt_node_check_compatible(
336 blob
, node
, compat_names
[id
]))
339 return -FDT_ERR_NOTFOUND
;
342 int fdtdec_next_alias(const void *blob
, const char *name
, enum fdt_compat_id id
,
345 #define MAX_STR_LEN 20
346 char str
[MAX_STR_LEN
+ 20];
349 /* snprintf() is not available */
350 assert(strlen(name
) < MAX_STR_LEN
);
351 sprintf(str
, "%.*s%d", MAX_STR_LEN
, name
, *upto
);
352 node
= fdt_path_offset(blob
, str
);
355 err
= fdt_node_check_compatible(blob
, node
, compat_names
[id
]);
359 return -FDT_ERR_NOTFOUND
;
364 int fdtdec_find_aliases_for_id(const void *blob
, const char *name
,
365 enum fdt_compat_id id
, int *node_list
,
368 memset(node_list
, '\0', sizeof(*node_list
) * maxcount
);
370 return fdtdec_add_aliases_for_id(blob
, name
, id
, node_list
, maxcount
);
373 /* TODO: Can we tighten this code up a little? */
374 int fdtdec_add_aliases_for_id(const void *blob
, const char *name
,
375 enum fdt_compat_id id
, int *node_list
,
378 int name_len
= strlen(name
);
386 /* find the alias node if present */
387 alias_node
= fdt_path_offset(blob
, "/aliases");
390 * start with nothing, and we can assume that the root node can't
393 memset(nodes
, '\0', sizeof(nodes
));
395 /* First find all the compatible nodes */
396 for (node
= count
= 0; node
>= 0 && count
< maxcount
;) {
397 node
= fdtdec_next_compatible(blob
, node
, id
);
399 nodes
[count
++] = node
;
402 debug("%s: warning: maxcount exceeded with alias '%s'\n",
405 /* Now find all the aliases */
406 for (offset
= fdt_first_property_offset(blob
, alias_node
);
408 offset
= fdt_next_property_offset(blob
, offset
)) {
409 const struct fdt_property
*prop
;
415 prop
= fdt_get_property_by_offset(blob
, offset
, NULL
);
416 path
= fdt_string(blob
, fdt32_to_cpu(prop
->nameoff
));
417 if (prop
->len
&& 0 == strncmp(path
, name
, name_len
))
418 node
= fdt_path_offset(blob
, prop
->data
);
422 /* Get the alias number */
423 number
= dectoul(path
+ name_len
, NULL
);
424 if (number
< 0 || number
>= maxcount
) {
425 debug("%s: warning: alias '%s' is out of range\n",
430 /* Make sure the node we found is actually in our list! */
432 for (j
= 0; j
< count
; j
++)
433 if (nodes
[j
] == node
) {
439 debug("%s: warning: alias '%s' points to a node "
440 "'%s' that is missing or is not compatible "
441 " with '%s'\n", __func__
, path
,
442 fdt_get_name(blob
, node
, NULL
),
448 * Add this node to our list in the right place, and mark
451 if (fdtdec_get_is_enabled(blob
, node
)) {
452 if (node_list
[number
]) {
453 debug("%s: warning: alias '%s' requires that "
454 "a node be placed in the list in a "
455 "position which is already filled by "
456 "node '%s'\n", __func__
, path
,
457 fdt_get_name(blob
, node
, NULL
));
460 node_list
[number
] = node
;
461 if (number
>= num_found
)
462 num_found
= number
+ 1;
467 /* Add any nodes not mentioned by an alias */
468 for (i
= j
= 0; i
< maxcount
; i
++) {
470 for (; j
< maxcount
; j
++)
472 fdtdec_get_is_enabled(blob
, nodes
[j
]))
475 /* Have we run out of nodes to add? */
479 assert(!node_list
[i
]);
480 node_list
[i
] = nodes
[j
++];
489 int fdtdec_get_alias_seq(const void *blob
, const char *base
, int offset
,
492 int base_len
= strlen(base
);
493 const char *find_name
;
498 find_name
= fdt_get_name(blob
, offset
, &find_namelen
);
499 debug("Looking for '%s' at %d, name %s\n", base
, offset
, find_name
);
501 aliases
= fdt_path_offset(blob
, "/aliases");
502 for (prop_offset
= fdt_first_property_offset(blob
, aliases
);
504 prop_offset
= fdt_next_property_offset(blob
, prop_offset
)) {
510 prop
= fdt_getprop_by_offset(blob
, prop_offset
, &name
, &len
);
511 debug(" - %s, %s\n", name
, prop
);
512 if (len
< find_namelen
|| *prop
!= '/' || prop
[len
- 1] ||
513 strncmp(name
, base
, base_len
))
516 slash
= strrchr(prop
, '/');
517 if (strcmp(slash
+ 1, find_name
))
521 * Adding an extra check to distinguish DT nodes with
524 if (IS_ENABLED(CONFIG_PHANDLE_CHECK_SEQ
)) {
525 if (fdt_get_phandle(blob
, offset
) !=
526 fdt_get_phandle(blob
, fdt_path_offset(blob
, prop
)))
530 val
= trailing_strtol(name
);
533 debug("Found seq %d\n", *seqp
);
538 debug("Not found\n");
542 int fdtdec_get_alias_highest_id(const void *blob
, const char *base
)
544 int base_len
= strlen(base
);
549 debug("Looking for highest alias id for '%s'\n", base
);
551 aliases
= fdt_path_offset(blob
, "/aliases");
552 for (prop_offset
= fdt_first_property_offset(blob
, aliases
);
554 prop_offset
= fdt_next_property_offset(blob
, prop_offset
)) {
559 prop
= fdt_getprop_by_offset(blob
, prop_offset
, &name
, &len
);
560 debug(" - %s, %s\n", name
, prop
);
561 if (*prop
!= '/' || prop
[len
- 1] ||
562 strncmp(name
, base
, base_len
))
565 val
= trailing_strtol(name
);
567 debug("Found seq %d\n", val
);
575 const char *fdtdec_get_chosen_prop(const void *blob
, const char *name
)
581 chosen_node
= fdt_path_offset(blob
, "/chosen");
582 return fdt_getprop(blob
, chosen_node
, name
, NULL
);
585 int fdtdec_get_chosen_node(const void *blob
, const char *name
)
589 prop
= fdtdec_get_chosen_prop(blob
, name
);
591 return -FDT_ERR_NOTFOUND
;
592 return fdt_path_offset(blob
, prop
);
596 * fdtdec_prepare_fdt() - Check we have a valid fdt available to control U-Boot
598 * @blob: Blob to check
600 * If not, a message is printed to the console if the console is ready.
602 * Return: 0 if all ok, -ENOENT if not
604 static int fdtdec_prepare_fdt(const void *blob
)
606 if (!blob
|| ((uintptr_t)blob
& 3) || fdt_check_header(blob
)) {
607 if (spl_phase() <= PHASE_SPL
) {
608 puts("Missing DTB\n");
610 printf("No valid device tree binary found at %p\n",
612 if (_DEBUG
&& blob
) {
613 printf("fdt_blob=%p\n", blob
);
614 print_buffer((ulong
)blob
, blob
, 4, 32, 0);
623 int fdtdec_check_fdt(void)
626 * We must have an FDT, but we cannot panic() yet since the console
627 * is not ready. So for now, just assert(). Boards which need an early
628 * FDT (prior to console ready) will need to make their own
629 * arrangements and do their own checks.
631 assert(!fdtdec_prepare_fdt(gd
->fdt_blob
));
635 int fdtdec_lookup_phandle(const void *blob
, int node
, const char *prop_name
)
640 debug("%s: %s\n", __func__
, prop_name
);
641 phandle
= fdt_getprop(blob
, node
, prop_name
, NULL
);
643 return -FDT_ERR_NOTFOUND
;
645 lookup
= fdt_node_offset_by_phandle(blob
, fdt32_to_cpu(*phandle
));
650 * Look up a property in a node and check that it has a minimum length.
652 * @param blob FDT blob
653 * @param node node to examine
654 * @param prop_name name of property to find
655 * @param min_len minimum property length in bytes
656 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
657 found, or -FDT_ERR_BADLAYOUT if not enough data
658 * Return: pointer to cell, which is only valid if err == 0
660 static const void *get_prop_check_min_len(const void *blob
, int node
,
661 const char *prop_name
, int min_len
,
667 debug("%s: %s\n", __func__
, prop_name
);
668 cell
= fdt_getprop(blob
, node
, prop_name
, &len
);
670 *err
= -FDT_ERR_NOTFOUND
;
671 else if (len
< min_len
)
672 *err
= -FDT_ERR_BADLAYOUT
;
678 int fdtdec_get_int_array(const void *blob
, int node
, const char *prop_name
,
679 u32
*array
, int count
)
684 debug("%s: %s\n", __func__
, prop_name
);
685 cell
= get_prop_check_min_len(blob
, node
, prop_name
,
686 sizeof(u32
) * count
, &err
);
690 for (i
= 0; i
< count
; i
++)
691 array
[i
] = fdt32_to_cpu(cell
[i
]);
696 int fdtdec_get_int_array_count(const void *blob
, int node
,
697 const char *prop_name
, u32
*array
, int count
)
703 debug("%s: %s\n", __func__
, prop_name
);
704 cell
= fdt_getprop(blob
, node
, prop_name
, &len
);
706 return -FDT_ERR_NOTFOUND
;
707 elems
= len
/ sizeof(u32
);
710 for (i
= 0; i
< count
; i
++)
711 array
[i
] = fdt32_to_cpu(cell
[i
]);
716 const u32
*fdtdec_locate_array(const void *blob
, int node
,
717 const char *prop_name
, int count
)
722 cell
= get_prop_check_min_len(blob
, node
, prop_name
,
723 sizeof(u32
) * count
, &err
);
724 return err
? NULL
: cell
;
727 int fdtdec_get_bool(const void *blob
, int node
, const char *prop_name
)
732 debug("%s: %s\n", __func__
, prop_name
);
733 cell
= fdt_getprop(blob
, node
, prop_name
, &len
);
737 int fdtdec_parse_phandle_with_args(const void *blob
, int src_node
,
738 const char *list_name
,
739 const char *cells_name
,
740 int cell_count
, int index
,
741 struct fdtdec_phandle_args
*out_args
)
743 const __be32
*list
, *list_end
;
744 int rc
= 0, size
, cur_index
= 0;
749 /* Retrieve the phandle list property */
750 list
= fdt_getprop(blob
, src_node
, list_name
, &size
);
753 list_end
= list
+ size
/ sizeof(*list
);
755 /* Loop over the phandles until all the requested entry is found */
756 while (list
< list_end
) {
761 * If phandle is 0, then it is an empty entry with no
762 * arguments. Skip forward to the next entry.
764 phandle
= be32_to_cpup(list
++);
767 * Find the provider node and parse the #*-cells
768 * property to determine the argument length.
770 * This is not needed if the cell count is hard-coded
771 * (i.e. cells_name not set, but cell_count is set),
772 * except when we're going to return the found node
775 if (cells_name
|| cur_index
== index
) {
776 node
= fdt_node_offset_by_phandle(blob
,
779 debug("%s: could not find phandle\n",
780 fdt_get_name(blob
, src_node
,
787 count
= fdtdec_get_int(blob
, node
, cells_name
,
790 debug("%s: could not get %s for %s\n",
791 fdt_get_name(blob
, src_node
,
794 fdt_get_name(blob
, node
,
803 * Make sure that the arguments actually fit in the
804 * remaining property data length
806 if (list
+ count
> list_end
) {
807 debug("%s: arguments longer than property\n",
808 fdt_get_name(blob
, src_node
, NULL
));
814 * All of the error cases above bail out of the loop, so at
815 * this point, the parsing is successful. If the requested
816 * index matches, then fill the out_args structure and return,
817 * or return -ENOENT for an empty entry.
820 if (cur_index
== index
) {
827 if (count
> MAX_PHANDLE_ARGS
) {
828 debug("%s: too many arguments %d\n",
829 fdt_get_name(blob
, src_node
,
831 count
= MAX_PHANDLE_ARGS
;
833 out_args
->node
= node
;
834 out_args
->args_count
= count
;
835 for (i
= 0; i
< count
; i
++) {
837 be32_to_cpup(list
++);
841 /* Found it! return success */
851 * Result will be one of:
852 * -ENOENT : index is for empty phandle
853 * -EINVAL : parsing error on data
854 * [1..n] : Number of phandle (count mode; when index = -1)
856 rc
= index
< 0 ? cur_index
: -ENOENT
;
861 int fdtdec_get_byte_array(const void *blob
, int node
, const char *prop_name
,
862 u8
*array
, int count
)
867 cell
= get_prop_check_min_len(blob
, node
, prop_name
, count
, &err
);
869 memcpy(array
, cell
, count
);
873 const u8
*fdtdec_locate_byte_array(const void *blob
, int node
,
874 const char *prop_name
, int count
)
879 cell
= get_prop_check_min_len(blob
, node
, prop_name
, count
, &err
);
885 u64
fdtdec_get_number(const fdt32_t
*ptr
, unsigned int cells
)
890 number
= (number
<< 32) | fdt32_to_cpu(*ptr
++);
895 int fdt_get_resource(const void *fdt
, int node
, const char *property
,
896 unsigned int index
, struct fdt_resource
*res
)
898 const fdt32_t
*ptr
, *end
;
899 int na
, ns
, len
, parent
;
902 parent
= fdt_parent_offset(fdt
, node
);
906 na
= fdt_address_cells(fdt
, parent
);
907 ns
= fdt_size_cells(fdt
, parent
);
909 ptr
= fdt_getprop(fdt
, node
, property
, &len
);
913 end
= ptr
+ len
/ sizeof(*ptr
);
915 while (ptr
+ na
+ ns
<= end
) {
917 if (CONFIG_IS_ENABLED(OF_TRANSLATE
))
918 res
->start
= fdt_translate_address(fdt
, node
, ptr
);
920 res
->start
= fdtdec_get_number(ptr
, na
);
922 res
->end
= res
->start
;
923 res
->end
+= fdtdec_get_number(&ptr
[na
], ns
) - 1;
931 return -FDT_ERR_NOTFOUND
;
934 int fdt_get_named_resource(const void *fdt
, int node
, const char *property
,
935 const char *prop_names
, const char *name
,
936 struct fdt_resource
*res
)
940 index
= fdt_stringlist_search(fdt
, node
, prop_names
, name
);
944 return fdt_get_resource(fdt
, node
, property
, index
, res
);
947 static int decode_timing_property(const void *blob
, int node
, const char *name
,
948 struct timing_entry
*result
)
953 prop
= fdt_getprop(blob
, node
, name
, &length
);
955 debug("%s: could not find property %s\n",
956 fdt_get_name(blob
, node
, NULL
), name
);
960 if (length
== sizeof(u32
)) {
961 result
->typ
= fdtdec_get_int(blob
, node
, name
, 0);
962 result
->min
= result
->typ
;
963 result
->max
= result
->typ
;
965 ret
= fdtdec_get_int_array(blob
, node
, name
, &result
->min
, 3);
971 int fdtdec_decode_display_timing(const void *blob
, int parent
, int index
,
972 struct display_timing
*dt
)
974 int i
, node
, timings_node
;
978 timings_node
= fdt_subnode_offset(blob
, parent
, "display-timings");
979 if (timings_node
< 0)
982 for (i
= 0, node
= fdt_first_subnode(blob
, timings_node
);
983 node
> 0 && i
!= index
;
984 node
= fdt_next_subnode(blob
, node
))
990 memset(dt
, 0, sizeof(*dt
));
992 ret
|= decode_timing_property(blob
, node
, "hback-porch",
994 ret
|= decode_timing_property(blob
, node
, "hfront-porch",
996 ret
|= decode_timing_property(blob
, node
, "hactive", &dt
->hactive
);
997 ret
|= decode_timing_property(blob
, node
, "hsync-len", &dt
->hsync_len
);
998 ret
|= decode_timing_property(blob
, node
, "vback-porch",
1000 ret
|= decode_timing_property(blob
, node
, "vfront-porch",
1002 ret
|= decode_timing_property(blob
, node
, "vactive", &dt
->vactive
);
1003 ret
|= decode_timing_property(blob
, node
, "vsync-len", &dt
->vsync_len
);
1004 ret
|= decode_timing_property(blob
, node
, "clock-frequency",
1008 val
= fdtdec_get_int(blob
, node
, "vsync-active", -1);
1010 dt
->flags
|= val
? DISPLAY_FLAGS_VSYNC_HIGH
:
1011 DISPLAY_FLAGS_VSYNC_LOW
;
1013 val
= fdtdec_get_int(blob
, node
, "hsync-active", -1);
1015 dt
->flags
|= val
? DISPLAY_FLAGS_HSYNC_HIGH
:
1016 DISPLAY_FLAGS_HSYNC_LOW
;
1018 val
= fdtdec_get_int(blob
, node
, "de-active", -1);
1020 dt
->flags
|= val
? DISPLAY_FLAGS_DE_HIGH
:
1021 DISPLAY_FLAGS_DE_LOW
;
1023 val
= fdtdec_get_int(blob
, node
, "pixelclk-active", -1);
1025 dt
->flags
|= val
? DISPLAY_FLAGS_PIXDATA_POSEDGE
:
1026 DISPLAY_FLAGS_PIXDATA_NEGEDGE
;
1029 if (fdtdec_get_bool(blob
, node
, "interlaced"))
1030 dt
->flags
|= DISPLAY_FLAGS_INTERLACED
;
1031 if (fdtdec_get_bool(blob
, node
, "doublescan"))
1032 dt
->flags
|= DISPLAY_FLAGS_DOUBLESCAN
;
1033 if (fdtdec_get_bool(blob
, node
, "doubleclk"))
1034 dt
->flags
|= DISPLAY_FLAGS_DOUBLECLK
;
1039 int fdtdec_setup_mem_size_base(void)
1043 struct resource res
;
1045 mem
= ofnode_path("/memory");
1046 if (!ofnode_valid(mem
)) {
1047 debug("%s: Missing /memory node\n", __func__
);
1051 ret
= ofnode_read_resource(mem
, 0, &res
);
1053 debug("%s: Unable to decode first memory bank\n", __func__
);
1057 gd
->ram_size
= (phys_size_t
)(res
.end
- res
.start
+ 1);
1058 gd
->ram_base
= (unsigned long)res
.start
;
1059 debug("%s: Initial DRAM size %llx\n", __func__
,
1060 (unsigned long long)gd
->ram_size
);
1065 ofnode
get_next_memory_node(ofnode mem
)
1068 mem
= ofnode_by_prop_value(mem
, "device_type", "memory", 7);
1069 } while (!ofnode_is_enabled(mem
));
1074 int fdtdec_setup_memory_banksize(void)
1076 int bank
, ret
, reg
= 0;
1077 struct resource res
;
1078 ofnode mem
= ofnode_null();
1080 mem
= get_next_memory_node(mem
);
1081 if (!ofnode_valid(mem
)) {
1082 debug("%s: Missing /memory node\n", __func__
);
1086 for (bank
= 0; bank
< CONFIG_NR_DRAM_BANKS
; bank
++) {
1087 ret
= ofnode_read_resource(mem
, reg
++, &res
);
1090 mem
= get_next_memory_node(mem
);
1091 if (!ofnode_valid(mem
))
1094 ret
= ofnode_read_resource(mem
, reg
++, &res
);
1102 gd
->bd
->bi_dram
[bank
].start
= (phys_addr_t
)res
.start
;
1103 gd
->bd
->bi_dram
[bank
].size
=
1104 (phys_size_t
)(res
.end
- res
.start
+ 1);
1106 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1108 (unsigned long long)gd
->bd
->bi_dram
[bank
].start
,
1109 (unsigned long long)gd
->bd
->bi_dram
[bank
].size
);
1115 int fdtdec_setup_mem_size_base_lowest(void)
1117 int bank
, ret
, reg
= 0;
1118 struct resource res
;
1121 ofnode mem
= ofnode_null();
1123 gd
->ram_base
= (unsigned long)~0;
1125 mem
= get_next_memory_node(mem
);
1126 if (!ofnode_valid(mem
)) {
1127 debug("%s: Missing /memory node\n", __func__
);
1131 for (bank
= 0; bank
< CONFIG_NR_DRAM_BANKS
; bank
++) {
1132 ret
= ofnode_read_resource(mem
, reg
++, &res
);
1135 mem
= get_next_memory_node(mem
);
1136 if (!ofnode_valid(mem
))
1139 ret
= ofnode_read_resource(mem
, reg
++, &res
);
1147 base
= (unsigned long)res
.start
;
1148 size
= (phys_size_t
)(res
.end
- res
.start
+ 1);
1150 if (gd
->ram_base
> base
&& size
) {
1151 gd
->ram_base
= base
;
1152 gd
->ram_size
= size
;
1153 debug("%s: Initial DRAM base %lx size %lx\n",
1154 __func__
, base
, (unsigned long)size
);
1161 static int uncompress_blob(const void *src
, ulong sz_src
, void **dstp
)
1163 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1164 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1165 size_t sz_out
= CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ
);
1166 bool gzip
= 0, lzo
= 0;
1167 ulong sz_in
= sz_src
;
1171 if (CONFIG_IS_ENABLED(GZIP
))
1172 if (gzip_parse_header(src
, sz_in
) >= 0)
1174 if (CONFIG_IS_ENABLED(LZO
))
1175 if (!gzip
&& lzop_is_valid_header(src
))
1182 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC
)) {
1183 dst
= malloc(sz_out
);
1185 puts("uncompress_blob: Unable to allocate memory\n");
1189 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1190 dst
= (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR
);
1196 if (CONFIG_IS_ENABLED(GZIP
) && gzip
)
1197 rc
= gunzip(dst
, sz_out
, (u8
*)src
, &sz_in
);
1198 else if (CONFIG_IS_ENABLED(LZO
) && lzo
)
1199 rc
= lzop_decompress(src
, sz_in
, dst
, &sz_out
);
1204 /* not a valid compressed blob */
1205 puts("uncompress_blob: Unable to uncompress\n");
1206 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC
))
1212 *dstp
= (void *)src
;
1213 *dstp
= (void *)src
;
1219 * fdt_find_separate() - Find a devicetree at the end of the image
1221 * Return: pointer to FDT blob
1223 static void *fdt_find_separate(void)
1225 void *fdt_blob
= NULL
;
1227 if (IS_ENABLED(CONFIG_SANDBOX
))
1230 #ifdef CONFIG_SPL_BUILD
1231 /* FDT is at end of BSS unless it is in a different memory region */
1232 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS
))
1233 fdt_blob
= (ulong
*)_image_binary_end
;
1235 fdt_blob
= (ulong
*)__bss_end
;
1237 /* FDT is at end of image */
1238 fdt_blob
= (ulong
*)_end
;
1240 if (_DEBUG
&& !fdtdec_prepare_fdt(fdt_blob
)) {
1242 const void *top
= fdt_blob
+ fdt_totalsize(fdt_blob
);
1245 * Perform a sanity check on the memory layout. If this fails,
1246 * it indicates that the device tree is positioned above the
1247 * global data pointer or the stack pointer. This should not
1250 * If this fails, check that SYS_INIT_SP_ADDR has enough space
1251 * below it for SYS_MALLOC_F_LEN and global_data, as well as the
1252 * stack, without overwriting the device tree or U-Boot itself.
1253 * Since the device tree is sitting at _end (the start of the
1254 * BSS region), we need the top of the device tree to be below
1255 * any memory allocated by board_init_f_alloc_reserve().
1257 if (top
> (void *)gd
|| top
> (void *)&stack_ptr
) {
1258 printf("FDT %p gd %p\n", fdt_blob
, gd
);
1259 panic("FDT overlap");
1267 int fdtdec_set_ethernet_mac_address(void *fdt
, const u8
*mac
, size_t size
)
1272 if (!is_valid_ethaddr(mac
))
1275 path
= fdt_get_alias(fdt
, "ethernet");
1279 debug("ethernet alias found: %s\n", path
);
1281 offset
= fdt_path_offset(fdt
, path
);
1283 debug("ethernet alias points to absent node %s\n", path
);
1287 err
= fdt_setprop_inplace(fdt
, offset
, "local-mac-address", mac
, size
);
1291 debug("MAC address: %pM\n", mac
);
1296 static int fdtdec_init_reserved_memory(void *blob
)
1298 int na
, ns
, node
, err
;
1301 /* inherit #address-cells and #size-cells from the root node */
1302 na
= fdt_address_cells(blob
, 0);
1303 ns
= fdt_size_cells(blob
, 0);
1305 node
= fdt_add_subnode(blob
, 0, "reserved-memory");
1309 err
= fdt_setprop(blob
, node
, "ranges", NULL
, 0);
1313 value
= cpu_to_fdt32(ns
);
1315 err
= fdt_setprop(blob
, node
, "#size-cells", &value
, sizeof(value
));
1319 value
= cpu_to_fdt32(na
);
1321 err
= fdt_setprop(blob
, node
, "#address-cells", &value
, sizeof(value
));
1328 int fdtdec_add_reserved_memory(void *blob
, const char *basename
,
1329 const struct fdt_memory
*carveout
,
1330 const char **compatibles
, unsigned int count
,
1331 uint32_t *phandlep
, unsigned long flags
)
1333 fdt32_t cells
[4] = {}, *ptr
= cells
;
1334 uint32_t upper
, lower
, phandle
;
1335 int parent
, node
, na
, ns
, err
;
1339 /* create an empty /reserved-memory node if one doesn't exist */
1340 parent
= fdt_path_offset(blob
, "/reserved-memory");
1342 parent
= fdtdec_init_reserved_memory(blob
);
1347 /* only 1 or 2 #address-cells and #size-cells are supported */
1348 na
= fdt_address_cells(blob
, parent
);
1349 if (na
< 1 || na
> 2)
1350 return -FDT_ERR_BADNCELLS
;
1352 ns
= fdt_size_cells(blob
, parent
);
1353 if (ns
< 1 || ns
> 2)
1354 return -FDT_ERR_BADNCELLS
;
1356 /* find a matching node and return the phandle to that */
1357 fdt_for_each_subnode(node
, blob
, parent
) {
1358 const char *name
= fdt_get_name(blob
, node
, NULL
);
1362 addr
= fdtdec_get_addr_size_fixed(blob
, node
, "reg", 0, na
, ns
,
1364 if (addr
== FDT_ADDR_T_NONE
) {
1365 debug("failed to read address/size for %s\n", name
);
1369 if (addr
== carveout
->start
&& (addr
+ size
- 1) ==
1372 *phandlep
= fdt_get_phandle(blob
, node
);
1378 * Unpack the start address and generate the name of the new node
1379 * base on the basename and the unit-address.
1381 upper
= upper_32_bits(carveout
->start
);
1382 lower
= lower_32_bits(carveout
->start
);
1384 if (na
> 1 && upper
> 0)
1385 snprintf(name
, sizeof(name
), "%s@%x,%x", basename
, upper
,
1389 debug("address %08x:%08x exceeds addressable space\n",
1391 return -FDT_ERR_BADVALUE
;
1394 snprintf(name
, sizeof(name
), "%s@%x", basename
, lower
);
1397 node
= fdt_add_subnode(blob
, parent
, name
);
1401 if (flags
& FDTDEC_RESERVED_MEMORY_NO_MAP
) {
1402 err
= fdt_setprop(blob
, node
, "no-map", NULL
, 0);
1408 err
= fdt_generate_phandle(blob
, &phandle
);
1412 err
= fdtdec_set_phandle(blob
, node
, phandle
);
1417 /* store one or two address cells */
1419 *ptr
++ = cpu_to_fdt32(upper
);
1421 *ptr
++ = cpu_to_fdt32(lower
);
1423 /* store one or two size cells */
1424 size
= carveout
->end
- carveout
->start
+ 1;
1425 upper
= upper_32_bits(size
);
1426 lower
= lower_32_bits(size
);
1429 *ptr
++ = cpu_to_fdt32(upper
);
1431 *ptr
++ = cpu_to_fdt32(lower
);
1433 err
= fdt_setprop(blob
, node
, "reg", cells
, (na
+ ns
) * sizeof(*cells
));
1437 if (compatibles
&& count
> 0) {
1438 size_t length
= 0, len
= 0;
1442 for (i
= 0; i
< count
; i
++)
1443 length
+= strlen(compatibles
[i
]) + 1;
1445 buffer
= malloc(length
);
1447 return -FDT_ERR_INTERNAL
;
1449 for (i
= 0; i
< count
; i
++)
1450 len
+= strlcpy(buffer
+ len
, compatibles
[i
],
1453 err
= fdt_setprop(blob
, node
, "compatible", buffer
, length
);
1459 /* return the phandle for the new node for the caller to use */
1461 *phandlep
= phandle
;
1466 int fdtdec_get_carveout(const void *blob
, const char *node
,
1467 const char *prop_name
, unsigned int index
,
1468 struct fdt_memory
*carveout
, const char **name
,
1469 const char ***compatiblesp
, unsigned int *countp
,
1470 unsigned long *flags
)
1472 const fdt32_t
*prop
;
1477 offset
= fdt_path_offset(blob
, node
);
1481 prop
= fdt_getprop(blob
, offset
, prop_name
, &len
);
1483 debug("failed to get %s for %s\n", prop_name
, node
);
1484 return -FDT_ERR_NOTFOUND
;
1487 if ((len
% sizeof(phandle
)) != 0) {
1488 debug("invalid phandle property\n");
1489 return -FDT_ERR_BADPHANDLE
;
1492 if (len
< (sizeof(phandle
) * (index
+ 1))) {
1493 debug("invalid phandle index\n");
1494 return -FDT_ERR_NOTFOUND
;
1497 phandle
= fdt32_to_cpu(prop
[index
]);
1499 offset
= fdt_node_offset_by_phandle(blob
, phandle
);
1501 debug("failed to find node for phandle %u\n", phandle
);
1506 *name
= fdt_get_name(blob
, offset
, NULL
);
1509 const char **compatibles
= NULL
;
1510 const char *start
, *end
, *ptr
;
1511 unsigned int count
= 0;
1513 prop
= fdt_getprop(blob
, offset
, "compatible", &len
);
1517 start
= ptr
= (const char *)prop
;
1521 ptr
= strchrnul(ptr
, '\0');
1526 compatibles
= malloc(sizeof(ptr
) * count
);
1528 return -FDT_ERR_INTERNAL
;
1534 compatibles
[count
] = ptr
;
1535 ptr
= strchrnul(ptr
, '\0');
1541 *compatiblesp
= compatibles
;
1547 carveout
->start
= fdtdec_get_addr_size_auto_noparent(blob
, offset
,
1550 if (carveout
->start
== FDT_ADDR_T_NONE
) {
1551 debug("failed to read address/size from \"reg\" property\n");
1552 return -FDT_ERR_NOTFOUND
;
1555 carveout
->end
= carveout
->start
+ size
- 1;
1560 if (fdtdec_get_bool(blob
, offset
, "no-map"))
1561 *flags
|= FDTDEC_RESERVED_MEMORY_NO_MAP
;
1567 int fdtdec_set_carveout(void *blob
, const char *node
, const char *prop_name
,
1568 unsigned int index
, const struct fdt_memory
*carveout
,
1569 const char *name
, const char **compatibles
,
1570 unsigned int count
, unsigned long flags
)
1573 int err
, offset
, len
;
1577 err
= fdtdec_add_reserved_memory(blob
, name
, carveout
, compatibles
,
1578 count
, &phandle
, flags
);
1580 debug("failed to add reserved memory: %d\n", err
);
1584 offset
= fdt_path_offset(blob
, node
);
1586 debug("failed to find offset for node %s: %d\n", node
, offset
);
1590 value
= cpu_to_fdt32(phandle
);
1592 if (!fdt_getprop(blob
, offset
, prop_name
, &len
)) {
1593 if (len
== -FDT_ERR_NOTFOUND
)
1599 if ((index
+ 1) * sizeof(value
) > len
) {
1600 err
= fdt_setprop_placeholder(blob
, offset
, prop_name
,
1601 (index
+ 1) * sizeof(value
),
1604 debug("failed to resize reserved memory property: %s\n",
1610 err
= fdt_setprop_inplace_namelen_partial(blob
, offset
, prop_name
,
1612 index
* sizeof(value
),
1613 &value
, sizeof(value
));
1615 debug("failed to update %s property for node %s: %s\n",
1616 prop_name
, node
, fdt_strerror(err
));
1623 /* TODO(sjg@chromium.org): This function should not be weak */
1624 __weak
int fdtdec_board_setup(const void *fdt_blob
)
1630 * setup_multi_dtb_fit() - locate the correct dtb from a FIT
1632 * This supports the CONFIG_MULTI_DTB_FIT feature, looking for the dtb in a
1635 * It accepts the current value of gd->fdt_blob, which points to the FIT, then
1636 * updates that gd->fdt_blob, to point to the chosen dtb so that U-Boot uses the
1639 static void setup_multi_dtb_fit(void)
1644 * Try and uncompress the blob.
1645 * Unfortunately there is no way to know how big the input blob really
1646 * is. So let us set the maximum input size arbitrarily high. 16MB
1647 * ought to be more than enough for packed DTBs.
1649 if (uncompress_blob(gd
->fdt_blob
, 0x1000000, &blob
) == 0)
1650 gd
->fdt_blob
= blob
;
1653 * Check if blob is a FIT images containings DTBs.
1654 * If so, pick the most relevant
1656 blob
= locate_dtb_in_fit(gd
->fdt_blob
);
1658 gd_set_multi_dtb_fit(gd
->fdt_blob
);
1659 gd
->fdt_blob
= blob
;
1660 gd
->fdt_src
= FDTSRC_FIT
;
1664 int fdtdec_setup(void)
1668 /* The devicetree is typically appended to U-Boot */
1669 if (IS_ENABLED(CONFIG_OF_SEPARATE
)) {
1670 gd
->fdt_blob
= fdt_find_separate();
1671 gd
->fdt_src
= FDTSRC_SEPARATE
;
1672 } else { /* embed dtb in ELF file for testing / development */
1673 gd
->fdt_blob
= dtb_dt_embedded();
1674 gd
->fdt_src
= FDTSRC_EMBED
;
1677 /* Allow the board to override the fdt address. */
1678 if (IS_ENABLED(CONFIG_OF_BOARD
)) {
1679 gd
->fdt_blob
= board_fdt_blob_setup(&ret
);
1682 gd
->fdt_src
= FDTSRC_BOARD
;
1685 /* Allow the early environment to override the fdt address */
1686 if (!IS_ENABLED(CONFIG_SPL_BUILD
)) {
1689 addr
= env_get_hex("fdtcontroladdr", 0);
1691 gd
->fdt_blob
= map_sysmem(addr
, 0);
1692 gd
->fdt_src
= FDTSRC_ENV
;
1696 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT
))
1697 setup_multi_dtb_fit();
1699 ret
= fdtdec_prepare_fdt(gd
->fdt_blob
);
1701 ret
= fdtdec_board_setup(gd
->fdt_blob
);
1707 int fdtdec_resetup(int *rescan
)
1712 * If the current DTB is part of a compressed FIT image,
1713 * try to locate the best match from the uncompressed
1714 * FIT image stillpresent there. Save the time and space
1715 * required to uncompress it again.
1717 if (gd_multi_dtb_fit()) {
1718 fdt_blob
= locate_dtb_in_fit(gd_multi_dtb_fit());
1720 if (fdt_blob
== gd
->fdt_blob
) {
1722 * The best match did not change. no need to tear down
1723 * the DM and rescan the fdt.
1730 gd
->fdt_blob
= fdt_blob
;
1731 return fdtdec_prepare_fdt(fdt_blob
);
1735 * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
1736 * not a FIT image containings DTB, but a single DTB. There is no need
1737 * to teard down DM and rescan the DT in this case.
1743 int fdtdec_decode_ram_size(const void *blob
, const char *area
, int board_id
,
1744 phys_addr_t
*basep
, phys_size_t
*sizep
,
1747 int addr_cells
, size_cells
;
1748 const u32
*cell
, *end
;
1749 u64 total_size
, size
, addr
;
1755 debug("%s: board_id=%d\n", __func__
, board_id
);
1758 node
= fdt_path_offset(blob
, area
);
1760 debug("No %s node found\n", area
);
1764 cell
= fdt_getprop(blob
, node
, "reg", &len
);
1766 debug("No reg property found\n");
1770 addr_cells
= fdt_address_cells(blob
, node
);
1771 size_cells
= fdt_size_cells(blob
, node
);
1773 /* Check the board id and mask */
1774 for (child
= fdt_first_subnode(blob
, node
);
1776 child
= fdt_next_subnode(blob
, child
)) {
1777 int match_mask
, match_value
;
1779 match_mask
= fdtdec_get_int(blob
, child
, "match-mask", -1);
1780 match_value
= fdtdec_get_int(blob
, child
, "match-value", -1);
1782 if (match_value
>= 0 &&
1783 ((board_id
& match_mask
) == match_value
)) {
1784 /* Found matching mask */
1785 debug("Found matching mask %d\n", match_mask
);
1787 cell
= fdt_getprop(blob
, node
, "reg", &len
);
1789 debug("No memory-banks property found\n");
1795 /* Note: if no matching subnode was found we use the parent node */
1798 memset(bd
->bi_dram
, '\0', sizeof(bd
->bi_dram
[0]) *
1799 CONFIG_NR_DRAM_BANKS
);
1802 auto_size
= fdtdec_get_bool(blob
, node
, "auto-size");
1805 end
= cell
+ len
/ 4 - addr_cells
- size_cells
;
1806 debug("cell at %p, end %p\n", cell
, end
);
1807 for (bank
= 0; bank
< CONFIG_NR_DRAM_BANKS
; bank
++) {
1811 if (addr_cells
== 2)
1812 addr
+= (u64
)fdt32_to_cpu(*cell
++) << 32UL;
1813 addr
+= fdt32_to_cpu(*cell
++);
1815 bd
->bi_dram
[bank
].start
= addr
;
1817 *basep
= (phys_addr_t
)addr
;
1820 if (size_cells
== 2)
1821 size
+= (u64
)fdt32_to_cpu(*cell
++) << 32UL;
1822 size
+= fdt32_to_cpu(*cell
++);
1827 debug("Auto-sizing %llx, size %llx: ", addr
, size
);
1828 new_size
= get_ram_size((long *)(uintptr_t)addr
, size
);
1829 if (new_size
== size
) {
1832 debug("sized to %llx\n", new_size
);
1838 bd
->bi_dram
[bank
].size
= size
;
1842 debug("Memory size %llu\n", total_size
);
1844 *sizep
= (phys_size_t
)total_size
;
1849 #endif /* !USE_HOSTCC */