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1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (c) 2011 The Chromium OS Authors.
4 *
5 * NOTE: Please do not add new devicetree-reading functionality into this file.
6 * Add it to the ofnode API instead, since that is compatible with livetree.
7 */
8
9 #ifndef USE_HOSTCC
10 #include <common.h>
11 #include <boot_fit.h>
12 #include <display_options.h>
13 #include <dm.h>
14 #include <hang.h>
15 #include <init.h>
16 #include <log.h>
17 #include <malloc.h>
18 #include <net.h>
19 #include <spl.h>
20 #include <env.h>
21 #include <errno.h>
22 #include <fdtdec.h>
23 #include <fdt_support.h>
24 #include <gzip.h>
25 #include <mapmem.h>
26 #include <linux/libfdt.h>
27 #include <serial.h>
28 #include <asm/global_data.h>
29 #include <asm/sections.h>
30 #include <dm/ofnode.h>
31 #include <dm/of_extra.h>
32 #include <linux/ctype.h>
33 #include <linux/lzo.h>
34 #include <linux/ioport.h>
35
36 DECLARE_GLOBAL_DATA_PTR;
37
38 /*
39 * Here are the type we know about. One day we might allow drivers to
40 * register. For now we just put them here. The COMPAT macro allows us to
41 * turn this into a sparse list later, and keeps the ID with the name.
42 *
43 * NOTE: This list is basically a TODO list for things that need to be
44 * converted to driver model. So don't add new things here unless there is a
45 * good reason why driver-model conversion is infeasible. Examples include
46 * things which are used before driver model is available.
47 */
48 #define COMPAT(id, name) name
49 static const char * const compat_names[COMPAT_COUNT] = {
50 COMPAT(UNKNOWN, "<none>"),
51 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
52 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
53 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
54 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
55 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
56 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
57 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
58 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
59 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
60 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
61 COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
62 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
63 COMPAT(INTEL_MICROCODE, "intel,microcode"),
64 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
65 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
66 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
67 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
68 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
69 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
70 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
71 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
72 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
73 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
74 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
75 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
76 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
77 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
78 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
79 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
80 COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
81 COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
82 COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
83 };
84
85 static const char *const fdt_src_name[] = {
86 [FDTSRC_SEPARATE] = "separate",
87 [FDTSRC_FIT] = "fit",
88 [FDTSRC_BOARD] = "board",
89 [FDTSRC_EMBED] = "embed",
90 [FDTSRC_ENV] = "env",
91 };
92
93 const char *fdtdec_get_srcname(void)
94 {
95 return fdt_src_name[gd->fdt_src];
96 }
97
98 const char *fdtdec_get_compatible(enum fdt_compat_id id)
99 {
100 /* We allow reading of the 'unknown' ID for testing purposes */
101 assert(id >= 0 && id < COMPAT_COUNT);
102 return compat_names[id];
103 }
104
105 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
106 const char *prop_name, int index, int na,
107 int ns, fdt_size_t *sizep,
108 bool translate)
109 {
110 const fdt32_t *prop, *prop_end;
111 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
112 int len;
113 fdt_addr_t addr;
114
115 debug("%s: %s: ", __func__, prop_name);
116
117 prop = fdt_getprop(blob, node, prop_name, &len);
118 if (!prop) {
119 debug("(not found)\n");
120 return FDT_ADDR_T_NONE;
121 }
122 prop_end = prop + (len / sizeof(*prop));
123
124 prop_addr = prop + (index * (na + ns));
125 prop_size = prop_addr + na;
126 prop_after_size = prop_size + ns;
127 if (prop_after_size > prop_end) {
128 debug("(not enough data: expected >= %d cells, got %d cells)\n",
129 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
130 return FDT_ADDR_T_NONE;
131 }
132
133 #if CONFIG_IS_ENABLED(OF_TRANSLATE)
134 if (translate)
135 addr = fdt_translate_address(blob, node, prop_addr);
136 else
137 #endif
138 addr = fdtdec_get_number(prop_addr, na);
139
140 if (sizep) {
141 *sizep = fdtdec_get_number(prop_size, ns);
142 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
143 (unsigned long long)*sizep);
144 } else {
145 debug("addr=%08llx\n", (unsigned long long)addr);
146 }
147
148 return addr;
149 }
150
151 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
152 int node, const char *prop_name,
153 int index, fdt_size_t *sizep,
154 bool translate)
155 {
156 int na, ns;
157
158 debug("%s: ", __func__);
159
160 na = fdt_address_cells(blob, parent);
161 if (na < 1) {
162 debug("(bad #address-cells)\n");
163 return FDT_ADDR_T_NONE;
164 }
165
166 ns = fdt_size_cells(blob, parent);
167 if (ns < 0) {
168 debug("(bad #size-cells)\n");
169 return FDT_ADDR_T_NONE;
170 }
171
172 debug("na=%d, ns=%d, ", na, ns);
173
174 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
175 ns, sizep, translate);
176 }
177
178 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
179 const char *prop_name, int index,
180 fdt_size_t *sizep,
181 bool translate)
182 {
183 int parent;
184
185 debug("%s: ", __func__);
186
187 parent = fdt_parent_offset(blob, node);
188 if (parent < 0) {
189 debug("(no parent found)\n");
190 return FDT_ADDR_T_NONE;
191 }
192
193 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
194 index, sizep, translate);
195 }
196
197 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
198 const char *prop_name, fdt_size_t *sizep)
199 {
200 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
201
202 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
203 sizeof(fdt_addr_t) / sizeof(fdt32_t),
204 ns, sizep, false);
205 }
206
207 fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
208 {
209 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
210 }
211
212 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
213 {
214 const char *list, *end;
215 int len;
216
217 list = fdt_getprop(blob, node, "compatible", &len);
218 if (!list)
219 return -ENOENT;
220
221 end = list + len;
222 while (list < end) {
223 len = strlen(list);
224 if (len >= strlen("pciVVVV,DDDD")) {
225 char *s = strstr(list, "pci");
226
227 /*
228 * check if the string is something like pciVVVV,DDDD.RR
229 * or just pciVVVV,DDDD
230 */
231 if (s && s[7] == ',' &&
232 (s[12] == '.' || s[12] == 0)) {
233 s += 3;
234 *vendor = simple_strtol(s, NULL, 16);
235
236 s += 5;
237 *device = simple_strtol(s, NULL, 16);
238
239 return 0;
240 }
241 }
242 list += (len + 1);
243 }
244
245 return -ENOENT;
246 }
247
248 int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
249 u32 *bar)
250 {
251 int barnum;
252
253 /* extract the bar number from fdt_pci_addr */
254 barnum = addr->phys_hi & 0xff;
255 if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
256 return -EINVAL;
257
258 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
259
260 *bar = dm_pci_read_bar32(dev, barnum);
261
262 return 0;
263 }
264
265 int fdtdec_get_pci_bus_range(const void *blob, int node,
266 struct fdt_resource *res)
267 {
268 const u32 *values;
269 int len;
270
271 values = fdt_getprop(blob, node, "bus-range", &len);
272 if (!values || len < sizeof(*values) * 2)
273 return -EINVAL;
274
275 res->start = fdt32_to_cpu(*values++);
276 res->end = fdt32_to_cpu(*values);
277
278 return 0;
279 }
280
281 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
282 uint64_t default_val)
283 {
284 const unaligned_fdt64_t *cell64;
285 int length;
286
287 cell64 = fdt_getprop(blob, node, prop_name, &length);
288 if (!cell64 || length < sizeof(*cell64))
289 return default_val;
290
291 return fdt64_to_cpu(*cell64);
292 }
293
294 int fdtdec_get_is_enabled(const void *blob, int node)
295 {
296 const char *cell;
297
298 /*
299 * It should say "okay", so only allow that. Some fdts use "ok" but
300 * this is a bug. Please fix your device tree source file. See here
301 * for discussion:
302 *
303 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
304 */
305 cell = fdt_getprop(blob, node, "status", NULL);
306 if (cell)
307 return strcmp(cell, "okay") == 0;
308 return 1;
309 }
310
311 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
312 {
313 enum fdt_compat_id id;
314
315 /* Search our drivers */
316 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
317 if (fdt_node_check_compatible(blob, node,
318 compat_names[id]) == 0)
319 return id;
320 return COMPAT_UNKNOWN;
321 }
322
323 int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
324 {
325 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
326 }
327
328 int fdtdec_next_compatible_subnode(const void *blob, int node,
329 enum fdt_compat_id id, int *depthp)
330 {
331 do {
332 node = fdt_next_node(blob, node, depthp);
333 } while (*depthp > 1);
334
335 /* If this is a direct subnode, and compatible, return it */
336 if (*depthp == 1 && 0 == fdt_node_check_compatible(
337 blob, node, compat_names[id]))
338 return node;
339
340 return -FDT_ERR_NOTFOUND;
341 }
342
343 int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
344 int *upto)
345 {
346 #define MAX_STR_LEN 20
347 char str[MAX_STR_LEN + 20];
348 int node, err;
349
350 /* snprintf() is not available */
351 assert(strlen(name) < MAX_STR_LEN);
352 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
353 node = fdt_path_offset(blob, str);
354 if (node < 0)
355 return node;
356 err = fdt_node_check_compatible(blob, node, compat_names[id]);
357 if (err < 0)
358 return err;
359 if (err)
360 return -FDT_ERR_NOTFOUND;
361 (*upto)++;
362 return node;
363 }
364
365 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
366 enum fdt_compat_id id, int *node_list,
367 int maxcount)
368 {
369 memset(node_list, '\0', sizeof(*node_list) * maxcount);
370
371 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
372 }
373
374 /* TODO: Can we tighten this code up a little? */
375 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
376 enum fdt_compat_id id, int *node_list,
377 int maxcount)
378 {
379 int name_len = strlen(name);
380 int nodes[maxcount];
381 int num_found = 0;
382 int offset, node;
383 int alias_node;
384 int count;
385 int i, j;
386
387 /* find the alias node if present */
388 alias_node = fdt_path_offset(blob, "/aliases");
389
390 /*
391 * start with nothing, and we can assume that the root node can't
392 * match
393 */
394 memset(nodes, '\0', sizeof(nodes));
395
396 /* First find all the compatible nodes */
397 for (node = count = 0; node >= 0 && count < maxcount;) {
398 node = fdtdec_next_compatible(blob, node, id);
399 if (node >= 0)
400 nodes[count++] = node;
401 }
402 if (node >= 0)
403 debug("%s: warning: maxcount exceeded with alias '%s'\n",
404 __func__, name);
405
406 /* Now find all the aliases */
407 for (offset = fdt_first_property_offset(blob, alias_node);
408 offset > 0;
409 offset = fdt_next_property_offset(blob, offset)) {
410 const struct fdt_property *prop;
411 const char *path;
412 int number;
413 int found;
414
415 node = 0;
416 prop = fdt_get_property_by_offset(blob, offset, NULL);
417 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
418 if (prop->len && 0 == strncmp(path, name, name_len))
419 node = fdt_path_offset(blob, prop->data);
420 if (node <= 0)
421 continue;
422
423 /* Get the alias number */
424 number = dectoul(path + name_len, NULL);
425 if (number < 0 || number >= maxcount) {
426 debug("%s: warning: alias '%s' is out of range\n",
427 __func__, path);
428 continue;
429 }
430
431 /* Make sure the node we found is actually in our list! */
432 found = -1;
433 for (j = 0; j < count; j++)
434 if (nodes[j] == node) {
435 found = j;
436 break;
437 }
438
439 if (found == -1) {
440 debug("%s: warning: alias '%s' points to a node "
441 "'%s' that is missing or is not compatible "
442 " with '%s'\n", __func__, path,
443 fdt_get_name(blob, node, NULL),
444 compat_names[id]);
445 continue;
446 }
447
448 /*
449 * Add this node to our list in the right place, and mark
450 * it as done.
451 */
452 if (fdtdec_get_is_enabled(blob, node)) {
453 if (node_list[number]) {
454 debug("%s: warning: alias '%s' requires that "
455 "a node be placed in the list in a "
456 "position which is already filled by "
457 "node '%s'\n", __func__, path,
458 fdt_get_name(blob, node, NULL));
459 continue;
460 }
461 node_list[number] = node;
462 if (number >= num_found)
463 num_found = number + 1;
464 }
465 nodes[found] = 0;
466 }
467
468 /* Add any nodes not mentioned by an alias */
469 for (i = j = 0; i < maxcount; i++) {
470 if (!node_list[i]) {
471 for (; j < maxcount; j++)
472 if (nodes[j] &&
473 fdtdec_get_is_enabled(blob, nodes[j]))
474 break;
475
476 /* Have we run out of nodes to add? */
477 if (j == maxcount)
478 break;
479
480 assert(!node_list[i]);
481 node_list[i] = nodes[j++];
482 if (i >= num_found)
483 num_found = i + 1;
484 }
485 }
486
487 return num_found;
488 }
489
490 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
491 int *seqp)
492 {
493 int base_len = strlen(base);
494 const char *find_name;
495 int find_namelen;
496 int prop_offset;
497 int aliases;
498
499 find_name = fdt_get_name(blob, offset, &find_namelen);
500 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
501
502 aliases = fdt_path_offset(blob, "/aliases");
503 for (prop_offset = fdt_first_property_offset(blob, aliases);
504 prop_offset > 0;
505 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
506 const char *prop;
507 const char *name;
508 const char *slash;
509 int len, val;
510
511 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
512 debug(" - %s, %s\n", name, prop);
513 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
514 strncmp(name, base, base_len))
515 continue;
516
517 slash = strrchr(prop, '/');
518 if (strcmp(slash + 1, find_name))
519 continue;
520
521 /*
522 * Adding an extra check to distinguish DT nodes with
523 * same name
524 */
525 if (IS_ENABLED(CONFIG_PHANDLE_CHECK_SEQ)) {
526 if (fdt_get_phandle(blob, offset) !=
527 fdt_get_phandle(blob, fdt_path_offset(blob, prop)))
528 continue;
529 }
530
531 val = trailing_strtol(name);
532 if (val != -1) {
533 *seqp = val;
534 debug("Found seq %d\n", *seqp);
535 return 0;
536 }
537 }
538
539 debug("Not found\n");
540 return -ENOENT;
541 }
542
543 int fdtdec_get_alias_highest_id(const void *blob, const char *base)
544 {
545 int base_len = strlen(base);
546 int prop_offset;
547 int aliases;
548 int max = -1;
549
550 debug("Looking for highest alias id for '%s'\n", base);
551
552 aliases = fdt_path_offset(blob, "/aliases");
553 for (prop_offset = fdt_first_property_offset(blob, aliases);
554 prop_offset > 0;
555 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
556 const char *prop;
557 const char *name;
558 int len, val;
559
560 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
561 debug(" - %s, %s\n", name, prop);
562 if (*prop != '/' || prop[len - 1] ||
563 strncmp(name, base, base_len))
564 continue;
565
566 val = trailing_strtol(name);
567 if (val > max) {
568 debug("Found seq %d\n", val);
569 max = val;
570 }
571 }
572
573 return max;
574 }
575
576 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
577 {
578 int chosen_node;
579
580 if (!blob)
581 return NULL;
582 chosen_node = fdt_path_offset(blob, "/chosen");
583 return fdt_getprop(blob, chosen_node, name, NULL);
584 }
585
586 int fdtdec_get_chosen_node(const void *blob, const char *name)
587 {
588 const char *prop;
589
590 prop = fdtdec_get_chosen_prop(blob, name);
591 if (!prop)
592 return -FDT_ERR_NOTFOUND;
593 return fdt_path_offset(blob, prop);
594 }
595
596 /**
597 * fdtdec_prepare_fdt() - Check we have a valid fdt available to control U-Boot
598 *
599 * @blob: Blob to check
600 *
601 * If not, a message is printed to the console if the console is ready.
602 *
603 * Return: 0 if all ok, -ENOENT if not
604 */
605 static int fdtdec_prepare_fdt(const void *blob)
606 {
607 if (!blob || ((uintptr_t)blob & 3) || fdt_check_header(blob)) {
608 if (spl_phase() <= PHASE_SPL) {
609 puts("Missing DTB\n");
610 } else {
611 printf("No valid device tree binary found at %p\n",
612 blob);
613 if (_DEBUG && blob) {
614 printf("fdt_blob=%p\n", blob);
615 print_buffer((ulong)blob, blob, 4, 32, 0);
616 }
617 }
618 return -ENOENT;
619 }
620
621 return 0;
622 }
623
624 int fdtdec_check_fdt(void)
625 {
626 /*
627 * We must have an FDT, but we cannot panic() yet since the console
628 * is not ready. So for now, just assert(). Boards which need an early
629 * FDT (prior to console ready) will need to make their own
630 * arrangements and do their own checks.
631 */
632 assert(!fdtdec_prepare_fdt(gd->fdt_blob));
633 return 0;
634 }
635
636 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
637 {
638 const u32 *phandle;
639 int lookup;
640
641 debug("%s: %s\n", __func__, prop_name);
642 phandle = fdt_getprop(blob, node, prop_name, NULL);
643 if (!phandle)
644 return -FDT_ERR_NOTFOUND;
645
646 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
647 return lookup;
648 }
649
650 /**
651 * Look up a property in a node and check that it has a minimum length.
652 *
653 * @param blob FDT blob
654 * @param node node to examine
655 * @param prop_name name of property to find
656 * @param min_len minimum property length in bytes
657 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
658 found, or -FDT_ERR_BADLAYOUT if not enough data
659 * Return: pointer to cell, which is only valid if err == 0
660 */
661 static const void *get_prop_check_min_len(const void *blob, int node,
662 const char *prop_name, int min_len,
663 int *err)
664 {
665 const void *cell;
666 int len;
667
668 debug("%s: %s\n", __func__, prop_name);
669 cell = fdt_getprop(blob, node, prop_name, &len);
670 if (!cell)
671 *err = -FDT_ERR_NOTFOUND;
672 else if (len < min_len)
673 *err = -FDT_ERR_BADLAYOUT;
674 else
675 *err = 0;
676 return cell;
677 }
678
679 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
680 u32 *array, int count)
681 {
682 const u32 *cell;
683 int err = 0;
684
685 debug("%s: %s\n", __func__, prop_name);
686 cell = get_prop_check_min_len(blob, node, prop_name,
687 sizeof(u32) * count, &err);
688 if (!err) {
689 int i;
690
691 for (i = 0; i < count; i++)
692 array[i] = fdt32_to_cpu(cell[i]);
693 }
694 return err;
695 }
696
697 int fdtdec_get_int_array_count(const void *blob, int node,
698 const char *prop_name, u32 *array, int count)
699 {
700 const u32 *cell;
701 int len, elems;
702 int i;
703
704 debug("%s: %s\n", __func__, prop_name);
705 cell = fdt_getprop(blob, node, prop_name, &len);
706 if (!cell)
707 return -FDT_ERR_NOTFOUND;
708 elems = len / sizeof(u32);
709 if (count > elems)
710 count = elems;
711 for (i = 0; i < count; i++)
712 array[i] = fdt32_to_cpu(cell[i]);
713
714 return count;
715 }
716
717 const u32 *fdtdec_locate_array(const void *blob, int node,
718 const char *prop_name, int count)
719 {
720 const u32 *cell;
721 int err;
722
723 cell = get_prop_check_min_len(blob, node, prop_name,
724 sizeof(u32) * count, &err);
725 return err ? NULL : cell;
726 }
727
728 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
729 {
730 const s32 *cell;
731 int len;
732
733 debug("%s: %s\n", __func__, prop_name);
734 cell = fdt_getprop(blob, node, prop_name, &len);
735 return cell != NULL;
736 }
737
738 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
739 const char *list_name,
740 const char *cells_name,
741 int cell_count, int index,
742 struct fdtdec_phandle_args *out_args)
743 {
744 const __be32 *list, *list_end;
745 int rc = 0, size, cur_index = 0;
746 uint32_t count = 0;
747 int node = -1;
748 int phandle;
749
750 /* Retrieve the phandle list property */
751 list = fdt_getprop(blob, src_node, list_name, &size);
752 if (!list)
753 return -ENOENT;
754 list_end = list + size / sizeof(*list);
755
756 /* Loop over the phandles until all the requested entry is found */
757 while (list < list_end) {
758 rc = -EINVAL;
759 count = 0;
760
761 /*
762 * If phandle is 0, then it is an empty entry with no
763 * arguments. Skip forward to the next entry.
764 */
765 phandle = be32_to_cpup(list++);
766 if (phandle) {
767 /*
768 * Find the provider node and parse the #*-cells
769 * property to determine the argument length.
770 *
771 * This is not needed if the cell count is hard-coded
772 * (i.e. cells_name not set, but cell_count is set),
773 * except when we're going to return the found node
774 * below.
775 */
776 if (cells_name || cur_index == index) {
777 node = fdt_node_offset_by_phandle(blob,
778 phandle);
779 if (node < 0) {
780 debug("%s: could not find phandle\n",
781 fdt_get_name(blob, src_node,
782 NULL));
783 goto err;
784 }
785 }
786
787 if (cells_name) {
788 count = fdtdec_get_int(blob, node, cells_name,
789 -1);
790 if (count == -1) {
791 debug("%s: could not get %s for %s\n",
792 fdt_get_name(blob, src_node,
793 NULL),
794 cells_name,
795 fdt_get_name(blob, node,
796 NULL));
797 goto err;
798 }
799 } else {
800 count = cell_count;
801 }
802
803 /*
804 * Make sure that the arguments actually fit in the
805 * remaining property data length
806 */
807 if (list + count > list_end) {
808 debug("%s: arguments longer than property\n",
809 fdt_get_name(blob, src_node, NULL));
810 goto err;
811 }
812 }
813
814 /*
815 * All of the error cases above bail out of the loop, so at
816 * this point, the parsing is successful. If the requested
817 * index matches, then fill the out_args structure and return,
818 * or return -ENOENT for an empty entry.
819 */
820 rc = -ENOENT;
821 if (cur_index == index) {
822 if (!phandle)
823 goto err;
824
825 if (out_args) {
826 int i;
827
828 if (count > MAX_PHANDLE_ARGS) {
829 debug("%s: too many arguments %d\n",
830 fdt_get_name(blob, src_node,
831 NULL), count);
832 count = MAX_PHANDLE_ARGS;
833 }
834 out_args->node = node;
835 out_args->args_count = count;
836 for (i = 0; i < count; i++) {
837 out_args->args[i] =
838 be32_to_cpup(list++);
839 }
840 }
841
842 /* Found it! return success */
843 return 0;
844 }
845
846 node = -1;
847 list += count;
848 cur_index++;
849 }
850
851 /*
852 * Result will be one of:
853 * -ENOENT : index is for empty phandle
854 * -EINVAL : parsing error on data
855 * [1..n] : Number of phandle (count mode; when index = -1)
856 */
857 rc = index < 0 ? cur_index : -ENOENT;
858 err:
859 return rc;
860 }
861
862 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
863 u8 *array, int count)
864 {
865 const u8 *cell;
866 int err;
867
868 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
869 if (!err)
870 memcpy(array, cell, count);
871 return err;
872 }
873
874 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
875 const char *prop_name, int count)
876 {
877 const u8 *cell;
878 int err;
879
880 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
881 if (err)
882 return NULL;
883 return cell;
884 }
885
886 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
887 {
888 u64 number = 0;
889
890 while (cells--)
891 number = (number << 32) | fdt32_to_cpu(*ptr++);
892
893 return number;
894 }
895
896 int fdt_get_resource(const void *fdt, int node, const char *property,
897 unsigned int index, struct fdt_resource *res)
898 {
899 const fdt32_t *ptr, *end;
900 int na, ns, len, parent;
901 unsigned int i = 0;
902
903 parent = fdt_parent_offset(fdt, node);
904 if (parent < 0)
905 return parent;
906
907 na = fdt_address_cells(fdt, parent);
908 ns = fdt_size_cells(fdt, parent);
909
910 ptr = fdt_getprop(fdt, node, property, &len);
911 if (!ptr)
912 return len;
913
914 end = ptr + len / sizeof(*ptr);
915
916 while (ptr + na + ns <= end) {
917 if (i == index) {
918 if (CONFIG_IS_ENABLED(OF_TRANSLATE))
919 res->start = fdt_translate_address(fdt, node, ptr);
920 else
921 res->start = fdtdec_get_number(ptr, na);
922
923 res->end = res->start;
924 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
925 return 0;
926 }
927
928 ptr += na + ns;
929 i++;
930 }
931
932 return -FDT_ERR_NOTFOUND;
933 }
934
935 int fdt_get_named_resource(const void *fdt, int node, const char *property,
936 const char *prop_names, const char *name,
937 struct fdt_resource *res)
938 {
939 int index;
940
941 index = fdt_stringlist_search(fdt, node, prop_names, name);
942 if (index < 0)
943 return index;
944
945 return fdt_get_resource(fdt, node, property, index, res);
946 }
947
948 static int decode_timing_property(const void *blob, int node, const char *name,
949 struct timing_entry *result)
950 {
951 int length, ret = 0;
952 const u32 *prop;
953
954 prop = fdt_getprop(blob, node, name, &length);
955 if (!prop) {
956 debug("%s: could not find property %s\n",
957 fdt_get_name(blob, node, NULL), name);
958 return length;
959 }
960
961 if (length == sizeof(u32)) {
962 result->typ = fdtdec_get_int(blob, node, name, 0);
963 result->min = result->typ;
964 result->max = result->typ;
965 } else {
966 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
967 }
968
969 return ret;
970 }
971
972 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
973 struct display_timing *dt)
974 {
975 int i, node, timings_node;
976 u32 val = 0;
977 int ret = 0;
978
979 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
980 if (timings_node < 0)
981 return timings_node;
982
983 for (i = 0, node = fdt_first_subnode(blob, timings_node);
984 node > 0 && i != index;
985 node = fdt_next_subnode(blob, node))
986 i++;
987
988 if (node < 0)
989 return node;
990
991 memset(dt, 0, sizeof(*dt));
992
993 ret |= decode_timing_property(blob, node, "hback-porch",
994 &dt->hback_porch);
995 ret |= decode_timing_property(blob, node, "hfront-porch",
996 &dt->hfront_porch);
997 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
998 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
999 ret |= decode_timing_property(blob, node, "vback-porch",
1000 &dt->vback_porch);
1001 ret |= decode_timing_property(blob, node, "vfront-porch",
1002 &dt->vfront_porch);
1003 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1004 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1005 ret |= decode_timing_property(blob, node, "clock-frequency",
1006 &dt->pixelclock);
1007
1008 dt->flags = 0;
1009 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1010 if (val != -1) {
1011 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1012 DISPLAY_FLAGS_VSYNC_LOW;
1013 }
1014 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1015 if (val != -1) {
1016 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1017 DISPLAY_FLAGS_HSYNC_LOW;
1018 }
1019 val = fdtdec_get_int(blob, node, "de-active", -1);
1020 if (val != -1) {
1021 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1022 DISPLAY_FLAGS_DE_LOW;
1023 }
1024 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1025 if (val != -1) {
1026 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1027 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1028 }
1029
1030 if (fdtdec_get_bool(blob, node, "interlaced"))
1031 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1032 if (fdtdec_get_bool(blob, node, "doublescan"))
1033 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1034 if (fdtdec_get_bool(blob, node, "doubleclk"))
1035 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1036
1037 return ret;
1038 }
1039
1040 int fdtdec_setup_mem_size_base(void)
1041 {
1042 int ret;
1043 ofnode mem;
1044 struct resource res;
1045
1046 mem = ofnode_path("/memory");
1047 if (!ofnode_valid(mem)) {
1048 debug("%s: Missing /memory node\n", __func__);
1049 return -EINVAL;
1050 }
1051
1052 ret = ofnode_read_resource(mem, 0, &res);
1053 if (ret != 0) {
1054 debug("%s: Unable to decode first memory bank\n", __func__);
1055 return -EINVAL;
1056 }
1057
1058 gd->ram_size = (phys_size_t)(res.end - res.start + 1);
1059 gd->ram_base = (unsigned long)res.start;
1060 debug("%s: Initial DRAM size %llx\n", __func__,
1061 (unsigned long long)gd->ram_size);
1062
1063 return 0;
1064 }
1065
1066 ofnode get_next_memory_node(ofnode mem)
1067 {
1068 do {
1069 mem = ofnode_by_prop_value(mem, "device_type", "memory", 7);
1070 } while (!ofnode_is_enabled(mem));
1071
1072 return mem;
1073 }
1074
1075 int fdtdec_setup_memory_banksize(void)
1076 {
1077 int bank, ret, reg = 0;
1078 struct resource res;
1079 ofnode mem = ofnode_null();
1080
1081 mem = get_next_memory_node(mem);
1082 if (!ofnode_valid(mem)) {
1083 debug("%s: Missing /memory node\n", __func__);
1084 return -EINVAL;
1085 }
1086
1087 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1088 ret = ofnode_read_resource(mem, reg++, &res);
1089 if (ret < 0) {
1090 reg = 0;
1091 mem = get_next_memory_node(mem);
1092 if (!ofnode_valid(mem))
1093 break;
1094
1095 ret = ofnode_read_resource(mem, reg++, &res);
1096 if (ret < 0)
1097 break;
1098 }
1099
1100 if (ret != 0)
1101 return -EINVAL;
1102
1103 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
1104 gd->bd->bi_dram[bank].size =
1105 (phys_size_t)(res.end - res.start + 1);
1106
1107 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
1108 __func__, bank,
1109 (unsigned long long)gd->bd->bi_dram[bank].start,
1110 (unsigned long long)gd->bd->bi_dram[bank].size);
1111 }
1112
1113 return 0;
1114 }
1115
1116 int fdtdec_setup_mem_size_base_lowest(void)
1117 {
1118 int bank, ret, reg = 0;
1119 struct resource res;
1120 unsigned long base;
1121 phys_size_t size;
1122 ofnode mem = ofnode_null();
1123
1124 gd->ram_base = (unsigned long)~0;
1125
1126 mem = get_next_memory_node(mem);
1127 if (!ofnode_valid(mem)) {
1128 debug("%s: Missing /memory node\n", __func__);
1129 return -EINVAL;
1130 }
1131
1132 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1133 ret = ofnode_read_resource(mem, reg++, &res);
1134 if (ret < 0) {
1135 reg = 0;
1136 mem = get_next_memory_node(mem);
1137 if (!ofnode_valid(mem))
1138 break;
1139
1140 ret = ofnode_read_resource(mem, reg++, &res);
1141 if (ret < 0)
1142 break;
1143 }
1144
1145 if (ret != 0)
1146 return -EINVAL;
1147
1148 base = (unsigned long)res.start;
1149 size = (phys_size_t)(res.end - res.start + 1);
1150
1151 if (gd->ram_base > base && size) {
1152 gd->ram_base = base;
1153 gd->ram_size = size;
1154 debug("%s: Initial DRAM base %lx size %lx\n",
1155 __func__, base, (unsigned long)size);
1156 }
1157 }
1158
1159 return 0;
1160 }
1161
1162 static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
1163 {
1164 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
1165 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
1166 size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
1167 bool gzip = 0, lzo = 0;
1168 ulong sz_in = sz_src;
1169 void *dst;
1170 int rc;
1171
1172 if (CONFIG_IS_ENABLED(GZIP))
1173 if (gzip_parse_header(src, sz_in) >= 0)
1174 gzip = 1;
1175 if (CONFIG_IS_ENABLED(LZO))
1176 if (!gzip && lzop_is_valid_header(src))
1177 lzo = 1;
1178
1179 if (!gzip && !lzo)
1180 return -EBADMSG;
1181
1182
1183 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
1184 dst = malloc(sz_out);
1185 if (!dst) {
1186 puts("uncompress_blob: Unable to allocate memory\n");
1187 return -ENOMEM;
1188 }
1189 } else {
1190 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
1191 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
1192 # else
1193 return -ENOTSUPP;
1194 # endif
1195 }
1196
1197 if (CONFIG_IS_ENABLED(GZIP) && gzip)
1198 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
1199 else if (CONFIG_IS_ENABLED(LZO) && lzo)
1200 rc = lzop_decompress(src, sz_in, dst, &sz_out);
1201 else
1202 hang();
1203
1204 if (rc < 0) {
1205 /* not a valid compressed blob */
1206 puts("uncompress_blob: Unable to uncompress\n");
1207 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
1208 free(dst);
1209 return -EBADMSG;
1210 }
1211 *dstp = dst;
1212 #else
1213 *dstp = (void *)src;
1214 *dstp = (void *)src;
1215 #endif
1216 return 0;
1217 }
1218
1219 /**
1220 * fdt_find_separate() - Find a devicetree at the end of the image
1221 *
1222 * Return: pointer to FDT blob
1223 */
1224 static void *fdt_find_separate(void)
1225 {
1226 void *fdt_blob = NULL;
1227
1228 if (IS_ENABLED(CONFIG_SANDBOX))
1229 return NULL;
1230
1231 #ifdef CONFIG_SPL_BUILD
1232 /* FDT is at end of BSS unless it is in a different memory region */
1233 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1234 fdt_blob = (ulong *)&_image_binary_end;
1235 else
1236 fdt_blob = (ulong *)&__bss_end;
1237 #else
1238 /* FDT is at end of image */
1239 fdt_blob = (ulong *)&_end;
1240
1241 if (_DEBUG && !fdtdec_prepare_fdt(fdt_blob)) {
1242 int stack_ptr;
1243 const void *top = fdt_blob + fdt_totalsize(fdt_blob);
1244
1245 /*
1246 * Perform a sanity check on the memory layout. If this fails,
1247 * it indicates that the device tree is positioned above the
1248 * global data pointer or the stack pointer. This should not
1249 * happen.
1250 *
1251 * If this fails, check that SYS_INIT_SP_ADDR has enough space
1252 * below it for SYS_MALLOC_F_LEN and global_data, as well as the
1253 * stack, without overwriting the device tree or U-Boot itself.
1254 * Since the device tree is sitting at _end (the start of the
1255 * BSS region), we need the top of the device tree to be below
1256 * any memory allocated by board_init_f_alloc_reserve().
1257 */
1258 if (top > (void *)gd || top > (void *)&stack_ptr) {
1259 printf("FDT %p gd %p\n", fdt_blob, gd);
1260 panic("FDT overlap");
1261 }
1262 }
1263 #endif
1264
1265 return fdt_blob;
1266 }
1267
1268 int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
1269 {
1270 const char *path;
1271 int offset, err;
1272
1273 if (!is_valid_ethaddr(mac))
1274 return -EINVAL;
1275
1276 path = fdt_get_alias(fdt, "ethernet");
1277 if (!path)
1278 return 0;
1279
1280 debug("ethernet alias found: %s\n", path);
1281
1282 offset = fdt_path_offset(fdt, path);
1283 if (offset < 0) {
1284 debug("ethernet alias points to absent node %s\n", path);
1285 return -ENOENT;
1286 }
1287
1288 err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
1289 if (err < 0)
1290 return err;
1291
1292 debug("MAC address: %pM\n", mac);
1293
1294 return 0;
1295 }
1296
1297 static int fdtdec_init_reserved_memory(void *blob)
1298 {
1299 int na, ns, node, err;
1300 fdt32_t value;
1301
1302 /* inherit #address-cells and #size-cells from the root node */
1303 na = fdt_address_cells(blob, 0);
1304 ns = fdt_size_cells(blob, 0);
1305
1306 node = fdt_add_subnode(blob, 0, "reserved-memory");
1307 if (node < 0)
1308 return node;
1309
1310 err = fdt_setprop(blob, node, "ranges", NULL, 0);
1311 if (err < 0)
1312 return err;
1313
1314 value = cpu_to_fdt32(ns);
1315
1316 err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
1317 if (err < 0)
1318 return err;
1319
1320 value = cpu_to_fdt32(na);
1321
1322 err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
1323 if (err < 0)
1324 return err;
1325
1326 return node;
1327 }
1328
1329 int fdtdec_add_reserved_memory(void *blob, const char *basename,
1330 const struct fdt_memory *carveout,
1331 const char **compatibles, unsigned int count,
1332 uint32_t *phandlep, unsigned long flags)
1333 {
1334 fdt32_t cells[4] = {}, *ptr = cells;
1335 uint32_t upper, lower, phandle;
1336 int parent, node, na, ns, err;
1337 fdt_size_t size;
1338 char name[64];
1339
1340 /* create an empty /reserved-memory node if one doesn't exist */
1341 parent = fdt_path_offset(blob, "/reserved-memory");
1342 if (parent < 0) {
1343 parent = fdtdec_init_reserved_memory(blob);
1344 if (parent < 0)
1345 return parent;
1346 }
1347
1348 /* only 1 or 2 #address-cells and #size-cells are supported */
1349 na = fdt_address_cells(blob, parent);
1350 if (na < 1 || na > 2)
1351 return -FDT_ERR_BADNCELLS;
1352
1353 ns = fdt_size_cells(blob, parent);
1354 if (ns < 1 || ns > 2)
1355 return -FDT_ERR_BADNCELLS;
1356
1357 /* find a matching node and return the phandle to that */
1358 fdt_for_each_subnode(node, blob, parent) {
1359 const char *name = fdt_get_name(blob, node, NULL);
1360 fdt_addr_t addr;
1361 fdt_size_t size;
1362
1363 addr = fdtdec_get_addr_size_fixed(blob, node, "reg", 0, na, ns,
1364 &size, false);
1365 if (addr == FDT_ADDR_T_NONE) {
1366 debug("failed to read address/size for %s\n", name);
1367 continue;
1368 }
1369
1370 if (addr == carveout->start && (addr + size - 1) ==
1371 carveout->end) {
1372 if (phandlep)
1373 *phandlep = fdt_get_phandle(blob, node);
1374 return 0;
1375 }
1376 }
1377
1378 /*
1379 * Unpack the start address and generate the name of the new node
1380 * base on the basename and the unit-address.
1381 */
1382 upper = upper_32_bits(carveout->start);
1383 lower = lower_32_bits(carveout->start);
1384
1385 if (na > 1 && upper > 0)
1386 snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
1387 lower);
1388 else {
1389 if (upper > 0) {
1390 debug("address %08x:%08x exceeds addressable space\n",
1391 upper, lower);
1392 return -FDT_ERR_BADVALUE;
1393 }
1394
1395 snprintf(name, sizeof(name), "%s@%x", basename, lower);
1396 }
1397
1398 node = fdt_add_subnode(blob, parent, name);
1399 if (node < 0)
1400 return node;
1401
1402 if (flags & FDTDEC_RESERVED_MEMORY_NO_MAP) {
1403 err = fdt_setprop(blob, node, "no-map", NULL, 0);
1404 if (err < 0)
1405 return err;
1406 }
1407
1408 if (phandlep) {
1409 err = fdt_generate_phandle(blob, &phandle);
1410 if (err < 0)
1411 return err;
1412
1413 err = fdtdec_set_phandle(blob, node, phandle);
1414 if (err < 0)
1415 return err;
1416 }
1417
1418 /* store one or two address cells */
1419 if (na > 1)
1420 *ptr++ = cpu_to_fdt32(upper);
1421
1422 *ptr++ = cpu_to_fdt32(lower);
1423
1424 /* store one or two size cells */
1425 size = carveout->end - carveout->start + 1;
1426 upper = upper_32_bits(size);
1427 lower = lower_32_bits(size);
1428
1429 if (ns > 1)
1430 *ptr++ = cpu_to_fdt32(upper);
1431
1432 *ptr++ = cpu_to_fdt32(lower);
1433
1434 err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
1435 if (err < 0)
1436 return err;
1437
1438 if (compatibles && count > 0) {
1439 size_t length = 0, len = 0;
1440 unsigned int i;
1441 char *buffer;
1442
1443 for (i = 0; i < count; i++)
1444 length += strlen(compatibles[i]) + 1;
1445
1446 buffer = malloc(length);
1447 if (!buffer)
1448 return -FDT_ERR_INTERNAL;
1449
1450 for (i = 0; i < count; i++)
1451 len += strlcpy(buffer + len, compatibles[i],
1452 length - len) + 1;
1453
1454 err = fdt_setprop(blob, node, "compatible", buffer, length);
1455 free(buffer);
1456 if (err < 0)
1457 return err;
1458 }
1459
1460 /* return the phandle for the new node for the caller to use */
1461 if (phandlep)
1462 *phandlep = phandle;
1463
1464 return 0;
1465 }
1466
1467 int fdtdec_get_carveout(const void *blob, const char *node,
1468 const char *prop_name, unsigned int index,
1469 struct fdt_memory *carveout, const char **name,
1470 const char ***compatiblesp, unsigned int *countp,
1471 unsigned long *flags)
1472 {
1473 const fdt32_t *prop;
1474 uint32_t phandle;
1475 int offset, len;
1476 fdt_size_t size;
1477
1478 offset = fdt_path_offset(blob, node);
1479 if (offset < 0)
1480 return offset;
1481
1482 prop = fdt_getprop(blob, offset, prop_name, &len);
1483 if (!prop) {
1484 debug("failed to get %s for %s\n", prop_name, node);
1485 return -FDT_ERR_NOTFOUND;
1486 }
1487
1488 if ((len % sizeof(phandle)) != 0) {
1489 debug("invalid phandle property\n");
1490 return -FDT_ERR_BADPHANDLE;
1491 }
1492
1493 if (len < (sizeof(phandle) * (index + 1))) {
1494 debug("invalid phandle index\n");
1495 return -FDT_ERR_NOTFOUND;
1496 }
1497
1498 phandle = fdt32_to_cpu(prop[index]);
1499
1500 offset = fdt_node_offset_by_phandle(blob, phandle);
1501 if (offset < 0) {
1502 debug("failed to find node for phandle %u\n", phandle);
1503 return offset;
1504 }
1505
1506 if (name)
1507 *name = fdt_get_name(blob, offset, NULL);
1508
1509 if (compatiblesp) {
1510 const char **compatibles = NULL;
1511 const char *start, *end, *ptr;
1512 unsigned int count = 0;
1513
1514 prop = fdt_getprop(blob, offset, "compatible", &len);
1515 if (!prop)
1516 goto skip_compat;
1517
1518 start = ptr = (const char *)prop;
1519 end = start + len;
1520
1521 while (ptr < end) {
1522 ptr = strchrnul(ptr, '\0');
1523 count++;
1524 ptr++;
1525 }
1526
1527 compatibles = malloc(sizeof(ptr) * count);
1528 if (!compatibles)
1529 return -FDT_ERR_INTERNAL;
1530
1531 ptr = start;
1532 count = 0;
1533
1534 while (ptr < end) {
1535 compatibles[count] = ptr;
1536 ptr = strchrnul(ptr, '\0');
1537 count++;
1538 ptr++;
1539 }
1540
1541 skip_compat:
1542 *compatiblesp = compatibles;
1543
1544 if (countp)
1545 *countp = count;
1546 }
1547
1548 carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
1549 "reg", 0, &size,
1550 true);
1551 if (carveout->start == FDT_ADDR_T_NONE) {
1552 debug("failed to read address/size from \"reg\" property\n");
1553 return -FDT_ERR_NOTFOUND;
1554 }
1555
1556 carveout->end = carveout->start + size - 1;
1557
1558 if (flags) {
1559 *flags = 0;
1560
1561 if (fdtdec_get_bool(blob, offset, "no-map"))
1562 *flags |= FDTDEC_RESERVED_MEMORY_NO_MAP;
1563 }
1564
1565 return 0;
1566 }
1567
1568 int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
1569 unsigned int index, const struct fdt_memory *carveout,
1570 const char *name, const char **compatibles,
1571 unsigned int count, unsigned long flags)
1572 {
1573 uint32_t phandle;
1574 int err, offset, len;
1575 fdt32_t value;
1576 void *prop;
1577
1578 err = fdtdec_add_reserved_memory(blob, name, carveout, compatibles,
1579 count, &phandle, flags);
1580 if (err < 0) {
1581 debug("failed to add reserved memory: %d\n", err);
1582 return err;
1583 }
1584
1585 offset = fdt_path_offset(blob, node);
1586 if (offset < 0) {
1587 debug("failed to find offset for node %s: %d\n", node, offset);
1588 return offset;
1589 }
1590
1591 value = cpu_to_fdt32(phandle);
1592
1593 if (!fdt_getprop(blob, offset, prop_name, &len)) {
1594 if (len == -FDT_ERR_NOTFOUND)
1595 len = 0;
1596 else
1597 return len;
1598 }
1599
1600 if ((index + 1) * sizeof(value) > len) {
1601 err = fdt_setprop_placeholder(blob, offset, prop_name,
1602 (index + 1) * sizeof(value),
1603 &prop);
1604 if (err < 0) {
1605 debug("failed to resize reserved memory property: %s\n",
1606 fdt_strerror(err));
1607 return err;
1608 }
1609 }
1610
1611 err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name,
1612 strlen(prop_name),
1613 index * sizeof(value),
1614 &value, sizeof(value));
1615 if (err < 0) {
1616 debug("failed to update %s property for node %s: %s\n",
1617 prop_name, node, fdt_strerror(err));
1618 return err;
1619 }
1620
1621 return 0;
1622 }
1623
1624 /* TODO(sjg@chromium.org): This function should not be weak */
1625 __weak int fdtdec_board_setup(const void *fdt_blob)
1626 {
1627 return 0;
1628 }
1629
1630 /**
1631 * setup_multi_dtb_fit() - locate the correct dtb from a FIT
1632 *
1633 * This supports the CONFIG_MULTI_DTB_FIT feature, looking for the dtb in a
1634 * supplied FIT
1635 *
1636 * It accepts the current value of gd->fdt_blob, which points to the FIT, then
1637 * updates that gd->fdt_blob, to point to the chosen dtb so that U-Boot uses the
1638 * correct one
1639 */
1640 static void setup_multi_dtb_fit(void)
1641 {
1642 void *blob;
1643
1644 /*
1645 * Try and uncompress the blob.
1646 * Unfortunately there is no way to know how big the input blob really
1647 * is. So let us set the maximum input size arbitrarily high. 16MB
1648 * ought to be more than enough for packed DTBs.
1649 */
1650 if (uncompress_blob(gd->fdt_blob, 0x1000000, &blob) == 0)
1651 gd->fdt_blob = blob;
1652
1653 /*
1654 * Check if blob is a FIT images containings DTBs.
1655 * If so, pick the most relevant
1656 */
1657 blob = locate_dtb_in_fit(gd->fdt_blob);
1658 if (blob) {
1659 gd_set_multi_dtb_fit(gd->fdt_blob);
1660 gd->fdt_blob = blob;
1661 gd->fdt_src = FDTSRC_FIT;
1662 }
1663 }
1664
1665 int fdtdec_setup(void)
1666 {
1667 int ret;
1668
1669 /* The devicetree is typically appended to U-Boot */
1670 if (IS_ENABLED(CONFIG_OF_SEPARATE)) {
1671 gd->fdt_blob = fdt_find_separate();
1672 gd->fdt_src = FDTSRC_SEPARATE;
1673 } else { /* embed dtb in ELF file for testing / development */
1674 gd->fdt_blob = dtb_dt_embedded();
1675 gd->fdt_src = FDTSRC_EMBED;
1676 }
1677
1678 /* Allow the board to override the fdt address. */
1679 if (IS_ENABLED(CONFIG_OF_BOARD)) {
1680 gd->fdt_blob = board_fdt_blob_setup(&ret);
1681 if (ret)
1682 return ret;
1683 gd->fdt_src = FDTSRC_BOARD;
1684 }
1685
1686 /* Allow the early environment to override the fdt address */
1687 if (!IS_ENABLED(CONFIG_SPL_BUILD)) {
1688 ulong addr;
1689
1690 addr = env_get_hex("fdtcontroladdr", 0);
1691 if (addr) {
1692 gd->fdt_blob = map_sysmem(addr, 0);
1693 gd->fdt_src = FDTSRC_ENV;
1694 }
1695 }
1696
1697 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT))
1698 setup_multi_dtb_fit();
1699
1700 ret = fdtdec_prepare_fdt(gd->fdt_blob);
1701 if (!ret)
1702 ret = fdtdec_board_setup(gd->fdt_blob);
1703 oftree_reset();
1704
1705 return ret;
1706 }
1707
1708 int fdtdec_resetup(int *rescan)
1709 {
1710 void *fdt_blob;
1711
1712 /*
1713 * If the current DTB is part of a compressed FIT image,
1714 * try to locate the best match from the uncompressed
1715 * FIT image stillpresent there. Save the time and space
1716 * required to uncompress it again.
1717 */
1718 if (gd_multi_dtb_fit()) {
1719 fdt_blob = locate_dtb_in_fit(gd_multi_dtb_fit());
1720
1721 if (fdt_blob == gd->fdt_blob) {
1722 /*
1723 * The best match did not change. no need to tear down
1724 * the DM and rescan the fdt.
1725 */
1726 *rescan = 0;
1727 return 0;
1728 }
1729
1730 *rescan = 1;
1731 gd->fdt_blob = fdt_blob;
1732 return fdtdec_prepare_fdt(fdt_blob);
1733 }
1734
1735 /*
1736 * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
1737 * not a FIT image containings DTB, but a single DTB. There is no need
1738 * to teard down DM and rescan the DT in this case.
1739 */
1740 *rescan = 0;
1741 return 0;
1742 }
1743
1744 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
1745 phys_addr_t *basep, phys_size_t *sizep,
1746 struct bd_info *bd)
1747 {
1748 int addr_cells, size_cells;
1749 const u32 *cell, *end;
1750 u64 total_size, size, addr;
1751 int node, child;
1752 bool auto_size;
1753 int bank;
1754 int len;
1755
1756 debug("%s: board_id=%d\n", __func__, board_id);
1757 if (!area)
1758 area = "/memory";
1759 node = fdt_path_offset(blob, area);
1760 if (node < 0) {
1761 debug("No %s node found\n", area);
1762 return -ENOENT;
1763 }
1764
1765 cell = fdt_getprop(blob, node, "reg", &len);
1766 if (!cell) {
1767 debug("No reg property found\n");
1768 return -ENOENT;
1769 }
1770
1771 addr_cells = fdt_address_cells(blob, node);
1772 size_cells = fdt_size_cells(blob, node);
1773
1774 /* Check the board id and mask */
1775 for (child = fdt_first_subnode(blob, node);
1776 child >= 0;
1777 child = fdt_next_subnode(blob, child)) {
1778 int match_mask, match_value;
1779
1780 match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
1781 match_value = fdtdec_get_int(blob, child, "match-value", -1);
1782
1783 if (match_value >= 0 &&
1784 ((board_id & match_mask) == match_value)) {
1785 /* Found matching mask */
1786 debug("Found matching mask %d\n", match_mask);
1787 node = child;
1788 cell = fdt_getprop(blob, node, "reg", &len);
1789 if (!cell) {
1790 debug("No memory-banks property found\n");
1791 return -EINVAL;
1792 }
1793 break;
1794 }
1795 }
1796 /* Note: if no matching subnode was found we use the parent node */
1797
1798 if (bd) {
1799 memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
1800 CONFIG_NR_DRAM_BANKS);
1801 }
1802
1803 auto_size = fdtdec_get_bool(blob, node, "auto-size");
1804
1805 total_size = 0;
1806 end = cell + len / 4 - addr_cells - size_cells;
1807 debug("cell at %p, end %p\n", cell, end);
1808 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
1809 if (cell > end)
1810 break;
1811 addr = 0;
1812 if (addr_cells == 2)
1813 addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
1814 addr += fdt32_to_cpu(*cell++);
1815 if (bd)
1816 bd->bi_dram[bank].start = addr;
1817 if (basep && !bank)
1818 *basep = (phys_addr_t)addr;
1819
1820 size = 0;
1821 if (size_cells == 2)
1822 size += (u64)fdt32_to_cpu(*cell++) << 32UL;
1823 size += fdt32_to_cpu(*cell++);
1824
1825 if (auto_size) {
1826 u64 new_size;
1827
1828 debug("Auto-sizing %llx, size %llx: ", addr, size);
1829 new_size = get_ram_size((long *)(uintptr_t)addr, size);
1830 if (new_size == size) {
1831 debug("OK\n");
1832 } else {
1833 debug("sized to %llx\n", new_size);
1834 size = new_size;
1835 }
1836 }
1837
1838 if (bd)
1839 bd->bi_dram[bank].size = size;
1840 total_size += size;
1841 }
1842
1843 debug("Memory size %llu\n", total_size);
1844 if (sizep)
1845 *sizep = (phys_size_t)total_size;
1846
1847 return 0;
1848 }
1849
1850 #endif /* !USE_HOSTCC */