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libpci: generic: Implement CLASS_EXT and SUBSYS support
[thirdparty/pciutils.git] / lib / generic.c
1 /*
2 * The PCI Library -- Generic Direct Access Functions
3 *
4 * Copyright (c) 1997--2022 Martin Mares <mj@ucw.cz>
5 *
6 * Can be freely distributed and used under the terms of the GNU GPL.
7 */
8
9 #include <string.h>
10
11 #include "internal.h"
12
13 void
14 pci_generic_scan_bus(struct pci_access *a, byte *busmap, int bus)
15 {
16 int dev, multi, ht;
17 struct pci_dev *t;
18
19 a->debug("Scanning bus %02x for devices...\n", bus);
20 if (busmap[bus])
21 {
22 a->warning("Bus %02x seen twice (firmware bug). Ignored.", bus);
23 return;
24 }
25 busmap[bus] = 1;
26 t = pci_alloc_dev(a);
27 t->bus = bus;
28 for (dev=0; dev<32; dev++)
29 {
30 t->dev = dev;
31 multi = 0;
32 for (t->func=0; !t->func || multi && t->func<8; t->func++)
33 {
34 u32 vd = pci_read_long(t, PCI_VENDOR_ID);
35 struct pci_dev *d;
36
37 if (!vd || vd == 0xffffffff)
38 continue;
39 ht = pci_read_byte(t, PCI_HEADER_TYPE);
40 if (!t->func)
41 multi = ht & 0x80;
42 ht &= 0x7f;
43 d = pci_alloc_dev(a);
44 d->bus = t->bus;
45 d->dev = t->dev;
46 d->func = t->func;
47 d->vendor_id = vd & 0xffff;
48 d->device_id = vd >> 16U;
49 d->known_fields = PCI_FILL_IDENT;
50 d->hdrtype = ht;
51 pci_link_dev(a, d);
52 switch (ht)
53 {
54 case PCI_HEADER_TYPE_NORMAL:
55 break;
56 case PCI_HEADER_TYPE_BRIDGE:
57 case PCI_HEADER_TYPE_CARDBUS:
58 pci_generic_scan_bus(a, busmap, pci_read_byte(t, PCI_SECONDARY_BUS));
59 break;
60 default:
61 a->debug("Device %04x:%02x:%02x.%d has unknown header type %02x.\n", d->domain, d->bus, d->dev, d->func, ht);
62 }
63 }
64 }
65 pci_free_dev(t);
66 }
67
68 void
69 pci_generic_scan(struct pci_access *a)
70 {
71 byte busmap[256];
72
73 memset(busmap, 0, sizeof(busmap));
74 pci_generic_scan_bus(a, busmap, 0);
75 }
76
77 static int
78 get_hdr_type(struct pci_dev *d)
79 {
80 if (d->hdrtype < 0)
81 d->hdrtype = pci_read_byte(d, PCI_HEADER_TYPE) & 0x7f;
82 return d->hdrtype;
83 }
84
85 void
86 pci_generic_fill_info(struct pci_dev *d, unsigned int flags)
87 {
88 struct pci_access *a = d->access;
89
90 if (want_fill(d, flags, PCI_FILL_IDENT))
91 {
92 d->vendor_id = pci_read_word(d, PCI_VENDOR_ID);
93 d->device_id = pci_read_word(d, PCI_DEVICE_ID);
94 }
95
96 if (want_fill(d, flags, PCI_FILL_CLASS))
97 d->device_class = pci_read_word(d, PCI_CLASS_DEVICE);
98
99 if (want_fill(d, flags, PCI_FILL_CLASS_EXT))
100 {
101 d->prog_if = pci_read_byte(d, PCI_CLASS_PROG);
102 d->rev_id = pci_read_byte(d, PCI_REVISION_ID);
103 }
104
105 if (want_fill(d, flags, PCI_FILL_SUBSYS))
106 {
107 switch (get_hdr_type(d))
108 {
109 case PCI_HEADER_TYPE_NORMAL:
110 d->subsys_vendor_id = pci_read_word(d, PCI_SUBSYSTEM_VENDOR_ID);
111 d->subsys_id = pci_read_word(d, PCI_SUBSYSTEM_ID);
112 break;
113 case PCI_HEADER_TYPE_CARDBUS:
114 d->subsys_vendor_id = pci_read_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
115 d->subsys_id = pci_read_word(d, PCI_CB_SUBSYSTEM_ID);
116 break;
117 default:
118 clear_fill(d, PCI_FILL_SUBSYS);
119 }
120 }
121
122 if (want_fill(d, flags, PCI_FILL_IRQ))
123 d->irq = pci_read_byte(d, PCI_INTERRUPT_LINE);
124
125 if (want_fill(d, flags, PCI_FILL_BASES))
126 {
127 int cnt = 0, i;
128 memset(d->base_addr, 0, sizeof(d->base_addr));
129 switch (get_hdr_type(d))
130 {
131 case PCI_HEADER_TYPE_NORMAL:
132 cnt = 6;
133 break;
134 case PCI_HEADER_TYPE_BRIDGE:
135 cnt = 2;
136 break;
137 case PCI_HEADER_TYPE_CARDBUS:
138 cnt = 1;
139 break;
140 }
141 if (cnt)
142 {
143 for (i=0; i<cnt; i++)
144 {
145 u32 x = pci_read_long(d, PCI_BASE_ADDRESS_0 + i*4);
146 if (!x || x == (u32) ~0)
147 continue;
148 if ((x & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO)
149 d->base_addr[i] = x;
150 else
151 {
152 if ((x & PCI_BASE_ADDRESS_MEM_TYPE_MASK) != PCI_BASE_ADDRESS_MEM_TYPE_64)
153 d->base_addr[i] = x;
154 else if (i >= cnt-1)
155 a->warning("%04x:%02x:%02x.%d: Invalid 64-bit address seen for BAR %d.", d->domain, d->bus, d->dev, d->func, i);
156 else
157 {
158 u32 y = pci_read_long(d, PCI_BASE_ADDRESS_0 + (++i)*4);
159 #ifdef PCI_HAVE_64BIT_ADDRESS
160 d->base_addr[i-1] = x | (((pciaddr_t) y) << 32);
161 #else
162 if (y)
163 a->warning("%04x:%02x:%02x.%d 64-bit device address ignored.", d->domain, d->bus, d->dev, d->func);
164 else
165 d->base_addr[i-1] = x;
166 #endif
167 }
168 }
169 }
170 }
171 }
172
173 if (want_fill(d, flags, PCI_FILL_ROM_BASE))
174 {
175 int reg = 0;
176 d->rom_base_addr = 0;
177 switch (get_hdr_type(d))
178 {
179 case PCI_HEADER_TYPE_NORMAL:
180 reg = PCI_ROM_ADDRESS;
181 break;
182 case PCI_HEADER_TYPE_BRIDGE:
183 reg = PCI_ROM_ADDRESS1;
184 break;
185 }
186 if (reg)
187 {
188 u32 u = pci_read_long(d, reg);
189 if (u != 0xffffffff)
190 d->rom_base_addr = u;
191 }
192 }
193
194 pci_scan_caps(d, flags);
195 }
196
197 static int
198 pci_generic_block_op(struct pci_dev *d, int pos, byte *buf, int len,
199 int (*r)(struct pci_dev *d, int pos, byte *buf, int len))
200 {
201 if ((pos & 1) && len >= 1)
202 {
203 if (!r(d, pos, buf, 1))
204 return 0;
205 pos++; buf++; len--;
206 }
207 if ((pos & 3) && len >= 2)
208 {
209 if (!r(d, pos, buf, 2))
210 return 0;
211 pos += 2; buf += 2; len -= 2;
212 }
213 while (len >= 4)
214 {
215 if (!r(d, pos, buf, 4))
216 return 0;
217 pos += 4; buf += 4; len -= 4;
218 }
219 if (len >= 2)
220 {
221 if (!r(d, pos, buf, 2))
222 return 0;
223 pos += 2; buf += 2; len -= 2;
224 }
225 if (len && !r(d, pos, buf, 1))
226 return 0;
227 return 1;
228 }
229
230 int
231 pci_generic_block_read(struct pci_dev *d, int pos, byte *buf, int len)
232 {
233 return pci_generic_block_op(d, pos, buf, len, d->access->methods->read);
234 }
235
236 int
237 pci_generic_block_write(struct pci_dev *d, int pos, byte *buf, int len)
238 {
239 return pci_generic_block_op(d, pos, buf, len, d->access->methods->write);
240 }