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git.ipfire.org Git - people/ms/u-boot.git/blob - lib_m68k/time.c
2 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include <asm/mcftimer.h>
31 #include <asm/m5271.h>
32 #include <asm/immap_5271.h>
36 #include <asm/m5272.h>
37 #include <asm/immap_5272.h>
41 #include <asm/m5282.h>
45 #include <asm/m5249.h>
46 #include <asm/immap_5249.h>
50 static ulong timestamp
;
51 #if defined(CONFIG_M5282) || defined(CONFIG_M5271)
52 static unsigned short lastinc
;
56 #if defined(CONFIG_M5272)
58 * We use timer 3 which is running with a period of 1 us
60 void udelay(unsigned long usec
)
62 volatile timer_t
*timerp
= (timer_t
*) (CFG_MBAR
+ MCFTIMER_BASE3
);
72 /* Set up TIMER 3 as timebase clock */
73 timerp
->timer_tmr
= MCFTIMER_TMR_DISABLE
;
74 timerp
->timer_tcn
= 0;
75 /* set period to 1 us */
76 timerp
->timer_tmr
= (((CFG_CLK
/ 1000000) - 1) << 8) | MCFTIMER_TMR_CLK1
|
77 MCFTIMER_TMR_FREERUN
| MCFTIMER_TMR_ENABLE
;
79 start
= now
= timerp
->timer_tcn
;
80 while (now
< start
+ tmp
)
81 now
= timerp
->timer_tcn
;
85 void mcf_timer_interrupt (void * not_used
){
86 volatile timer_t
*timerp
= (timer_t
*) (CFG_MBAR
+ MCFTIMER_BASE4
);
87 volatile intctrl_t
*intp
= (intctrl_t
*) (CFG_MBAR
+ MCFSIM_ICR1
);
89 /* check for timer 4 interrupts */
90 if ((intp
->int_isr
& 0x01000000) != 0) {
95 timerp
->timer_ter
= MCFTIMER_TER_CAP
| MCFTIMER_TER_REF
;
99 void timer_init (void) {
100 volatile timer_t
*timerp
= (timer_t
*) (CFG_MBAR
+ MCFTIMER_BASE4
);
101 volatile intctrl_t
*intp
= (intctrl_t
*) (CFG_MBAR
+ MCFSIM_ICR1
);
105 /* Set up TIMER 4 as clock */
106 timerp
->timer_tmr
= MCFTIMER_TMR_DISABLE
;
108 /* initialize and enable timer 4 interrupt */
109 irq_install_handler (72, mcf_timer_interrupt
, 0);
110 intp
->int_icr1
|= 0x0000000d;
112 timerp
->timer_tcn
= 0;
113 timerp
->timer_trr
= 1000; /* Interrupt every ms */
114 /* set a period of 1us, set timer mode to restart and enable timer and interrupt */
115 timerp
->timer_tmr
= (((CFG_CLK
/ 1000000) - 1) << 8) | MCFTIMER_TMR_CLK1
|
116 MCFTIMER_TMR_RESTART
| MCFTIMER_TMR_ENORI
| MCFTIMER_TMR_ENABLE
;
119 void reset_timer (void)
124 ulong
get_timer (ulong base
)
126 return (timestamp
- base
);
129 void set_timer (ulong t
)
135 #if defined(CONFIG_M5282) || defined(CONFIG_M5271)
137 void udelay(unsigned long usec
)
139 volatile unsigned short *timerp
;
142 timerp
= (volatile unsigned short *) (CFG_MBAR
+ MCFTIMER_BASE3
);
151 /* Set up TIMER 3 as timebase clock */
152 timerp
[MCFTIMER_PCSR
] = MCFTIMER_PCSR_OVW
;
153 timerp
[MCFTIMER_PMR
] = 0;
154 /* set period to 1 us */
155 timerp
[MCFTIMER_PCSR
] =
156 (5 << 8) | MCFTIMER_PCSR_EN
| MCFTIMER_PCSR_OVW
;
158 timerp
[MCFTIMER_PMR
] = tmp
;
159 while (timerp
[MCFTIMER_PCNTR
] > 0);
163 void timer_init (void)
165 volatile unsigned short *timerp
;
167 timerp
= (volatile unsigned short *) (CFG_MBAR
+ MCFTIMER_BASE4
);
170 /* Set up TIMER 4 as poll clock */
171 timerp
[MCFTIMER_PCSR
] = MCFTIMER_PCSR_OVW
;
172 timerp
[MCFTIMER_PMR
] = lastinc
= 0;
173 timerp
[MCFTIMER_PCSR
] =
174 (5 << 8) | MCFTIMER_PCSR_EN
| MCFTIMER_PCSR_OVW
;
177 void set_timer (ulong t
)
179 volatile unsigned short *timerp
;
181 timerp
= (volatile unsigned short *) (CFG_MBAR
+ MCFTIMER_BASE4
);
183 timerp
[MCFTIMER_PMR
] = lastinc
= 0;
186 ulong
get_timer (ulong base
)
188 unsigned short now
, diff
;
189 volatile unsigned short *timerp
;
191 timerp
= (volatile unsigned short *) (CFG_MBAR
+ MCFTIMER_BASE4
);
192 now
= timerp
[MCFTIMER_PCNTR
];
193 diff
= -(now
- lastinc
);
197 return timestamp
- base
;
200 void wait_ticks (unsigned long ticks
)
203 while (get_timer (0) < ticks
);
208 #if defined(CONFIG_M5249)
210 * We use timer 1 which is running with a period of 1 us
212 void udelay(unsigned long usec
)
214 volatile timer_t
*timerp
= (timer_t
*) (CFG_MBAR
+ MCFTIMER_BASE1
);
215 uint start
, now
, tmp
;
224 /* Set up TIMER 1 as timebase clock */
225 timerp
->timer_tmr
= MCFTIMER_TMR_DISABLE
;
226 timerp
->timer_tcn
= 0;
227 /* set period to 1 us */
228 /* on m5249 the system clock is (cpu_clk / 2) -> divide by 2000000 */
229 timerp
->timer_tmr
= (((CFG_CLK
/ 2000000) - 1) << 8) | MCFTIMER_TMR_CLK1
|
230 MCFTIMER_TMR_FREERUN
| MCFTIMER_TMR_ENABLE
;
232 start
= now
= timerp
->timer_tcn
;
233 while (now
< start
+ tmp
)
234 now
= timerp
->timer_tcn
;
238 void mcf_timer_interrupt (void * not_used
){
239 volatile timer_t
*timerp
= (timer_t
*) (CFG_MBAR
+ MCFTIMER_BASE2
);
241 /* check for timer 2 interrupts */
242 if ((mbar_readLong(MCFSIM_IPR
) & 0x00000400) == 0) {
247 timerp
->timer_ter
= MCFTIMER_TER_CAP
| MCFTIMER_TER_REF
;
251 void timer_init (void) {
252 volatile timer_t
*timerp
= (timer_t
*) (CFG_MBAR
+ MCFTIMER_BASE2
);
256 /* Set up TIMER 2 as clock */
257 timerp
->timer_tmr
= MCFTIMER_TMR_DISABLE
;
259 /* initialize and enable timer 2 interrupt */
260 irq_install_handler (31, mcf_timer_interrupt
, 0);
261 mbar_writeLong(MCFSIM_IMR
, mbar_readLong(MCFSIM_IMR
) & ~0x00000400);
262 mbar_writeByte(MCFSIM_TIMER2ICR
, MCFSIM_ICR_AUTOVEC
| MCFSIM_ICR_LEVEL7
| MCFSIM_ICR_PRI3
);
264 timerp
->timer_tcn
= 0;
265 timerp
->timer_trr
= 1000; /* Interrupt every ms */
266 /* set a period of 1us, set timer mode to restart and enable timer and interrupt */
267 /* on m5249 the system clock is (cpu_clk / 2) -> divide by 2000000 */
268 timerp
->timer_tmr
= (((CFG_CLK
/ 2000000) - 1) << 8) | MCFTIMER_TMR_CLK1
|
269 MCFTIMER_TMR_RESTART
| MCFTIMER_TMR_ENORI
| MCFTIMER_TMR_ENABLE
;
272 void reset_timer (void)
277 ulong
get_timer (ulong base
)
279 return (timestamp
- base
);
282 void set_timer (ulong t
)
290 * This function is derived from PowerPC code (read timebase as long long).
291 * On M68K it just returns the timer value.
293 unsigned long long get_ticks(void)
299 * This function is derived from PowerPC code (timebase clock frequency).
300 * On M68K it returns the number of timer ticks per second.
302 ulong
get_tbclk (void)