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[people/ms/u-boot.git] / lib_ppc / board.c
1 /*
2 * (C) Copyright 2000-2006
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24 #include <common.h>
25 #include <watchdog.h>
26 #include <command.h>
27 #include <malloc.h>
28 #include <devices.h>
29 #ifdef CONFIG_8xx
30 #include <mpc8xx.h>
31 #endif
32 #ifdef CONFIG_5xx
33 #include <mpc5xx.h>
34 #endif
35 #ifdef CONFIG_MPC5xxx
36 #include <mpc5xxx.h>
37 #endif
38 #if defined(CONFIG_CMD_IDE)
39 #include <ide.h>
40 #endif
41 #if defined(CONFIG_CMD_SATA)
42 #include <sata.h>
43 #endif
44 #if defined(CONFIG_CMD_SCSI)
45 #include <scsi.h>
46 #endif
47 #if defined(CONFIG_CMD_KGDB)
48 #include <kgdb.h>
49 #endif
50 #ifdef CONFIG_STATUS_LED
51 #include <status_led.h>
52 #endif
53 #include <net.h>
54 #include <serial.h>
55 #ifdef CFG_ALLOC_DPRAM
56 #if !defined(CONFIG_CPM2)
57 #include <commproc.h>
58 #endif
59 #endif
60 #include <version.h>
61 #if defined(CONFIG_BAB7xx)
62 #include <w83c553f.h>
63 #endif
64 #include <dtt.h>
65 #if defined(CONFIG_POST)
66 #include <post.h>
67 #endif
68 #if defined(CONFIG_LOGBUFFER)
69 #include <logbuff.h>
70 #endif
71 #if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
72 #include <asm/cache.h>
73 #endif
74 #ifdef CONFIG_PS2KBD
75 #include <keyboard.h>
76 #endif
77
78 #ifdef CFG_UPDATE_FLASH_SIZE
79 extern int update_flash_size (int flash_size);
80 #endif
81
82 #if defined(CONFIG_SC3)
83 extern void sc3_read_eeprom(void);
84 #endif
85
86 #if defined(CONFIG_CMD_DOC)
87 void doc_init (void);
88 #endif
89 #if defined(CONFIG_HARD_I2C) || \
90 defined(CONFIG_SOFT_I2C)
91 #include <i2c.h>
92 #endif
93 #include <spi.h>
94 #include <nand.h>
95
96 static char *failed = "*** failed ***\n";
97
98 #if defined(CONFIG_OXC) || defined(CONFIG_PCU_E) || defined(CONFIG_RMU)
99 extern flash_info_t flash_info[];
100 #endif
101
102 #if defined(CONFIG_START_IDE)
103 extern int board_start_ide(void);
104 #endif
105 #include <environment.h>
106
107 DECLARE_GLOBAL_DATA_PTR;
108
109 #if defined(CFG_ENV_IS_EMBEDDED)
110 #define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
111 #elif ( ((CFG_ENV_ADDR+CFG_ENV_SIZE) < CFG_MONITOR_BASE) || \
112 (CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \
113 defined(CONFIG_ENV_IS_IN_NVRAM)
114 #define TOTAL_MALLOC_LEN (CFG_MALLOC_LEN + CFG_ENV_SIZE)
115 #else
116 #define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
117 #endif
118
119 #if !defined(CFG_MEM_TOP_HIDE)
120 #define CFG_MEM_TOP_HIDE 0
121 #endif
122
123 extern ulong __init_end;
124 extern ulong _end;
125 ulong monitor_flash_len;
126
127 #if defined(CONFIG_CMD_BEDBUG)
128 #include <bedbug/type.h>
129 #endif
130
131 /*
132 * Begin and End of memory area for malloc(), and current "brk"
133 */
134 static ulong mem_malloc_start = 0;
135 static ulong mem_malloc_end = 0;
136 static ulong mem_malloc_brk = 0;
137
138 /************************************************************************
139 * Utilities *
140 ************************************************************************
141 */
142
143 /*
144 * The Malloc area is immediately below the monitor copy in DRAM
145 */
146 static void mem_malloc_init (void)
147 {
148 #if !defined(CONFIG_RELOC_FIXUP_WORKS)
149 mem_malloc_end = CFG_MONITOR_BASE + gd->reloc_off;
150 #endif
151 mem_malloc_start = mem_malloc_end - TOTAL_MALLOC_LEN;
152 mem_malloc_brk = mem_malloc_start;
153
154 memset ((void *) mem_malloc_start,
155 0,
156 mem_malloc_end - mem_malloc_start);
157 }
158
159 void *sbrk (ptrdiff_t increment)
160 {
161 ulong old = mem_malloc_brk;
162 ulong new = old + increment;
163
164 if ((new < mem_malloc_start) || (new > mem_malloc_end)) {
165 return (NULL);
166 }
167 mem_malloc_brk = new;
168 return ((void *) old);
169 }
170
171 /*
172 * All attempts to come up with a "common" initialization sequence
173 * that works for all boards and architectures failed: some of the
174 * requirements are just _too_ different. To get rid of the resulting
175 * mess of board dependend #ifdef'ed code we now make the whole
176 * initialization sequence configurable to the user.
177 *
178 * The requirements for any new initalization function is simple: it
179 * receives a pointer to the "global data" structure as it's only
180 * argument, and returns an integer return code, where 0 means
181 * "continue" and != 0 means "fatal error, hang the system".
182 */
183 typedef int (init_fnc_t) (void);
184
185 /************************************************************************
186 * Init Utilities *
187 ************************************************************************
188 * Some of this code should be moved into the core functions,
189 * but let's get it working (again) first...
190 */
191
192 static int init_baudrate (void)
193 {
194 char tmp[64]; /* long enough for environment variables */
195 int i = getenv_r ("baudrate", tmp, sizeof (tmp));
196
197 gd->baudrate = (i > 0)
198 ? (int) simple_strtoul (tmp, NULL, 10)
199 : CONFIG_BAUDRATE;
200 return (0);
201 }
202
203 /***********************************************************************/
204
205 void __board_add_ram_info(int use_default)
206 {
207 /* please define platform specific board_add_ram_info() */
208 }
209 void board_add_ram_info(int) __attribute__((weak, alias("__board_add_ram_info")));
210
211
212 static int init_func_ram (void)
213 {
214 #ifdef CONFIG_BOARD_TYPES
215 int board_type = gd->board_type;
216 #else
217 int board_type = 0; /* use dummy arg */
218 #endif
219 puts ("DRAM: ");
220
221 if ((gd->ram_size = initdram (board_type)) > 0) {
222 print_size (gd->ram_size, "");
223 board_add_ram_info(0);
224 putc('\n');
225 return (0);
226 }
227 puts (failed);
228 return (1);
229 }
230
231 /***********************************************************************/
232
233 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
234 static int init_func_i2c (void)
235 {
236 puts ("I2C: ");
237 i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
238 puts ("ready\n");
239 return (0);
240 }
241 #endif
242
243 #if defined(CONFIG_HARD_SPI)
244 static int init_func_spi (void)
245 {
246 puts ("SPI: ");
247 spi_init ();
248 puts ("ready\n");
249 return (0);
250 }
251 #endif
252
253 /***********************************************************************/
254
255 #if defined(CONFIG_WATCHDOG)
256 static int init_func_watchdog_init (void)
257 {
258 puts (" Watchdog enabled\n");
259 WATCHDOG_RESET ();
260 return (0);
261 }
262 # define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init,
263
264 static int init_func_watchdog_reset (void)
265 {
266 WATCHDOG_RESET ();
267 return (0);
268 }
269 # define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset,
270 #else
271 # define INIT_FUNC_WATCHDOG_INIT /* undef */
272 # define INIT_FUNC_WATCHDOG_RESET /* undef */
273 #endif /* CONFIG_WATCHDOG */
274
275 /************************************************************************
276 * Initialization sequence *
277 ************************************************************************
278 */
279
280 init_fnc_t *init_sequence[] = {
281
282 #if defined(CONFIG_BOARD_EARLY_INIT_F)
283 board_early_init_f,
284 #endif
285
286 #if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
287 get_clocks, /* get CPU and bus clocks (etc.) */
288 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
289 && !defined(CONFIG_TQM885D)
290 adjust_sdram_tbs_8xx,
291 #endif
292 init_timebase,
293 #endif
294 #ifdef CFG_ALLOC_DPRAM
295 #if !defined(CONFIG_CPM2)
296 dpram_init,
297 #endif
298 #endif
299 #if defined(CONFIG_BOARD_POSTCLK_INIT)
300 board_postclk_init,
301 #endif
302 env_init,
303 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
304 get_clocks_866, /* get CPU and bus clocks according to the environment variable */
305 sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */
306 init_timebase,
307 #endif
308 init_baudrate,
309 serial_init,
310 console_init_f,
311 display_options,
312 #if defined(CONFIG_8260)
313 prt_8260_rsr,
314 prt_8260_clks,
315 #endif /* CONFIG_8260 */
316 #if defined(CONFIG_MPC83XX)
317 prt_83xx_rsr,
318 #endif
319 checkcpu,
320 #if defined(CONFIG_MPC5xxx)
321 prt_mpc5xxx_clks,
322 #endif /* CONFIG_MPC5xxx */
323 #if defined(CONFIG_MPC8220)
324 prt_mpc8220_clks,
325 #endif
326 checkboard,
327 INIT_FUNC_WATCHDOG_INIT
328 #if defined(CONFIG_MISC_INIT_F)
329 misc_init_f,
330 #endif
331 INIT_FUNC_WATCHDOG_RESET
332 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
333 init_func_i2c,
334 #endif
335 #if defined(CONFIG_HARD_SPI)
336 init_func_spi,
337 #endif
338 #if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */
339 dtt_init,
340 #endif
341 #ifdef CONFIG_POST
342 post_init_f,
343 #endif
344 INIT_FUNC_WATCHDOG_RESET
345 init_func_ram,
346 #if defined(CFG_DRAM_TEST)
347 testdram,
348 #endif /* CFG_DRAM_TEST */
349 INIT_FUNC_WATCHDOG_RESET
350
351 NULL, /* Terminate this list */
352 };
353
354 #ifndef CONFIG_MAX_MEM_MAPPED
355 #define CONFIG_MAX_MEM_MAPPED (256 << 20)
356 #endif
357 ulong get_effective_memsize(void)
358 {
359 #ifndef CONFIG_VERY_BIG_RAM
360 return gd->ram_size;
361 #else
362 /* limit stack to what we can reasonable map */
363 return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
364 CONFIG_MAX_MEM_MAPPED : gd->ram_size);
365 #endif
366 }
367
368 /************************************************************************
369 *
370 * This is the first part of the initialization sequence that is
371 * implemented in C, but still running from ROM.
372 *
373 * The main purpose is to provide a (serial) console interface as
374 * soon as possible (so we can see any error messages), and to
375 * initialize the RAM so that we can relocate the monitor code to
376 * RAM.
377 *
378 * Be aware of the restrictions: global data is read-only, BSS is not
379 * initialized, and stack space is limited to a few kB.
380 *
381 ************************************************************************
382 */
383
384 #ifdef CONFIG_LOGBUFFER
385 unsigned long logbuffer_base(void)
386 {
387 return CFG_SDRAM_BASE + get_effective_memsize() - LOGBUFF_LEN;
388 }
389 #endif
390
391 void board_init_f (ulong bootflag)
392 {
393 bd_t *bd;
394 ulong len, addr, addr_sp;
395 ulong *s;
396 gd_t *id;
397 init_fnc_t **init_fnc_ptr;
398 #ifdef CONFIG_PRAM
399 int i;
400 ulong reg;
401 uchar tmp[64]; /* long enough for environment variables */
402 #endif
403
404 /* Pointer is writable since we allocated a register for it */
405 gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
406 /* compiler optimization barrier needed for GCC >= 3.4 */
407 __asm__ __volatile__("": : :"memory");
408
409 #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC83XX) && \
410 !defined(CONFIG_MPC85xx) && !defined(CONFIG_MPC86xx)
411 /* Clear initial global data */
412 memset ((void *) gd, 0, sizeof (gd_t));
413 #endif
414
415 for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
416 if ((*init_fnc_ptr) () != 0) {
417 hang ();
418 }
419 }
420
421 /*
422 * Now that we have DRAM mapped and working, we can
423 * relocate the code and continue running from DRAM.
424 *
425 * Reserve memory at end of RAM for (top down in that order):
426 * - area that won't get touched by U-Boot and Linux (optional)
427 * - kernel log buffer
428 * - protected RAM
429 * - LCD framebuffer
430 * - monitor code
431 * - board info struct
432 */
433 len = (ulong)&_end - CFG_MONITOR_BASE;
434
435 /*
436 * Subtract specified amount of memory to hide so that it won't
437 * get "touched" at all by U-Boot. By fixing up gd->ram_size
438 * the Linux kernel should now get passed the now "corrected"
439 * memory size and won't touch it either. This should work
440 * for arch/ppc and arch/powerpc. Only Linux board ports in
441 * arch/powerpc with bootwrapper support, that recalculate the
442 * memory size from the SDRAM controller setup will have to
443 * get fixed.
444 */
445 gd->ram_size -= CFG_MEM_TOP_HIDE;
446
447 addr = CFG_SDRAM_BASE + get_effective_memsize();
448
449 #ifdef CONFIG_LOGBUFFER
450 #ifndef CONFIG_ALT_LB_ADDR
451 /* reserve kernel log buffer */
452 addr -= (LOGBUFF_RESERVE);
453 debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr);
454 #endif
455 #endif
456
457 #ifdef CONFIG_PRAM
458 /*
459 * reserve protected RAM
460 */
461 i = getenv_r ("pram", (char *)tmp, sizeof (tmp));
462 reg = (i > 0) ? simple_strtoul ((const char *)tmp, NULL, 10) : CONFIG_PRAM;
463 addr -= (reg << 10); /* size is in kB */
464 debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
465 #endif /* CONFIG_PRAM */
466
467 /* round down to next 4 kB limit */
468 addr &= ~(4096 - 1);
469 debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);
470
471 #ifdef CONFIG_LCD
472 /* reserve memory for LCD display (always full pages) */
473 addr = lcd_setmem (addr);
474 gd->fb_base = addr;
475 #endif /* CONFIG_LCD */
476
477 #if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
478 /* reserve memory for video display (always full pages) */
479 addr = video_setmem (addr);
480 gd->fb_base = addr;
481 #endif /* CONFIG_VIDEO */
482
483 /*
484 * reserve memory for U-Boot code, data & bss
485 * round down to next 4 kB limit
486 */
487 addr -= len;
488 addr &= ~(4096 - 1);
489 #ifdef CONFIG_E500
490 /* round down to next 64 kB limit so that IVPR stays aligned */
491 addr &= ~(65536 - 1);
492 #endif
493
494 debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
495
496 #ifdef CONFIG_AMIGAONEG3SE
497 gd->relocaddr = addr;
498 #endif
499
500 /*
501 * reserve memory for malloc() arena
502 */
503 addr_sp = addr - TOTAL_MALLOC_LEN;
504 debug ("Reserving %dk for malloc() at: %08lx\n",
505 TOTAL_MALLOC_LEN >> 10, addr_sp);
506
507 /*
508 * (permanently) allocate a Board Info struct
509 * and a permanent copy of the "global" data
510 */
511 addr_sp -= sizeof (bd_t);
512 bd = (bd_t *) addr_sp;
513 gd->bd = bd;
514 debug ("Reserving %zu Bytes for Board Info at: %08lx\n",
515 sizeof (bd_t), addr_sp);
516 addr_sp -= sizeof (gd_t);
517 id = (gd_t *) addr_sp;
518 debug ("Reserving %zu Bytes for Global Data at: %08lx\n",
519 sizeof (gd_t), addr_sp);
520
521 /*
522 * Finally, we set up a new (bigger) stack.
523 *
524 * Leave some safety gap for SP, force alignment on 16 byte boundary
525 * Clear initial stack frame
526 */
527 addr_sp -= 16;
528 addr_sp &= ~0xF;
529 s = (ulong *)addr_sp;
530 *s-- = 0;
531 *s-- = 0;
532 addr_sp = (ulong)s;
533 debug ("Stack Pointer at: %08lx\n", addr_sp);
534
535 /*
536 * Save local variables to board info struct
537 */
538
539 bd->bi_memstart = CFG_SDRAM_BASE; /* start of DRAM memory */
540 bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
541
542 #ifdef CONFIG_IP860
543 bd->bi_sramstart = SRAM_BASE; /* start of SRAM memory */
544 bd->bi_sramsize = SRAM_SIZE; /* size of SRAM memory */
545 #elif defined CONFIG_MPC8220
546 bd->bi_sramstart = CFG_SRAM_BASE; /* start of SRAM memory */
547 bd->bi_sramsize = CFG_SRAM_SIZE; /* size of SRAM memory */
548 #else
549 bd->bi_sramstart = 0; /* FIXME */ /* start of SRAM memory */
550 bd->bi_sramsize = 0; /* FIXME */ /* size of SRAM memory */
551 #endif
552
553 #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
554 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
555 bd->bi_immr_base = CFG_IMMR; /* base of IMMR register */
556 #endif
557 #if defined(CONFIG_MPC5xxx)
558 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
559 #endif
560 #if defined(CONFIG_MPC83XX)
561 bd->bi_immrbar = CFG_IMMR;
562 #endif
563 #if defined(CONFIG_MPC8220)
564 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
565 bd->bi_inpfreq = gd->inp_clk;
566 bd->bi_pcifreq = gd->pci_clk;
567 bd->bi_vcofreq = gd->vco_clk;
568 bd->bi_pevfreq = gd->pev_clk;
569 bd->bi_flbfreq = gd->flb_clk;
570
571 /* store bootparam to sram (backward compatible), here? */
572 {
573 u32 *sram = (u32 *)CFG_SRAM_BASE;
574 *sram++ = gd->ram_size;
575 *sram++ = gd->bus_clk;
576 *sram++ = gd->inp_clk;
577 *sram++ = gd->cpu_clk;
578 *sram++ = gd->vco_clk;
579 *sram++ = gd->flb_clk;
580 *sram++ = 0xb8c3ba11; /* boot signature */
581 }
582 #endif
583
584 bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */
585
586 WATCHDOG_RESET ();
587 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
588 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
589 #if defined(CONFIG_CPM2)
590 bd->bi_cpmfreq = gd->cpm_clk;
591 bd->bi_brgfreq = gd->brg_clk;
592 bd->bi_sccfreq = gd->scc_clk;
593 bd->bi_vco = gd->vco_out;
594 #endif /* CONFIG_CPM2 */
595 #if defined(CONFIG_MPC512X)
596 bd->bi_ipsfreq = gd->ips_clk;
597 #endif /* CONFIG_MPC512X */
598 #if defined(CONFIG_MPC5xxx)
599 bd->bi_ipbfreq = gd->ipb_clk;
600 bd->bi_pcifreq = gd->pci_clk;
601 #endif /* CONFIG_MPC5xxx */
602 bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
603
604 #ifdef CFG_EXTBDINFO
605 strncpy ((char *)bd->bi_s_version, "1.2", sizeof (bd->bi_s_version));
606 strncpy ((char *)bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version));
607
608 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
609 bd->bi_plb_busfreq = gd->bus_clk;
610 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
611 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
612 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
613 bd->bi_pci_busfreq = get_PCI_freq ();
614 bd->bi_opbfreq = get_OPB_freq ();
615 #elif defined(CONFIG_XILINX_405)
616 bd->bi_pci_busfreq = get_PCI_freq ();
617 #endif
618 #endif
619
620 debug ("New Stack Pointer is: %08lx\n", addr_sp);
621
622 WATCHDOG_RESET ();
623
624 #ifdef CONFIG_POST
625 post_bootmode_init();
626 post_run (NULL, POST_ROM | post_bootmode_get(0));
627 #endif
628
629 WATCHDOG_RESET();
630
631 memcpy (id, (void *)gd, sizeof (gd_t));
632
633 relocate_code (addr_sp, id, addr);
634
635 /* NOTREACHED - relocate_code() does not return */
636 }
637
638 /************************************************************************
639 *
640 * This is the next part if the initialization sequence: we are now
641 * running from RAM and have a "normal" C environment, i. e. global
642 * data can be written, BSS has been cleared, the stack size in not
643 * that critical any more, etc.
644 *
645 ************************************************************************
646 */
647 void board_init_r (gd_t *id, ulong dest_addr)
648 {
649 cmd_tbl_t *cmdtp;
650 char *s, *e;
651 bd_t *bd;
652 int i;
653 extern void malloc_bin_reloc (void);
654 #ifndef CONFIG_ENV_IS_NOWHERE
655 extern char * env_name_spec;
656 #endif
657
658 #ifndef CFG_NO_FLASH
659 ulong flash_size;
660 #endif
661
662 gd = id; /* initialize RAM version of global data */
663 bd = gd->bd;
664
665 gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
666
667 #if defined(CONFIG_RELOC_FIXUP_WORKS)
668 gd->reloc_off = 0;
669 mem_malloc_end = dest_addr;
670 #else
671 gd->reloc_off = dest_addr - CFG_MONITOR_BASE;
672 #endif
673
674 #ifdef CONFIG_SERIAL_MULTI
675 serial_initialize();
676 #endif
677
678 debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
679
680 WATCHDOG_RESET ();
681
682 #if defined(CONFIG_BOARD_EARLY_INIT_R)
683 board_early_init_r ();
684 #endif
685
686 monitor_flash_len = (ulong)&__init_end - dest_addr;
687
688 /*
689 * We have to relocate the command table manually
690 */
691 for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) {
692 ulong addr;
693 addr = (ulong) (cmdtp->cmd) + gd->reloc_off;
694 #if 0
695 printf ("Command \"%s\": 0x%08lx => 0x%08lx\n",
696 cmdtp->name, (ulong) (cmdtp->cmd), addr);
697 #endif
698 cmdtp->cmd =
699 (int (*)(struct cmd_tbl_s *, int, int, char *[]))addr;
700
701 addr = (ulong)(cmdtp->name) + gd->reloc_off;
702 cmdtp->name = (char *)addr;
703
704 if (cmdtp->usage) {
705 addr = (ulong)(cmdtp->usage) + gd->reloc_off;
706 cmdtp->usage = (char *)addr;
707 }
708 #ifdef CFG_LONGHELP
709 if (cmdtp->help) {
710 addr = (ulong)(cmdtp->help) + gd->reloc_off;
711 cmdtp->help = (char *)addr;
712 }
713 #endif
714 }
715 /* there are some other pointer constants we must deal with */
716 #ifndef CONFIG_ENV_IS_NOWHERE
717 env_name_spec += gd->reloc_off;
718 #endif
719
720 WATCHDOG_RESET ();
721
722 #ifdef CONFIG_LOGBUFFER
723 logbuff_init_ptrs ();
724 #endif
725 #ifdef CONFIG_POST
726 post_output_backlog ();
727 post_reloc ();
728 #endif
729
730 WATCHDOG_RESET();
731
732 #if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || \
733 defined (CONFIG_FLAGADM) || defined(CONFIG_MPC83XX)
734 icache_enable (); /* it's time to enable the instruction cache */
735 #endif
736
737 #if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
738 unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
739 #endif
740
741 #if defined(CONFIG_BAB7xx) || defined(CONFIG_CPC45)
742 /*
743 * Do PCI configuration on BAB7xx and CPC45 _before_ the flash
744 * gets initialised, because we need the ISA resp. PCI_to_LOCAL bus
745 * bridge there.
746 */
747 pci_init ();
748 #endif
749 #if defined(CONFIG_BAB7xx)
750 /*
751 * Initialise the ISA bridge
752 */
753 initialise_w83c553f ();
754 #endif
755
756 asm ("sync ; isync");
757
758 /*
759 * Setup trap handlers
760 */
761 trap_init (dest_addr);
762
763 #if !defined(CFG_NO_FLASH)
764 puts ("FLASH: ");
765
766 if ((flash_size = flash_init ()) > 0) {
767 # ifdef CFG_FLASH_CHECKSUM
768 print_size (flash_size, "");
769 /*
770 * Compute and print flash CRC if flashchecksum is set to 'y'
771 *
772 * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
773 */
774 s = getenv ("flashchecksum");
775 if (s && (*s == 'y')) {
776 printf (" CRC: %08X",
777 crc32 (0, (const unsigned char *) CFG_FLASH_BASE, flash_size)
778 );
779 }
780 putc ('\n');
781 # else /* !CFG_FLASH_CHECKSUM */
782 print_size (flash_size, "\n");
783 # endif /* CFG_FLASH_CHECKSUM */
784 } else {
785 puts (failed);
786 hang ();
787 }
788
789 bd->bi_flashstart = CFG_FLASH_BASE; /* update start of FLASH memory */
790 bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */
791
792 #if defined(CFG_UPDATE_FLASH_SIZE)
793 /* Make a update of the Memctrl. */
794 update_flash_size (flash_size);
795 #endif
796
797
798 # if defined(CONFIG_PCU_E) || defined(CONFIG_OXC) || defined(CONFIG_RMU)
799 /* flash mapped at end of memory map */
800 bd->bi_flashoffset = TEXT_BASE + flash_size;
801 # elif CFG_MONITOR_BASE == CFG_FLASH_BASE
802 bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */
803 # else
804 bd->bi_flashoffset = 0;
805 # endif
806 #else /* CFG_NO_FLASH */
807
808 bd->bi_flashsize = 0;
809 bd->bi_flashstart = 0;
810 bd->bi_flashoffset = 0;
811 #endif /* !CFG_NO_FLASH */
812
813 WATCHDOG_RESET ();
814
815 /* initialize higher level parts of CPU like time base and timers */
816 cpu_init_r ();
817
818 WATCHDOG_RESET ();
819
820 /* initialize malloc() area */
821 mem_malloc_init ();
822 malloc_bin_reloc ();
823
824 #ifdef CONFIG_SPI
825 # if !defined(CONFIG_ENV_IS_IN_EEPROM)
826 spi_init_f ();
827 # endif
828 spi_init_r ();
829 #endif
830
831 #if defined(CONFIG_CMD_NAND)
832 WATCHDOG_RESET ();
833 puts ("NAND: ");
834 nand_init(); /* go init the NAND */
835 #endif
836
837 /* relocate environment function pointers etc. */
838 env_relocate ();
839
840 /*
841 * Fill in missing fields of bd_info.
842 * We do this here, where we have "normal" access to the
843 * environment; we used to do this still running from ROM,
844 * where had to use getenv_r(), which can be pretty slow when
845 * the environment is in EEPROM.
846 */
847
848 #if defined(CFG_EXTBDINFO)
849 #if defined(CONFIG_405GP) || defined(CONFIG_405EP)
850 #if defined(CONFIG_I2CFAST)
851 /*
852 * set bi_iic_fast for linux taking environment variable
853 * "i2cfast" into account
854 */
855 {
856 char *s = getenv ("i2cfast");
857 if (s && ((*s == 'y') || (*s == 'Y'))) {
858 bd->bi_iic_fast[0] = 1;
859 bd->bi_iic_fast[1] = 1;
860 } else {
861 bd->bi_iic_fast[0] = 0;
862 bd->bi_iic_fast[1] = 0;
863 }
864 }
865 #else
866 bd->bi_iic_fast[0] = 0;
867 bd->bi_iic_fast[1] = 0;
868 #endif /* CONFIG_I2CFAST */
869 #endif /* CONFIG_405GP, CONFIG_405EP */
870 #endif /* CFG_EXTBDINFO */
871
872 #if defined(CONFIG_SC3)
873 sc3_read_eeprom();
874 #endif
875
876 #if defined (CONFIG_ID_EEPROM) || defined (CFG_I2C_MAC_OFFSET)
877 mac_read_from_eeprom();
878 #endif
879
880 s = getenv ("ethaddr");
881 #if defined (CONFIG_MBX) || \
882 defined (CONFIG_RPXCLASSIC) || \
883 defined(CONFIG_IAD210) || \
884 defined(CONFIG_V38B)
885 if (s == NULL)
886 board_get_enetaddr (bd->bi_enetaddr);
887 else
888 #endif
889 for (i = 0; i < 6; ++i) {
890 bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
891 if (s)
892 s = (*e) ? e + 1 : e;
893 }
894 #ifdef CONFIG_HERMES
895 if ((gd->board_type >> 16) == 2)
896 bd->bi_ethspeed = gd->board_type & 0xFFFF;
897 else
898 bd->bi_ethspeed = 0xFFFF;
899 #endif
900
901 #ifdef CONFIG_NX823
902 load_sernum_ethaddr ();
903 #endif
904
905 #ifdef CONFIG_HAS_ETH1
906 /* handle the 2nd ethernet address */
907
908 s = getenv ("eth1addr");
909
910 for (i = 0; i < 6; ++i) {
911 bd->bi_enet1addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
912 if (s)
913 s = (*e) ? e + 1 : e;
914 }
915 #endif
916 #ifdef CONFIG_HAS_ETH2
917 /* handle the 3rd ethernet address */
918
919 s = getenv ("eth2addr");
920 #if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF)
921 if (s == NULL)
922 board_get_enetaddr(bd->bi_enet2addr);
923 else
924 #endif
925 for (i = 0; i < 6; ++i) {
926 bd->bi_enet2addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
927 if (s)
928 s = (*e) ? e + 1 : e;
929 }
930 #endif
931
932 #ifdef CONFIG_HAS_ETH3
933 /* handle 4th ethernet address */
934 s = getenv("eth3addr");
935 #if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF)
936 if (s == NULL)
937 board_get_enetaddr(bd->bi_enet3addr);
938 else
939 #endif
940 for (i = 0; i < 6; ++i) {
941 bd->bi_enet3addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
942 if (s)
943 s = (*e) ? e + 1 : e;
944 }
945 #endif
946
947 #if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \
948 defined(CONFIG_TQM8272) || \
949 defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || \
950 defined(CONFIG_KUP4X) || defined(CONFIG_PCS440EP)
951 load_sernum_ethaddr ();
952 #endif
953 /* IP Address */
954 bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
955
956 WATCHDOG_RESET ();
957
958 #if defined(CONFIG_PCI) && !defined(CONFIG_BAB7xx) && !defined(CONFIG_CPC45)
959 /*
960 * Do pci configuration
961 */
962 pci_init ();
963 #endif
964
965 /** leave this here (after malloc(), environment and PCI are working) **/
966 /* Initialize devices */
967 devices_init ();
968
969 /* Initialize the jump table for applications */
970 jumptable_init ();
971
972 #if defined(CONFIG_API)
973 /* Initialize API */
974 api_init ();
975 #endif
976
977 /* Initialize the console (after the relocation and devices init) */
978 console_init_r ();
979
980 #if defined(CONFIG_CCM) || \
981 defined(CONFIG_COGENT) || \
982 defined(CONFIG_CPCI405) || \
983 defined(CONFIG_EVB64260) || \
984 defined(CONFIG_KUP4K) || \
985 defined(CONFIG_KUP4X) || \
986 defined(CONFIG_LWMON) || \
987 defined(CONFIG_PCU_E) || \
988 defined(CONFIG_SC3) || \
989 defined(CONFIG_W7O) || \
990 defined(CONFIG_MISC_INIT_R)
991 /* miscellaneous platform dependent initialisations */
992 misc_init_r ();
993 #endif
994
995 #ifdef CONFIG_HERMES
996 if (bd->bi_ethspeed != 0xFFFF)
997 hermes_start_lxt980 ((int) bd->bi_ethspeed);
998 #endif
999
1000 #if defined(CONFIG_CMD_KGDB)
1001 WATCHDOG_RESET ();
1002 puts ("KGDB: ");
1003 kgdb_init ();
1004 #endif
1005
1006 debug ("U-Boot relocated to %08lx\n", dest_addr);
1007
1008 /*
1009 * Enable Interrupts
1010 */
1011 interrupt_init ();
1012
1013 /* Must happen after interrupts are initialized since
1014 * an irq handler gets installed
1015 */
1016 #ifdef CONFIG_SERIAL_SOFTWARE_FIFO
1017 serial_buffered_init();
1018 #endif
1019
1020 #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
1021 status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
1022 #endif
1023
1024 udelay (20);
1025
1026 set_timer (0);
1027
1028 /* Initialize from environment */
1029 if ((s = getenv ("loadaddr")) != NULL) {
1030 load_addr = simple_strtoul (s, NULL, 16);
1031 }
1032 #if defined(CONFIG_CMD_NET)
1033 if ((s = getenv ("bootfile")) != NULL) {
1034 copy_filename (BootFile, s, sizeof (BootFile));
1035 }
1036 #endif
1037
1038 WATCHDOG_RESET ();
1039
1040 #if defined(CONFIG_CMD_SCSI)
1041 WATCHDOG_RESET ();
1042 puts ("SCSI: ");
1043 scsi_init ();
1044 #endif
1045
1046 #if defined(CONFIG_CMD_DOC)
1047 WATCHDOG_RESET ();
1048 puts ("DOC: ");
1049 doc_init ();
1050 #endif
1051
1052 #if defined(CONFIG_CMD_NET)
1053 #if defined(CONFIG_NET_MULTI)
1054 WATCHDOG_RESET ();
1055 puts ("Net: ");
1056 #endif
1057 eth_initialize (bd);
1058 #endif
1059
1060 #if defined(CONFIG_CMD_NET) && ( \
1061 defined(CONFIG_CCM) || \
1062 defined(CONFIG_ELPT860) || \
1063 defined(CONFIG_EP8260) || \
1064 defined(CONFIG_IP860) || \
1065 defined(CONFIG_IVML24) || \
1066 defined(CONFIG_IVMS8) || \
1067 defined(CONFIG_MPC8260ADS) || \
1068 defined(CONFIG_MPC8266ADS) || \
1069 defined(CONFIG_MPC8560ADS) || \
1070 defined(CONFIG_PCU_E) || \
1071 defined(CONFIG_RPXSUPER) || \
1072 defined(CONFIG_STXGP3) || \
1073 defined(CONFIG_SPD823TS) || \
1074 defined(CONFIG_RESET_PHY_R) )
1075
1076 WATCHDOG_RESET ();
1077 debug ("Reset Ethernet PHY\n");
1078 reset_phy ();
1079 #endif
1080
1081 #ifdef CONFIG_POST
1082 post_run (NULL, POST_RAM | post_bootmode_get(0));
1083 #endif
1084
1085 #if defined(CONFIG_CMD_PCMCIA) \
1086 && !defined(CONFIG_CMD_IDE)
1087 WATCHDOG_RESET ();
1088 puts ("PCMCIA:");
1089 pcmcia_init ();
1090 #endif
1091
1092 #if defined(CONFIG_CMD_IDE)
1093 WATCHDOG_RESET ();
1094 # ifdef CONFIG_IDE_8xx_PCCARD
1095 puts ("PCMCIA:");
1096 # else
1097 puts ("IDE: ");
1098 #endif
1099 #if defined(CONFIG_START_IDE)
1100 if (board_start_ide())
1101 ide_init ();
1102 #else
1103 ide_init ();
1104 #endif
1105 #endif
1106
1107 #if defined(CONFIG_CMD_SATA)
1108 puts ("SATA: ");
1109 sata_initialize ();
1110 #endif
1111
1112 #ifdef CONFIG_LAST_STAGE_INIT
1113 WATCHDOG_RESET ();
1114 /*
1115 * Some parts can be only initialized if all others (like
1116 * Interrupts) are up and running (i.e. the PC-style ISA
1117 * keyboard).
1118 */
1119 last_stage_init ();
1120 #endif
1121
1122 #if defined(CONFIG_CMD_BEDBUG)
1123 WATCHDOG_RESET ();
1124 bedbug_init ();
1125 #endif
1126
1127 #if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
1128 /*
1129 * Export available size of memory for Linux,
1130 * taking into account the protected RAM at top of memory
1131 */
1132 {
1133 ulong pram;
1134 uchar memsz[32];
1135 #ifdef CONFIG_PRAM
1136 char *s;
1137
1138 if ((s = getenv ("pram")) != NULL) {
1139 pram = simple_strtoul (s, NULL, 10);
1140 } else {
1141 pram = CONFIG_PRAM;
1142 }
1143 #else
1144 pram=0;
1145 #endif
1146 #ifdef CONFIG_LOGBUFFER
1147 #ifndef CONFIG_ALT_LB_ADDR
1148 /* Also take the logbuffer into account (pram is in kB) */
1149 pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024;
1150 #endif
1151 #endif
1152 sprintf ((char *)memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
1153 setenv ("mem", (char *)memsz);
1154 }
1155 #endif
1156
1157 #ifdef CONFIG_PS2KBD
1158 puts ("PS/2: ");
1159 kbd_init();
1160 #endif
1161
1162 #ifdef CONFIG_MODEM_SUPPORT
1163 {
1164 extern int do_mdm_init;
1165 do_mdm_init = gd->do_mdm_init;
1166 }
1167 #endif
1168
1169 /* Initialization complete - start the monitor */
1170
1171 /* main_loop() can return to retry autoboot, if so just run it again. */
1172 for (;;) {
1173 WATCHDOG_RESET ();
1174 main_loop ();
1175 }
1176
1177 /* NOTREACHED - no way out of command loop except booting */
1178 }
1179
1180 void hang (void)
1181 {
1182 puts ("### ERROR ### Please RESET the board ###\n");
1183 show_boot_progress(-30);
1184 for (;;);
1185 }
1186
1187 #ifdef CONFIG_MODEM_SUPPORT
1188 /* called from main loop (common/main.c) */
1189 /* 'inline' - We have to do it fast */
1190 static inline void mdm_readline(char *buf, int bufsiz)
1191 {
1192 char c;
1193 char *p;
1194 int n;
1195
1196 n = 0;
1197 p = buf;
1198 for(;;) {
1199 c = serial_getc();
1200
1201 /* dbg("(%c)", c); */
1202
1203 switch(c) {
1204 case '\r':
1205 break;
1206 case '\n':
1207 *p = '\0';
1208 return;
1209
1210 default:
1211 if(n++ > bufsiz) {
1212 *p = '\0';
1213 return; /* sanity check */
1214 }
1215 *p = c;
1216 p++;
1217 break;
1218 }
1219 }
1220 }
1221
1222 extern void dbg(const char *fmt, ...);
1223 int mdm_init (void)
1224 {
1225 char env_str[16];
1226 char *init_str;
1227 int i;
1228 extern char console_buffer[];
1229 extern void enable_putc(void);
1230 extern int hwflow_onoff(int);
1231
1232 enable_putc(); /* enable serial_putc() */
1233
1234 #ifdef CONFIG_HWFLOW
1235 init_str = getenv("mdm_flow_control");
1236 if (init_str && (strcmp(init_str, "rts/cts") == 0))
1237 hwflow_onoff (1);
1238 else
1239 hwflow_onoff(-1);
1240 #endif
1241
1242 for (i = 1;;i++) {
1243 sprintf(env_str, "mdm_init%d", i);
1244 if ((init_str = getenv(env_str)) != NULL) {
1245 serial_puts(init_str);
1246 serial_puts("\n");
1247 for(;;) {
1248 mdm_readline(console_buffer, CFG_CBSIZE);
1249 dbg("ini%d: [%s]", i, console_buffer);
1250
1251 if ((strcmp(console_buffer, "OK") == 0) ||
1252 (strcmp(console_buffer, "ERROR") == 0)) {
1253 dbg("ini%d: cmd done", i);
1254 break;
1255 } else /* in case we are originating call ... */
1256 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1257 dbg("ini%d: connect", i);
1258 return 0;
1259 }
1260 }
1261 } else
1262 break; /* no init string - stop modem init */
1263
1264 udelay(100000);
1265 }
1266
1267 udelay(100000);
1268
1269 /* final stage - wait for connect */
1270 for(;i > 1;) { /* if 'i' > 1 - wait for connection
1271 message from modem */
1272 mdm_readline(console_buffer, CFG_CBSIZE);
1273 dbg("ini_f: [%s]", console_buffer);
1274 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1275 dbg("ini_f: connected");
1276 return 0;
1277 }
1278 }
1279
1280 return 0;
1281 }
1282
1283 #endif
1284
1285 #if 0 /* We could use plain global data, but the resulting code is bigger */
1286 /*
1287 * Pointer to initial global data area
1288 *
1289 * Here we initialize it.
1290 */
1291 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
1292 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
1293 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
1294 #endif /* 0 */
1295
1296 /************************************************************************/
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