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1 /*
2 * (C) Copyright 2000-2006
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24 #include <common.h>
25 #include <watchdog.h>
26 #include <command.h>
27 #include <malloc.h>
28 #include <devices.h>
29 #ifdef CONFIG_8xx
30 #include <mpc8xx.h>
31 #endif
32 #ifdef CONFIG_5xx
33 #include <mpc5xx.h>
34 #endif
35 #ifdef CONFIG_MPC5xxx
36 #include <mpc5xxx.h>
37 #endif
38 #if defined(CONFIG_CMD_IDE)
39 #include <ide.h>
40 #endif
41 #if defined(CONFIG_CMD_SATA)
42 #include <sata.h>
43 #endif
44 #if defined(CONFIG_CMD_SCSI)
45 #include <scsi.h>
46 #endif
47 #if defined(CONFIG_CMD_KGDB)
48 #include <kgdb.h>
49 #endif
50 #ifdef CONFIG_STATUS_LED
51 #include <status_led.h>
52 #endif
53 #include <net.h>
54 #include <serial.h>
55 #ifdef CFG_ALLOC_DPRAM
56 #if !defined(CONFIG_CPM2)
57 #include <commproc.h>
58 #endif
59 #endif
60 #include <version.h>
61 #if defined(CONFIG_BAB7xx)
62 #include <w83c553f.h>
63 #endif
64 #include <dtt.h>
65 #if defined(CONFIG_POST)
66 #include <post.h>
67 #endif
68 #if defined(CONFIG_LOGBUFFER)
69 #include <logbuff.h>
70 #endif
71 #if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
72 #include <asm/cache.h>
73 #endif
74 #ifdef CONFIG_PS2KBD
75 #include <keyboard.h>
76 #endif
77
78 #ifdef CFG_UPDATE_FLASH_SIZE
79 extern int update_flash_size (int flash_size);
80 #endif
81
82 #if defined(CONFIG_SC3)
83 extern void sc3_read_eeprom(void);
84 #endif
85
86 #if defined(CONFIG_CMD_DOC)
87 void doc_init (void);
88 #endif
89 #if defined(CONFIG_HARD_I2C) || \
90 defined(CONFIG_SOFT_I2C)
91 #include <i2c.h>
92 #endif
93 #if defined(CONFIG_HARD_SPI)
94 #include <spi.h>
95 #endif
96 #if defined(CONFIG_CMD_NAND)
97 void nand_init (void);
98 #endif
99
100 static char *failed = "*** failed ***\n";
101
102 #if defined(CONFIG_OXC) || defined(CONFIG_PCU_E) || defined(CONFIG_RMU)
103 extern flash_info_t flash_info[];
104 #endif
105
106 #if defined(CONFIG_START_IDE)
107 extern int board_start_ide(void);
108 #endif
109 #include <environment.h>
110
111 DECLARE_GLOBAL_DATA_PTR;
112
113 #if defined(CFG_ENV_IS_EMBEDDED)
114 #define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
115 #elif ( ((CFG_ENV_ADDR+CFG_ENV_SIZE) < CFG_MONITOR_BASE) || \
116 (CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \
117 defined(CFG_ENV_IS_IN_NVRAM)
118 #define TOTAL_MALLOC_LEN (CFG_MALLOC_LEN + CFG_ENV_SIZE)
119 #else
120 #define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
121 #endif
122
123 #if !defined(CFG_MEM_TOP_HIDE)
124 #define CFG_MEM_TOP_HIDE 0
125 #endif
126
127 extern ulong __init_end;
128 extern ulong _end;
129 ulong monitor_flash_len;
130
131 #if defined(CONFIG_CMD_BEDBUG)
132 #include <bedbug/type.h>
133 #endif
134
135 /*
136 * Begin and End of memory area for malloc(), and current "brk"
137 */
138 static ulong mem_malloc_start = 0;
139 static ulong mem_malloc_end = 0;
140 static ulong mem_malloc_brk = 0;
141
142 /************************************************************************
143 * Utilities *
144 ************************************************************************
145 */
146
147 /*
148 * The Malloc area is immediately below the monitor copy in DRAM
149 */
150 static void mem_malloc_init (void)
151 {
152 #if !defined(CONFIG_RELOC_FIXUP_WORKS)
153 mem_malloc_end = CFG_MONITOR_BASE + gd->reloc_off;
154 #endif
155 mem_malloc_start = mem_malloc_end - TOTAL_MALLOC_LEN;
156 mem_malloc_brk = mem_malloc_start;
157
158 memset ((void *) mem_malloc_start,
159 0,
160 mem_malloc_end - mem_malloc_start);
161 }
162
163 void *sbrk (ptrdiff_t increment)
164 {
165 ulong old = mem_malloc_brk;
166 ulong new = old + increment;
167
168 if ((new < mem_malloc_start) || (new > mem_malloc_end)) {
169 return (NULL);
170 }
171 mem_malloc_brk = new;
172 return ((void *) old);
173 }
174
175 char *strmhz (char *buf, long hz)
176 {
177 long l, n;
178 long m;
179
180 n = hz / 1000000L;
181 l = sprintf (buf, "%ld", n);
182 m = (hz % 1000000L) / 1000L;
183 if (m != 0)
184 sprintf (buf + l, ".%03ld", m);
185 return (buf);
186 }
187
188 /*
189 * All attempts to come up with a "common" initialization sequence
190 * that works for all boards and architectures failed: some of the
191 * requirements are just _too_ different. To get rid of the resulting
192 * mess of board dependend #ifdef'ed code we now make the whole
193 * initialization sequence configurable to the user.
194 *
195 * The requirements for any new initalization function is simple: it
196 * receives a pointer to the "global data" structure as it's only
197 * argument, and returns an integer return code, where 0 means
198 * "continue" and != 0 means "fatal error, hang the system".
199 */
200 typedef int (init_fnc_t) (void);
201
202 /************************************************************************
203 * Init Utilities *
204 ************************************************************************
205 * Some of this code should be moved into the core functions,
206 * but let's get it working (again) first...
207 */
208
209 static int init_baudrate (void)
210 {
211 char tmp[64]; /* long enough for environment variables */
212 int i = getenv_r ("baudrate", tmp, sizeof (tmp));
213
214 gd->baudrate = (i > 0)
215 ? (int) simple_strtoul (tmp, NULL, 10)
216 : CONFIG_BAUDRATE;
217 return (0);
218 }
219
220 /***********************************************************************/
221
222 void __board_add_ram_info(int use_default)
223 {
224 /* please define platform specific board_add_ram_info() */
225 }
226 void board_add_ram_info(int) __attribute__((weak, alias("__board_add_ram_info")));
227
228
229 static int init_func_ram (void)
230 {
231 #ifdef CONFIG_BOARD_TYPES
232 int board_type = gd->board_type;
233 #else
234 int board_type = 0; /* use dummy arg */
235 #endif
236 puts ("DRAM: ");
237
238 if ((gd->ram_size = initdram (board_type)) > 0) {
239 print_size (gd->ram_size, "");
240 board_add_ram_info(0);
241 putc('\n');
242 return (0);
243 }
244 puts (failed);
245 return (1);
246 }
247
248 /***********************************************************************/
249
250 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
251 static int init_func_i2c (void)
252 {
253 puts ("I2C: ");
254 i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
255 puts ("ready\n");
256 return (0);
257 }
258 #endif
259
260 #if defined(CONFIG_HARD_SPI)
261 static int init_func_spi (void)
262 {
263 puts ("SPI: ");
264 spi_init ();
265 puts ("ready\n");
266 return (0);
267 }
268 #endif
269
270 /***********************************************************************/
271
272 #if defined(CONFIG_WATCHDOG)
273 static int init_func_watchdog_init (void)
274 {
275 puts (" Watchdog enabled\n");
276 WATCHDOG_RESET ();
277 return (0);
278 }
279 # define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init,
280
281 static int init_func_watchdog_reset (void)
282 {
283 WATCHDOG_RESET ();
284 return (0);
285 }
286 # define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset,
287 #else
288 # define INIT_FUNC_WATCHDOG_INIT /* undef */
289 # define INIT_FUNC_WATCHDOG_RESET /* undef */
290 #endif /* CONFIG_WATCHDOG */
291
292 /************************************************************************
293 * Initialization sequence *
294 ************************************************************************
295 */
296
297 init_fnc_t *init_sequence[] = {
298
299 #if defined(CONFIG_BOARD_EARLY_INIT_F)
300 board_early_init_f,
301 #endif
302
303 #if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
304 get_clocks, /* get CPU and bus clocks (etc.) */
305 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
306 && !defined(CONFIG_TQM885D)
307 adjust_sdram_tbs_8xx,
308 #endif
309 init_timebase,
310 #endif
311 #ifdef CFG_ALLOC_DPRAM
312 #if !defined(CONFIG_CPM2)
313 dpram_init,
314 #endif
315 #endif
316 #if defined(CONFIG_BOARD_POSTCLK_INIT)
317 board_postclk_init,
318 #endif
319 env_init,
320 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
321 get_clocks_866, /* get CPU and bus clocks according to the environment variable */
322 sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */
323 init_timebase,
324 #endif
325 init_baudrate,
326 serial_init,
327 console_init_f,
328 display_options,
329 #if defined(CONFIG_8260)
330 prt_8260_rsr,
331 prt_8260_clks,
332 #endif /* CONFIG_8260 */
333 #if defined(CONFIG_MPC83XX)
334 prt_83xx_rsr,
335 #endif
336 checkcpu,
337 #if defined(CONFIG_MPC5xxx)
338 prt_mpc5xxx_clks,
339 #endif /* CONFIG_MPC5xxx */
340 #if defined(CONFIG_MPC8220)
341 prt_mpc8220_clks,
342 #endif
343 checkboard,
344 INIT_FUNC_WATCHDOG_INIT
345 #if defined(CONFIG_MISC_INIT_F)
346 misc_init_f,
347 #endif
348 INIT_FUNC_WATCHDOG_RESET
349 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
350 init_func_i2c,
351 #endif
352 #if defined(CONFIG_HARD_SPI)
353 init_func_spi,
354 #endif
355 #if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */
356 dtt_init,
357 #endif
358 #ifdef CONFIG_POST
359 post_init_f,
360 #endif
361 INIT_FUNC_WATCHDOG_RESET
362 init_func_ram,
363 #if defined(CFG_DRAM_TEST)
364 testdram,
365 #endif /* CFG_DRAM_TEST */
366 INIT_FUNC_WATCHDOG_RESET
367
368 NULL, /* Terminate this list */
369 };
370
371 #ifndef CONFIG_MAX_MEM_MAPPED
372 #define CONFIG_MAX_MEM_MAPPED (256 << 20)
373 #endif
374 ulong get_effective_memsize(void)
375 {
376 #ifndef CONFIG_VERY_BIG_RAM
377 return gd->ram_size;
378 #else
379 /* limit stack to what we can reasonable map */
380 return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
381 CONFIG_MAX_MEM_MAPPED : gd->ram_size);
382 #endif
383 }
384
385 /************************************************************************
386 *
387 * This is the first part of the initialization sequence that is
388 * implemented in C, but still running from ROM.
389 *
390 * The main purpose is to provide a (serial) console interface as
391 * soon as possible (so we can see any error messages), and to
392 * initialize the RAM so that we can relocate the monitor code to
393 * RAM.
394 *
395 * Be aware of the restrictions: global data is read-only, BSS is not
396 * initialized, and stack space is limited to a few kB.
397 *
398 ************************************************************************
399 */
400
401 void board_init_f (ulong bootflag)
402 {
403 bd_t *bd;
404 ulong len, addr, addr_sp;
405 ulong *s;
406 gd_t *id;
407 init_fnc_t **init_fnc_ptr;
408 #ifdef CONFIG_PRAM
409 int i;
410 ulong reg;
411 uchar tmp[64]; /* long enough for environment variables */
412 #endif
413
414 /* Pointer is writable since we allocated a register for it */
415 gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
416 /* compiler optimization barrier needed for GCC >= 3.4 */
417 __asm__ __volatile__("": : :"memory");
418
419 #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC83XX)
420 /* Clear initial global data */
421 memset ((void *) gd, 0, sizeof (gd_t));
422 #endif
423
424 for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
425 if ((*init_fnc_ptr) () != 0) {
426 hang ();
427 }
428 }
429
430 /*
431 * Now that we have DRAM mapped and working, we can
432 * relocate the code and continue running from DRAM.
433 *
434 * Reserve memory at end of RAM for (top down in that order):
435 * - area that won't get touched by U-Boot and Linux (optional)
436 * - kernel log buffer
437 * - protected RAM
438 * - LCD framebuffer
439 * - monitor code
440 * - board info struct
441 */
442 len = (ulong)&_end - CFG_MONITOR_BASE;
443
444 /*
445 * Subtract specified amount of memory to hide so that it won't
446 * get "touched" at all by U-Boot. By fixing up gd->ram_size
447 * the Linux kernel should now get passed the now "corrected"
448 * memory size and won't touch it either. This should work
449 * for arch/ppc and arch/powerpc. Only Linux board ports in
450 * arch/powerpc with bootwrapper support, that recalculate the
451 * memory size from the SDRAM controller setup will have to
452 * get fixed.
453 */
454 gd->ram_size -= CFG_MEM_TOP_HIDE;
455
456 #ifndef CONFIG_MAX_MEM_MAPPED
457 #define CONFIG_MAX_MEM_MAPPED (256 << 20)
458 #endif
459
460 #ifndef CONFIG_VERY_BIG_RAM
461 addr = CFG_SDRAM_BASE + get_effective_memsize();
462 #else
463 /* only allow stack below 256M */
464 addr = CFG_SDRAM_BASE +
465 (gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
466 CONFIG_MAX_MEM_MAPPED : get_effective_memsize();
467 #endif
468
469 #ifdef CONFIG_LOGBUFFER
470 #ifndef CONFIG_ALT_LB_ADDR
471 /* reserve kernel log buffer */
472 addr -= (LOGBUFF_RESERVE);
473 debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr);
474 #endif
475 #endif
476
477 #ifdef CONFIG_PRAM
478 /*
479 * reserve protected RAM
480 */
481 i = getenv_r ("pram", (char *)tmp, sizeof (tmp));
482 reg = (i > 0) ? simple_strtoul ((const char *)tmp, NULL, 10) : CONFIG_PRAM;
483 addr -= (reg << 10); /* size is in kB */
484 debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
485 #endif /* CONFIG_PRAM */
486
487 /* round down to next 4 kB limit */
488 addr &= ~(4096 - 1);
489 debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);
490
491 #ifdef CONFIG_LCD
492 /* reserve memory for LCD display (always full pages) */
493 addr = lcd_setmem (addr);
494 gd->fb_base = addr;
495 #endif /* CONFIG_LCD */
496
497 #if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
498 /* reserve memory for video display (always full pages) */
499 addr = video_setmem (addr);
500 gd->fb_base = addr;
501 #endif /* CONFIG_VIDEO */
502
503 /*
504 * reserve memory for U-Boot code, data & bss
505 * round down to next 4 kB limit
506 */
507 addr -= len;
508 addr &= ~(4096 - 1);
509 #ifdef CONFIG_E500
510 /* round down to next 64 kB limit so that IVPR stays aligned */
511 addr &= ~(65536 - 1);
512 #endif
513
514 debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
515
516 #ifdef CONFIG_AMIGAONEG3SE
517 gd->relocaddr = addr;
518 #endif
519
520 /*
521 * reserve memory for malloc() arena
522 */
523 addr_sp = addr - TOTAL_MALLOC_LEN;
524 debug ("Reserving %dk for malloc() at: %08lx\n",
525 TOTAL_MALLOC_LEN >> 10, addr_sp);
526
527 /*
528 * (permanently) allocate a Board Info struct
529 * and a permanent copy of the "global" data
530 */
531 addr_sp -= sizeof (bd_t);
532 bd = (bd_t *) addr_sp;
533 gd->bd = bd;
534 debug ("Reserving %d Bytes for Board Info at: %08lx\n",
535 sizeof (bd_t), addr_sp);
536 addr_sp -= sizeof (gd_t);
537 id = (gd_t *) addr_sp;
538 debug ("Reserving %d Bytes for Global Data at: %08lx\n",
539 sizeof (gd_t), addr_sp);
540
541 /*
542 * Finally, we set up a new (bigger) stack.
543 *
544 * Leave some safety gap for SP, force alignment on 16 byte boundary
545 * Clear initial stack frame
546 */
547 addr_sp -= 16;
548 addr_sp &= ~0xF;
549 s = (ulong *)addr_sp;
550 *s-- = 0;
551 *s-- = 0;
552 addr_sp = (ulong)s;
553 debug ("Stack Pointer at: %08lx\n", addr_sp);
554
555 /*
556 * Save local variables to board info struct
557 */
558
559 bd->bi_memstart = CFG_SDRAM_BASE; /* start of DRAM memory */
560 bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
561
562 #ifdef CONFIG_IP860
563 bd->bi_sramstart = SRAM_BASE; /* start of SRAM memory */
564 bd->bi_sramsize = SRAM_SIZE; /* size of SRAM memory */
565 #elif defined CONFIG_MPC8220
566 bd->bi_sramstart = CFG_SRAM_BASE; /* start of SRAM memory */
567 bd->bi_sramsize = CFG_SRAM_SIZE; /* size of SRAM memory */
568 #else
569 bd->bi_sramstart = 0; /* FIXME */ /* start of SRAM memory */
570 bd->bi_sramsize = 0; /* FIXME */ /* size of SRAM memory */
571 #endif
572
573 #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
574 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
575 bd->bi_immr_base = CFG_IMMR; /* base of IMMR register */
576 #endif
577 #if defined(CONFIG_MPC5xxx)
578 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
579 #endif
580 #if defined(CONFIG_MPC83XX)
581 bd->bi_immrbar = CFG_IMMR;
582 #endif
583 #if defined(CONFIG_MPC8220)
584 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
585 bd->bi_inpfreq = gd->inp_clk;
586 bd->bi_pcifreq = gd->pci_clk;
587 bd->bi_vcofreq = gd->vco_clk;
588 bd->bi_pevfreq = gd->pev_clk;
589 bd->bi_flbfreq = gd->flb_clk;
590
591 /* store bootparam to sram (backward compatible), here? */
592 {
593 u32 *sram = (u32 *)CFG_SRAM_BASE;
594 *sram++ = gd->ram_size;
595 *sram++ = gd->bus_clk;
596 *sram++ = gd->inp_clk;
597 *sram++ = gd->cpu_clk;
598 *sram++ = gd->vco_clk;
599 *sram++ = gd->flb_clk;
600 *sram++ = 0xb8c3ba11; /* boot signature */
601 }
602 #endif
603
604 bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */
605
606 WATCHDOG_RESET ();
607 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
608 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
609 #if defined(CONFIG_CPM2)
610 bd->bi_cpmfreq = gd->cpm_clk;
611 bd->bi_brgfreq = gd->brg_clk;
612 bd->bi_sccfreq = gd->scc_clk;
613 bd->bi_vco = gd->vco_out;
614 #endif /* CONFIG_CPM2 */
615 #if defined(CONFIG_MPC512X)
616 bd->bi_ipsfreq = gd->ips_clk;
617 #endif /* CONFIG_MPC512X */
618 #if defined(CONFIG_MPC5xxx)
619 bd->bi_ipbfreq = gd->ipb_clk;
620 bd->bi_pcifreq = gd->pci_clk;
621 #endif /* CONFIG_MPC5xxx */
622 bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
623
624 #ifdef CFG_EXTBDINFO
625 strncpy ((char *)bd->bi_s_version, "1.2", sizeof (bd->bi_s_version));
626 strncpy ((char *)bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version));
627
628 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
629 bd->bi_plb_busfreq = gd->bus_clk;
630 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
631 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
632 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
633 bd->bi_pci_busfreq = get_PCI_freq ();
634 bd->bi_opbfreq = get_OPB_freq ();
635 #elif defined(CONFIG_XILINX_ML300)
636 bd->bi_pci_busfreq = get_PCI_freq ();
637 #endif
638 #endif
639
640 debug ("New Stack Pointer is: %08lx\n", addr_sp);
641
642 WATCHDOG_RESET ();
643
644 #ifdef CONFIG_POST
645 post_bootmode_init();
646 post_run (NULL, POST_ROM | post_bootmode_get(0));
647 #endif
648
649 WATCHDOG_RESET();
650
651 memcpy (id, (void *)gd, sizeof (gd_t));
652
653 relocate_code (addr_sp, id, addr);
654
655 /* NOTREACHED - relocate_code() does not return */
656 }
657
658 /************************************************************************
659 *
660 * This is the next part if the initialization sequence: we are now
661 * running from RAM and have a "normal" C environment, i. e. global
662 * data can be written, BSS has been cleared, the stack size in not
663 * that critical any more, etc.
664 *
665 ************************************************************************
666 */
667 void board_init_r (gd_t *id, ulong dest_addr)
668 {
669 cmd_tbl_t *cmdtp;
670 char *s, *e;
671 bd_t *bd;
672 int i;
673 extern void malloc_bin_reloc (void);
674 #ifndef CFG_ENV_IS_NOWHERE
675 extern char * env_name_spec;
676 #endif
677
678 #ifndef CFG_NO_FLASH
679 ulong flash_size;
680 #endif
681
682 gd = id; /* initialize RAM version of global data */
683 bd = gd->bd;
684
685 gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
686
687 #if defined(CONFIG_RELOC_FIXUP_WORKS)
688 gd->reloc_off = 0;
689 mem_malloc_end = dest_addr;
690 #else
691 gd->reloc_off = dest_addr - CFG_MONITOR_BASE;
692 #endif
693
694 #ifdef CONFIG_SERIAL_MULTI
695 serial_initialize();
696 #endif
697
698 debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
699
700 WATCHDOG_RESET ();
701
702 #if defined(CONFIG_BOARD_EARLY_INIT_R)
703 board_early_init_r ();
704 #endif
705
706 monitor_flash_len = (ulong)&__init_end - dest_addr;
707
708 /*
709 * We have to relocate the command table manually
710 */
711 for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) {
712 ulong addr;
713 addr = (ulong) (cmdtp->cmd) + gd->reloc_off;
714 #if 0
715 printf ("Command \"%s\": 0x%08lx => 0x%08lx\n",
716 cmdtp->name, (ulong) (cmdtp->cmd), addr);
717 #endif
718 cmdtp->cmd =
719 (int (*)(struct cmd_tbl_s *, int, int, char *[]))addr;
720
721 addr = (ulong)(cmdtp->name) + gd->reloc_off;
722 cmdtp->name = (char *)addr;
723
724 if (cmdtp->usage) {
725 addr = (ulong)(cmdtp->usage) + gd->reloc_off;
726 cmdtp->usage = (char *)addr;
727 }
728 #ifdef CFG_LONGHELP
729 if (cmdtp->help) {
730 addr = (ulong)(cmdtp->help) + gd->reloc_off;
731 cmdtp->help = (char *)addr;
732 }
733 #endif
734 }
735 /* there are some other pointer constants we must deal with */
736 #ifndef CFG_ENV_IS_NOWHERE
737 env_name_spec += gd->reloc_off;
738 #endif
739
740 WATCHDOG_RESET ();
741
742 #ifdef CONFIG_LOGBUFFER
743 logbuff_init_ptrs ();
744 #endif
745 #ifdef CONFIG_POST
746 post_output_backlog ();
747 post_reloc ();
748 #endif
749
750 WATCHDOG_RESET();
751
752 #if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || \
753 defined (CONFIG_FLAGADM) || defined(CONFIG_MPC83XX)
754 icache_enable (); /* it's time to enable the instruction cache */
755 #endif
756
757 #if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
758 unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
759 #endif
760
761 #if defined(CONFIG_BAB7xx) || defined(CONFIG_CPC45)
762 /*
763 * Do PCI configuration on BAB7xx and CPC45 _before_ the flash
764 * gets initialised, because we need the ISA resp. PCI_to_LOCAL bus
765 * bridge there.
766 */
767 pci_init ();
768 #endif
769 #if defined(CONFIG_BAB7xx)
770 /*
771 * Initialise the ISA bridge
772 */
773 initialise_w83c553f ();
774 #endif
775
776 asm ("sync ; isync");
777
778 /*
779 * Setup trap handlers
780 */
781 trap_init (dest_addr);
782
783 #if !defined(CFG_NO_FLASH)
784 puts ("FLASH: ");
785
786 if ((flash_size = flash_init ()) > 0) {
787 # ifdef CFG_FLASH_CHECKSUM
788 print_size (flash_size, "");
789 /*
790 * Compute and print flash CRC if flashchecksum is set to 'y'
791 *
792 * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
793 */
794 s = getenv ("flashchecksum");
795 if (s && (*s == 'y')) {
796 printf (" CRC: %08lX",
797 crc32 (0, (const unsigned char *) CFG_FLASH_BASE, flash_size)
798 );
799 }
800 putc ('\n');
801 # else /* !CFG_FLASH_CHECKSUM */
802 print_size (flash_size, "\n");
803 # endif /* CFG_FLASH_CHECKSUM */
804 } else {
805 puts (failed);
806 hang ();
807 }
808
809 bd->bi_flashstart = CFG_FLASH_BASE; /* update start of FLASH memory */
810 bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */
811
812 #if defined(CFG_UPDATE_FLASH_SIZE)
813 /* Make a update of the Memctrl. */
814 update_flash_size (flash_size);
815 #endif
816
817
818 # if defined(CONFIG_PCU_E) || defined(CONFIG_OXC) || defined(CONFIG_RMU)
819 /* flash mapped at end of memory map */
820 bd->bi_flashoffset = TEXT_BASE + flash_size;
821 # elif CFG_MONITOR_BASE == CFG_FLASH_BASE
822 bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */
823 # else
824 bd->bi_flashoffset = 0;
825 # endif
826 #else /* CFG_NO_FLASH */
827
828 bd->bi_flashsize = 0;
829 bd->bi_flashstart = 0;
830 bd->bi_flashoffset = 0;
831 #endif /* !CFG_NO_FLASH */
832
833 WATCHDOG_RESET ();
834
835 /* initialize higher level parts of CPU like time base and timers */
836 cpu_init_r ();
837
838 WATCHDOG_RESET ();
839
840 /* initialize malloc() area */
841 mem_malloc_init ();
842 malloc_bin_reloc ();
843
844 #ifdef CONFIG_SPI
845 # if !defined(CFG_ENV_IS_IN_EEPROM)
846 spi_init_f ();
847 # endif
848 spi_init_r ();
849 #endif
850
851 #if defined(CONFIG_CMD_NAND)
852 WATCHDOG_RESET ();
853 puts ("NAND: ");
854 nand_init(); /* go init the NAND */
855 #endif
856
857 /* relocate environment function pointers etc. */
858 env_relocate ();
859
860 /*
861 * Fill in missing fields of bd_info.
862 * We do this here, where we have "normal" access to the
863 * environment; we used to do this still running from ROM,
864 * where had to use getenv_r(), which can be pretty slow when
865 * the environment is in EEPROM.
866 */
867
868 #if defined(CFG_EXTBDINFO)
869 #if defined(CONFIG_405GP) || defined(CONFIG_405EP)
870 #if defined(CONFIG_I2CFAST)
871 /*
872 * set bi_iic_fast for linux taking environment variable
873 * "i2cfast" into account
874 */
875 {
876 char *s = getenv ("i2cfast");
877 if (s && ((*s == 'y') || (*s == 'Y'))) {
878 bd->bi_iic_fast[0] = 1;
879 bd->bi_iic_fast[1] = 1;
880 } else {
881 bd->bi_iic_fast[0] = 0;
882 bd->bi_iic_fast[1] = 0;
883 }
884 }
885 #else
886 bd->bi_iic_fast[0] = 0;
887 bd->bi_iic_fast[1] = 0;
888 #endif /* CONFIG_I2CFAST */
889 #endif /* CONFIG_405GP, CONFIG_405EP */
890 #endif /* CFG_EXTBDINFO */
891
892 #if defined(CONFIG_SC3)
893 sc3_read_eeprom();
894 #endif
895
896 #if defined (CFG_ID_EEPROM) || defined (CFG_I2C_MAC_OFFSET)
897 mac_read_from_eeprom();
898 #endif
899
900 s = getenv ("ethaddr");
901 #if defined (CONFIG_MBX) || \
902 defined (CONFIG_RPXCLASSIC) || \
903 defined(CONFIG_IAD210) || \
904 defined(CONFIG_V38B)
905 if (s == NULL)
906 board_get_enetaddr (bd->bi_enetaddr);
907 else
908 #endif
909 for (i = 0; i < 6; ++i) {
910 bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
911 if (s)
912 s = (*e) ? e + 1 : e;
913 }
914 #ifdef CONFIG_HERMES
915 if ((gd->board_type >> 16) == 2)
916 bd->bi_ethspeed = gd->board_type & 0xFFFF;
917 else
918 bd->bi_ethspeed = 0xFFFF;
919 #endif
920
921 #ifdef CONFIG_NX823
922 load_sernum_ethaddr ();
923 #endif
924
925 #ifdef CONFIG_HAS_ETH1
926 /* handle the 2nd ethernet address */
927
928 s = getenv ("eth1addr");
929
930 for (i = 0; i < 6; ++i) {
931 bd->bi_enet1addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
932 if (s)
933 s = (*e) ? e + 1 : e;
934 }
935 #endif
936 #ifdef CONFIG_HAS_ETH2
937 /* handle the 3rd ethernet address */
938
939 s = getenv ("eth2addr");
940 #if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF)
941 if (s == NULL)
942 board_get_enetaddr(bd->bi_enet2addr);
943 else
944 #endif
945 for (i = 0; i < 6; ++i) {
946 bd->bi_enet2addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
947 if (s)
948 s = (*e) ? e + 1 : e;
949 }
950 #endif
951
952 #ifdef CONFIG_HAS_ETH3
953 /* handle 4th ethernet address */
954 s = getenv("eth3addr");
955 #if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF)
956 if (s == NULL)
957 board_get_enetaddr(bd->bi_enet3addr);
958 else
959 #endif
960 for (i = 0; i < 6; ++i) {
961 bd->bi_enet3addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
962 if (s)
963 s = (*e) ? e + 1 : e;
964 }
965 #endif
966
967 #if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \
968 defined(CONFIG_TQM8272) || \
969 defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || \
970 defined(CONFIG_KUP4X) || defined(CONFIG_PCS440EP)
971 load_sernum_ethaddr ();
972 #endif
973 /* IP Address */
974 bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
975
976 WATCHDOG_RESET ();
977
978 #if defined(CONFIG_PCI) && !defined(CONFIG_BAB7xx) && !defined(CONFIG_CPC45)
979 /*
980 * Do pci configuration
981 */
982 pci_init ();
983 #endif
984
985 /** leave this here (after malloc(), environment and PCI are working) **/
986 /* Initialize devices */
987 devices_init ();
988
989 /* Initialize the jump table for applications */
990 jumptable_init ();
991
992 #if defined(CONFIG_API)
993 /* Initialize API */
994 api_init ();
995 #endif
996
997 /* Initialize the console (after the relocation and devices init) */
998 console_init_r ();
999
1000 #if defined(CONFIG_CCM) || \
1001 defined(CONFIG_COGENT) || \
1002 defined(CONFIG_CPCI405) || \
1003 defined(CONFIG_EVB64260) || \
1004 defined(CONFIG_KUP4K) || \
1005 defined(CONFIG_KUP4X) || \
1006 defined(CONFIG_LWMON) || \
1007 defined(CONFIG_PCU_E) || \
1008 defined(CONFIG_SC3) || \
1009 defined(CONFIG_W7O) || \
1010 defined(CONFIG_MISC_INIT_R)
1011 /* miscellaneous platform dependent initialisations */
1012 misc_init_r ();
1013 #endif
1014
1015 #ifdef CONFIG_HERMES
1016 if (bd->bi_ethspeed != 0xFFFF)
1017 hermes_start_lxt980 ((int) bd->bi_ethspeed);
1018 #endif
1019
1020 #if defined(CONFIG_CMD_KGDB)
1021 WATCHDOG_RESET ();
1022 puts ("KGDB: ");
1023 kgdb_init ();
1024 #endif
1025
1026 debug ("U-Boot relocated to %08lx\n", dest_addr);
1027
1028 /*
1029 * Enable Interrupts
1030 */
1031 interrupt_init ();
1032
1033 /* Must happen after interrupts are initialized since
1034 * an irq handler gets installed
1035 */
1036 #ifdef CONFIG_SERIAL_SOFTWARE_FIFO
1037 serial_buffered_init();
1038 #endif
1039
1040 #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
1041 status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
1042 #endif
1043
1044 udelay (20);
1045
1046 set_timer (0);
1047
1048 /* Initialize from environment */
1049 if ((s = getenv ("loadaddr")) != NULL) {
1050 load_addr = simple_strtoul (s, NULL, 16);
1051 }
1052 #if defined(CONFIG_CMD_NET)
1053 if ((s = getenv ("bootfile")) != NULL) {
1054 copy_filename (BootFile, s, sizeof (BootFile));
1055 }
1056 #endif
1057
1058 WATCHDOG_RESET ();
1059
1060 #if defined(CONFIG_CMD_SCSI)
1061 WATCHDOG_RESET ();
1062 puts ("SCSI: ");
1063 scsi_init ();
1064 #endif
1065
1066 #if defined(CONFIG_CMD_DOC)
1067 WATCHDOG_RESET ();
1068 puts ("DOC: ");
1069 doc_init ();
1070 #endif
1071
1072 #if defined(CONFIG_CMD_NET)
1073 #if defined(CONFIG_NET_MULTI)
1074 WATCHDOG_RESET ();
1075 puts ("Net: ");
1076 #endif
1077 eth_initialize (bd);
1078 #endif
1079
1080 #if defined(CONFIG_CMD_NET) && ( \
1081 defined(CONFIG_CCM) || \
1082 defined(CONFIG_ELPT860) || \
1083 defined(CONFIG_EP8260) || \
1084 defined(CONFIG_IP860) || \
1085 defined(CONFIG_IVML24) || \
1086 defined(CONFIG_IVMS8) || \
1087 defined(CONFIG_MPC8260ADS) || \
1088 defined(CONFIG_MPC8266ADS) || \
1089 defined(CONFIG_MPC8560ADS) || \
1090 defined(CONFIG_PCU_E) || \
1091 defined(CONFIG_RPXSUPER) || \
1092 defined(CONFIG_STXGP3) || \
1093 defined(CONFIG_SPD823TS) || \
1094 defined(CONFIG_RESET_PHY_R) )
1095
1096 WATCHDOG_RESET ();
1097 debug ("Reset Ethernet PHY\n");
1098 reset_phy ();
1099 #endif
1100
1101 #ifdef CONFIG_POST
1102 post_run (NULL, POST_RAM | post_bootmode_get(0));
1103 #endif
1104
1105 #if defined(CONFIG_CMD_PCMCIA) \
1106 && !defined(CONFIG_CMD_IDE)
1107 WATCHDOG_RESET ();
1108 puts ("PCMCIA:");
1109 pcmcia_init ();
1110 #endif
1111
1112 #if defined(CONFIG_CMD_IDE)
1113 WATCHDOG_RESET ();
1114 # ifdef CONFIG_IDE_8xx_PCCARD
1115 puts ("PCMCIA:");
1116 # else
1117 puts ("IDE: ");
1118 #endif
1119 #if defined(CONFIG_START_IDE)
1120 if (board_start_ide())
1121 ide_init ();
1122 #else
1123 ide_init ();
1124 #endif
1125 #endif
1126
1127 #if defined(CONFIG_CMD_SATA)
1128 puts ("SATA: ");
1129 sata_initialize ();
1130 #endif
1131
1132 #ifdef CONFIG_LAST_STAGE_INIT
1133 WATCHDOG_RESET ();
1134 /*
1135 * Some parts can be only initialized if all others (like
1136 * Interrupts) are up and running (i.e. the PC-style ISA
1137 * keyboard).
1138 */
1139 last_stage_init ();
1140 #endif
1141
1142 #if defined(CONFIG_CMD_BEDBUG)
1143 WATCHDOG_RESET ();
1144 bedbug_init ();
1145 #endif
1146
1147 #if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
1148 /*
1149 * Export available size of memory for Linux,
1150 * taking into account the protected RAM at top of memory
1151 */
1152 {
1153 ulong pram;
1154 uchar memsz[32];
1155 #ifdef CONFIG_PRAM
1156 char *s;
1157
1158 if ((s = getenv ("pram")) != NULL) {
1159 pram = simple_strtoul (s, NULL, 10);
1160 } else {
1161 pram = CONFIG_PRAM;
1162 }
1163 #else
1164 pram=0;
1165 #endif
1166 #ifdef CONFIG_LOGBUFFER
1167 #ifndef CONFIG_ALT_LB_ADDR
1168 /* Also take the logbuffer into account (pram is in kB) */
1169 pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024;
1170 #endif
1171 #endif
1172 sprintf ((char *)memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
1173 setenv ("mem", (char *)memsz);
1174 }
1175 #endif
1176
1177 #ifdef CONFIG_PS2KBD
1178 puts ("PS/2: ");
1179 kbd_init();
1180 #endif
1181
1182 #ifdef CONFIG_MODEM_SUPPORT
1183 {
1184 extern int do_mdm_init;
1185 do_mdm_init = gd->do_mdm_init;
1186 }
1187 #endif
1188
1189 /* Initialization complete - start the monitor */
1190
1191 /* main_loop() can return to retry autoboot, if so just run it again. */
1192 for (;;) {
1193 WATCHDOG_RESET ();
1194 main_loop ();
1195 }
1196
1197 /* NOTREACHED - no way out of command loop except booting */
1198 }
1199
1200 void hang (void)
1201 {
1202 puts ("### ERROR ### Please RESET the board ###\n");
1203 show_boot_progress(-30);
1204 for (;;);
1205 }
1206
1207 #ifdef CONFIG_MODEM_SUPPORT
1208 /* called from main loop (common/main.c) */
1209 /* 'inline' - We have to do it fast */
1210 static inline void mdm_readline(char *buf, int bufsiz)
1211 {
1212 char c;
1213 char *p;
1214 int n;
1215
1216 n = 0;
1217 p = buf;
1218 for(;;) {
1219 c = serial_getc();
1220
1221 /* dbg("(%c)", c); */
1222
1223 switch(c) {
1224 case '\r':
1225 break;
1226 case '\n':
1227 *p = '\0';
1228 return;
1229
1230 default:
1231 if(n++ > bufsiz) {
1232 *p = '\0';
1233 return; /* sanity check */
1234 }
1235 *p = c;
1236 p++;
1237 break;
1238 }
1239 }
1240 }
1241
1242 extern void dbg(const char *fmt, ...);
1243 int mdm_init (void)
1244 {
1245 char env_str[16];
1246 char *init_str;
1247 int i;
1248 extern char console_buffer[];
1249 extern void enable_putc(void);
1250 extern int hwflow_onoff(int);
1251
1252 enable_putc(); /* enable serial_putc() */
1253
1254 #ifdef CONFIG_HWFLOW
1255 init_str = getenv("mdm_flow_control");
1256 if (init_str && (strcmp(init_str, "rts/cts") == 0))
1257 hwflow_onoff (1);
1258 else
1259 hwflow_onoff(-1);
1260 #endif
1261
1262 for (i = 1;;i++) {
1263 sprintf(env_str, "mdm_init%d", i);
1264 if ((init_str = getenv(env_str)) != NULL) {
1265 serial_puts(init_str);
1266 serial_puts("\n");
1267 for(;;) {
1268 mdm_readline(console_buffer, CFG_CBSIZE);
1269 dbg("ini%d: [%s]", i, console_buffer);
1270
1271 if ((strcmp(console_buffer, "OK") == 0) ||
1272 (strcmp(console_buffer, "ERROR") == 0)) {
1273 dbg("ini%d: cmd done", i);
1274 break;
1275 } else /* in case we are originating call ... */
1276 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1277 dbg("ini%d: connect", i);
1278 return 0;
1279 }
1280 }
1281 } else
1282 break; /* no init string - stop modem init */
1283
1284 udelay(100000);
1285 }
1286
1287 udelay(100000);
1288
1289 /* final stage - wait for connect */
1290 for(;i > 1;) { /* if 'i' > 1 - wait for connection
1291 message from modem */
1292 mdm_readline(console_buffer, CFG_CBSIZE);
1293 dbg("ini_f: [%s]", console_buffer);
1294 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1295 dbg("ini_f: connected");
1296 return 0;
1297 }
1298 }
1299
1300 return 0;
1301 }
1302
1303 #endif
1304
1305 #if 0 /* We could use plain global data, but the resulting code is bigger */
1306 /*
1307 * Pointer to initial global data area
1308 *
1309 * Here we initialize it.
1310 */
1311 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
1312 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
1313 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
1314 #endif /* 0 */
1315
1316 /************************************************************************/