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1 /*
2 * (C) Copyright 2000-2006
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24 #include <common.h>
25 #include <watchdog.h>
26 #include <command.h>
27 #include <malloc.h>
28 #include <devices.h>
29 #ifdef CONFIG_8xx
30 #include <mpc8xx.h>
31 #endif
32 #ifdef CONFIG_5xx
33 #include <mpc5xx.h>
34 #endif
35 #ifdef CONFIG_MPC5xxx
36 #include <mpc5xxx.h>
37 #endif
38 #if defined(CONFIG_CMD_IDE)
39 #include <ide.h>
40 #endif
41 #if defined(CONFIG_CMD_SATA)
42 #include <sata.h>
43 #endif
44 #if defined(CONFIG_CMD_SCSI)
45 #include <scsi.h>
46 #endif
47 #if defined(CONFIG_CMD_KGDB)
48 #include <kgdb.h>
49 #endif
50 #ifdef CONFIG_STATUS_LED
51 #include <status_led.h>
52 #endif
53 #include <net.h>
54 #include <serial.h>
55 #ifdef CFG_ALLOC_DPRAM
56 #if !defined(CONFIG_CPM2)
57 #include <commproc.h>
58 #endif
59 #endif
60 #include <version.h>
61 #if defined(CONFIG_BAB7xx)
62 #include <w83c553f.h>
63 #endif
64 #include <dtt.h>
65 #if defined(CONFIG_POST)
66 #include <post.h>
67 #endif
68 #if defined(CONFIG_LOGBUFFER)
69 #include <logbuff.h>
70 #endif
71 #if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
72 #include <asm/cache.h>
73 #endif
74 #ifdef CONFIG_PS2KBD
75 #include <keyboard.h>
76 #endif
77
78 #ifdef CFG_UPDATE_FLASH_SIZE
79 extern int update_flash_size (int flash_size);
80 #endif
81
82 #if defined(CONFIG_SC3)
83 extern void sc3_read_eeprom(void);
84 #endif
85
86 #if defined(CONFIG_CMD_DOC)
87 void doc_init (void);
88 #endif
89 #if defined(CONFIG_HARD_I2C) || \
90 defined(CONFIG_SOFT_I2C)
91 #include <i2c.h>
92 #endif
93 #if defined(CONFIG_HARD_SPI)
94 #include <spi.h>
95 #endif
96 #include <nand.h>
97
98 static char *failed = "*** failed ***\n";
99
100 #if defined(CONFIG_OXC) || defined(CONFIG_PCU_E) || defined(CONFIG_RMU)
101 extern flash_info_t flash_info[];
102 #endif
103
104 #if defined(CONFIG_START_IDE)
105 extern int board_start_ide(void);
106 #endif
107 #include <environment.h>
108
109 DECLARE_GLOBAL_DATA_PTR;
110
111 #if defined(CFG_ENV_IS_EMBEDDED)
112 #define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
113 #elif ( ((CFG_ENV_ADDR+CFG_ENV_SIZE) < CFG_MONITOR_BASE) || \
114 (CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \
115 defined(CFG_ENV_IS_IN_NVRAM)
116 #define TOTAL_MALLOC_LEN (CFG_MALLOC_LEN + CFG_ENV_SIZE)
117 #else
118 #define TOTAL_MALLOC_LEN CFG_MALLOC_LEN
119 #endif
120
121 #if !defined(CFG_MEM_TOP_HIDE)
122 #define CFG_MEM_TOP_HIDE 0
123 #endif
124
125 extern ulong __init_end;
126 extern ulong _end;
127 ulong monitor_flash_len;
128
129 #if defined(CONFIG_CMD_BEDBUG)
130 #include <bedbug/type.h>
131 #endif
132
133 /*
134 * Begin and End of memory area for malloc(), and current "brk"
135 */
136 static ulong mem_malloc_start = 0;
137 static ulong mem_malloc_end = 0;
138 static ulong mem_malloc_brk = 0;
139
140 /************************************************************************
141 * Utilities *
142 ************************************************************************
143 */
144
145 /*
146 * The Malloc area is immediately below the monitor copy in DRAM
147 */
148 static void mem_malloc_init (void)
149 {
150 #if !defined(CONFIG_RELOC_FIXUP_WORKS)
151 mem_malloc_end = CFG_MONITOR_BASE + gd->reloc_off;
152 #endif
153 mem_malloc_start = mem_malloc_end - TOTAL_MALLOC_LEN;
154 mem_malloc_brk = mem_malloc_start;
155
156 memset ((void *) mem_malloc_start,
157 0,
158 mem_malloc_end - mem_malloc_start);
159 }
160
161 void *sbrk (ptrdiff_t increment)
162 {
163 ulong old = mem_malloc_brk;
164 ulong new = old + increment;
165
166 if ((new < mem_malloc_start) || (new > mem_malloc_end)) {
167 return (NULL);
168 }
169 mem_malloc_brk = new;
170 return ((void *) old);
171 }
172
173 char *strmhz (char *buf, long hz)
174 {
175 long l, n;
176 long m;
177
178 n = hz / 1000000L;
179 l = sprintf (buf, "%ld", n);
180 m = (hz % 1000000L) / 1000L;
181 if (m != 0)
182 sprintf (buf + l, ".%03ld", m);
183 return (buf);
184 }
185
186 /*
187 * All attempts to come up with a "common" initialization sequence
188 * that works for all boards and architectures failed: some of the
189 * requirements are just _too_ different. To get rid of the resulting
190 * mess of board dependend #ifdef'ed code we now make the whole
191 * initialization sequence configurable to the user.
192 *
193 * The requirements for any new initalization function is simple: it
194 * receives a pointer to the "global data" structure as it's only
195 * argument, and returns an integer return code, where 0 means
196 * "continue" and != 0 means "fatal error, hang the system".
197 */
198 typedef int (init_fnc_t) (void);
199
200 /************************************************************************
201 * Init Utilities *
202 ************************************************************************
203 * Some of this code should be moved into the core functions,
204 * but let's get it working (again) first...
205 */
206
207 static int init_baudrate (void)
208 {
209 char tmp[64]; /* long enough for environment variables */
210 int i = getenv_r ("baudrate", tmp, sizeof (tmp));
211
212 gd->baudrate = (i > 0)
213 ? (int) simple_strtoul (tmp, NULL, 10)
214 : CONFIG_BAUDRATE;
215 return (0);
216 }
217
218 /***********************************************************************/
219
220 void __board_add_ram_info(int use_default)
221 {
222 /* please define platform specific board_add_ram_info() */
223 }
224 void board_add_ram_info(int) __attribute__((weak, alias("__board_add_ram_info")));
225
226
227 static int init_func_ram (void)
228 {
229 #ifdef CONFIG_BOARD_TYPES
230 int board_type = gd->board_type;
231 #else
232 int board_type = 0; /* use dummy arg */
233 #endif
234 puts ("DRAM: ");
235
236 if ((gd->ram_size = initdram (board_type)) > 0) {
237 print_size (gd->ram_size, "");
238 board_add_ram_info(0);
239 putc('\n');
240 return (0);
241 }
242 puts (failed);
243 return (1);
244 }
245
246 /***********************************************************************/
247
248 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
249 static int init_func_i2c (void)
250 {
251 puts ("I2C: ");
252 i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
253 puts ("ready\n");
254 return (0);
255 }
256 #endif
257
258 #if defined(CONFIG_HARD_SPI)
259 static int init_func_spi (void)
260 {
261 puts ("SPI: ");
262 spi_init ();
263 puts ("ready\n");
264 return (0);
265 }
266 #endif
267
268 /***********************************************************************/
269
270 #if defined(CONFIG_WATCHDOG)
271 static int init_func_watchdog_init (void)
272 {
273 puts (" Watchdog enabled\n");
274 WATCHDOG_RESET ();
275 return (0);
276 }
277 # define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init,
278
279 static int init_func_watchdog_reset (void)
280 {
281 WATCHDOG_RESET ();
282 return (0);
283 }
284 # define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset,
285 #else
286 # define INIT_FUNC_WATCHDOG_INIT /* undef */
287 # define INIT_FUNC_WATCHDOG_RESET /* undef */
288 #endif /* CONFIG_WATCHDOG */
289
290 /************************************************************************
291 * Initialization sequence *
292 ************************************************************************
293 */
294
295 init_fnc_t *init_sequence[] = {
296
297 #if defined(CONFIG_BOARD_EARLY_INIT_F)
298 board_early_init_f,
299 #endif
300
301 #if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
302 get_clocks, /* get CPU and bus clocks (etc.) */
303 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
304 && !defined(CONFIG_TQM885D)
305 adjust_sdram_tbs_8xx,
306 #endif
307 init_timebase,
308 #endif
309 #ifdef CFG_ALLOC_DPRAM
310 #if !defined(CONFIG_CPM2)
311 dpram_init,
312 #endif
313 #endif
314 #if defined(CONFIG_BOARD_POSTCLK_INIT)
315 board_postclk_init,
316 #endif
317 env_init,
318 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
319 get_clocks_866, /* get CPU and bus clocks according to the environment variable */
320 sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */
321 init_timebase,
322 #endif
323 init_baudrate,
324 serial_init,
325 console_init_f,
326 display_options,
327 #if defined(CONFIG_8260)
328 prt_8260_rsr,
329 prt_8260_clks,
330 #endif /* CONFIG_8260 */
331 #if defined(CONFIG_MPC83XX)
332 prt_83xx_rsr,
333 #endif
334 checkcpu,
335 #if defined(CONFIG_MPC5xxx)
336 prt_mpc5xxx_clks,
337 #endif /* CONFIG_MPC5xxx */
338 #if defined(CONFIG_MPC8220)
339 prt_mpc8220_clks,
340 #endif
341 checkboard,
342 INIT_FUNC_WATCHDOG_INIT
343 #if defined(CONFIG_MISC_INIT_F)
344 misc_init_f,
345 #endif
346 INIT_FUNC_WATCHDOG_RESET
347 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
348 init_func_i2c,
349 #endif
350 #if defined(CONFIG_HARD_SPI)
351 init_func_spi,
352 #endif
353 #if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */
354 dtt_init,
355 #endif
356 #ifdef CONFIG_POST
357 post_init_f,
358 #endif
359 INIT_FUNC_WATCHDOG_RESET
360 init_func_ram,
361 #if defined(CFG_DRAM_TEST)
362 testdram,
363 #endif /* CFG_DRAM_TEST */
364 INIT_FUNC_WATCHDOG_RESET
365
366 NULL, /* Terminate this list */
367 };
368
369 #ifndef CONFIG_MAX_MEM_MAPPED
370 #define CONFIG_MAX_MEM_MAPPED (256 << 20)
371 #endif
372 ulong get_effective_memsize(void)
373 {
374 #ifndef CONFIG_VERY_BIG_RAM
375 return gd->ram_size;
376 #else
377 /* limit stack to what we can reasonable map */
378 return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
379 CONFIG_MAX_MEM_MAPPED : gd->ram_size);
380 #endif
381 }
382
383 /************************************************************************
384 *
385 * This is the first part of the initialization sequence that is
386 * implemented in C, but still running from ROM.
387 *
388 * The main purpose is to provide a (serial) console interface as
389 * soon as possible (so we can see any error messages), and to
390 * initialize the RAM so that we can relocate the monitor code to
391 * RAM.
392 *
393 * Be aware of the restrictions: global data is read-only, BSS is not
394 * initialized, and stack space is limited to a few kB.
395 *
396 ************************************************************************
397 */
398
399 void board_init_f (ulong bootflag)
400 {
401 bd_t *bd;
402 ulong len, addr, addr_sp;
403 ulong *s;
404 gd_t *id;
405 init_fnc_t **init_fnc_ptr;
406 #ifdef CONFIG_PRAM
407 int i;
408 ulong reg;
409 uchar tmp[64]; /* long enough for environment variables */
410 #endif
411
412 /* Pointer is writable since we allocated a register for it */
413 gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
414 /* compiler optimization barrier needed for GCC >= 3.4 */
415 __asm__ __volatile__("": : :"memory");
416
417 #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC83XX)
418 /* Clear initial global data */
419 memset ((void *) gd, 0, sizeof (gd_t));
420 #endif
421
422 for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
423 if ((*init_fnc_ptr) () != 0) {
424 hang ();
425 }
426 }
427
428 /*
429 * Now that we have DRAM mapped and working, we can
430 * relocate the code and continue running from DRAM.
431 *
432 * Reserve memory at end of RAM for (top down in that order):
433 * - area that won't get touched by U-Boot and Linux (optional)
434 * - kernel log buffer
435 * - protected RAM
436 * - LCD framebuffer
437 * - monitor code
438 * - board info struct
439 */
440 len = (ulong)&_end - CFG_MONITOR_BASE;
441
442 /*
443 * Subtract specified amount of memory to hide so that it won't
444 * get "touched" at all by U-Boot. By fixing up gd->ram_size
445 * the Linux kernel should now get passed the now "corrected"
446 * memory size and won't touch it either. This should work
447 * for arch/ppc and arch/powerpc. Only Linux board ports in
448 * arch/powerpc with bootwrapper support, that recalculate the
449 * memory size from the SDRAM controller setup will have to
450 * get fixed.
451 */
452 gd->ram_size -= CFG_MEM_TOP_HIDE;
453
454 addr = CFG_SDRAM_BASE + get_effective_memsize();
455
456 #ifdef CONFIG_LOGBUFFER
457 #ifndef CONFIG_ALT_LB_ADDR
458 /* reserve kernel log buffer */
459 addr -= (LOGBUFF_RESERVE);
460 debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr);
461 #endif
462 #endif
463
464 #ifdef CONFIG_PRAM
465 /*
466 * reserve protected RAM
467 */
468 i = getenv_r ("pram", (char *)tmp, sizeof (tmp));
469 reg = (i > 0) ? simple_strtoul ((const char *)tmp, NULL, 10) : CONFIG_PRAM;
470 addr -= (reg << 10); /* size is in kB */
471 debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
472 #endif /* CONFIG_PRAM */
473
474 /* round down to next 4 kB limit */
475 addr &= ~(4096 - 1);
476 debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);
477
478 #ifdef CONFIG_LCD
479 /* reserve memory for LCD display (always full pages) */
480 addr = lcd_setmem (addr);
481 gd->fb_base = addr;
482 #endif /* CONFIG_LCD */
483
484 #if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
485 /* reserve memory for video display (always full pages) */
486 addr = video_setmem (addr);
487 gd->fb_base = addr;
488 #endif /* CONFIG_VIDEO */
489
490 /*
491 * reserve memory for U-Boot code, data & bss
492 * round down to next 4 kB limit
493 */
494 addr -= len;
495 addr &= ~(4096 - 1);
496 #ifdef CONFIG_E500
497 /* round down to next 64 kB limit so that IVPR stays aligned */
498 addr &= ~(65536 - 1);
499 #endif
500
501 debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
502
503 #ifdef CONFIG_AMIGAONEG3SE
504 gd->relocaddr = addr;
505 #endif
506
507 /*
508 * reserve memory for malloc() arena
509 */
510 addr_sp = addr - TOTAL_MALLOC_LEN;
511 debug ("Reserving %dk for malloc() at: %08lx\n",
512 TOTAL_MALLOC_LEN >> 10, addr_sp);
513
514 /*
515 * (permanently) allocate a Board Info struct
516 * and a permanent copy of the "global" data
517 */
518 addr_sp -= sizeof (bd_t);
519 bd = (bd_t *) addr_sp;
520 gd->bd = bd;
521 debug ("Reserving %d Bytes for Board Info at: %08lx\n",
522 sizeof (bd_t), addr_sp);
523 addr_sp -= sizeof (gd_t);
524 id = (gd_t *) addr_sp;
525 debug ("Reserving %d Bytes for Global Data at: %08lx\n",
526 sizeof (gd_t), addr_sp);
527
528 /*
529 * Finally, we set up a new (bigger) stack.
530 *
531 * Leave some safety gap for SP, force alignment on 16 byte boundary
532 * Clear initial stack frame
533 */
534 addr_sp -= 16;
535 addr_sp &= ~0xF;
536 s = (ulong *)addr_sp;
537 *s-- = 0;
538 *s-- = 0;
539 addr_sp = (ulong)s;
540 debug ("Stack Pointer at: %08lx\n", addr_sp);
541
542 /*
543 * Save local variables to board info struct
544 */
545
546 bd->bi_memstart = CFG_SDRAM_BASE; /* start of DRAM memory */
547 bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
548
549 #ifdef CONFIG_IP860
550 bd->bi_sramstart = SRAM_BASE; /* start of SRAM memory */
551 bd->bi_sramsize = SRAM_SIZE; /* size of SRAM memory */
552 #elif defined CONFIG_MPC8220
553 bd->bi_sramstart = CFG_SRAM_BASE; /* start of SRAM memory */
554 bd->bi_sramsize = CFG_SRAM_SIZE; /* size of SRAM memory */
555 #else
556 bd->bi_sramstart = 0; /* FIXME */ /* start of SRAM memory */
557 bd->bi_sramsize = 0; /* FIXME */ /* size of SRAM memory */
558 #endif
559
560 #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
561 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
562 bd->bi_immr_base = CFG_IMMR; /* base of IMMR register */
563 #endif
564 #if defined(CONFIG_MPC5xxx)
565 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
566 #endif
567 #if defined(CONFIG_MPC83XX)
568 bd->bi_immrbar = CFG_IMMR;
569 #endif
570 #if defined(CONFIG_MPC8220)
571 bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
572 bd->bi_inpfreq = gd->inp_clk;
573 bd->bi_pcifreq = gd->pci_clk;
574 bd->bi_vcofreq = gd->vco_clk;
575 bd->bi_pevfreq = gd->pev_clk;
576 bd->bi_flbfreq = gd->flb_clk;
577
578 /* store bootparam to sram (backward compatible), here? */
579 {
580 u32 *sram = (u32 *)CFG_SRAM_BASE;
581 *sram++ = gd->ram_size;
582 *sram++ = gd->bus_clk;
583 *sram++ = gd->inp_clk;
584 *sram++ = gd->cpu_clk;
585 *sram++ = gd->vco_clk;
586 *sram++ = gd->flb_clk;
587 *sram++ = 0xb8c3ba11; /* boot signature */
588 }
589 #endif
590
591 bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */
592
593 WATCHDOG_RESET ();
594 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
595 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
596 #if defined(CONFIG_CPM2)
597 bd->bi_cpmfreq = gd->cpm_clk;
598 bd->bi_brgfreq = gd->brg_clk;
599 bd->bi_sccfreq = gd->scc_clk;
600 bd->bi_vco = gd->vco_out;
601 #endif /* CONFIG_CPM2 */
602 #if defined(CONFIG_MPC512X)
603 bd->bi_ipsfreq = gd->ips_clk;
604 #endif /* CONFIG_MPC512X */
605 #if defined(CONFIG_MPC5xxx)
606 bd->bi_ipbfreq = gd->ipb_clk;
607 bd->bi_pcifreq = gd->pci_clk;
608 #endif /* CONFIG_MPC5xxx */
609 bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
610
611 #ifdef CFG_EXTBDINFO
612 strncpy ((char *)bd->bi_s_version, "1.2", sizeof (bd->bi_s_version));
613 strncpy ((char *)bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version));
614
615 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
616 bd->bi_plb_busfreq = gd->bus_clk;
617 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
618 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
619 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
620 bd->bi_pci_busfreq = get_PCI_freq ();
621 bd->bi_opbfreq = get_OPB_freq ();
622 #elif defined(CONFIG_XILINX_ML300)
623 bd->bi_pci_busfreq = get_PCI_freq ();
624 #endif
625 #endif
626
627 debug ("New Stack Pointer is: %08lx\n", addr_sp);
628
629 WATCHDOG_RESET ();
630
631 #ifdef CONFIG_POST
632 post_bootmode_init();
633 post_run (NULL, POST_ROM | post_bootmode_get(0));
634 #endif
635
636 WATCHDOG_RESET();
637
638 memcpy (id, (void *)gd, sizeof (gd_t));
639
640 relocate_code (addr_sp, id, addr);
641
642 /* NOTREACHED - relocate_code() does not return */
643 }
644
645 /************************************************************************
646 *
647 * This is the next part if the initialization sequence: we are now
648 * running from RAM and have a "normal" C environment, i. e. global
649 * data can be written, BSS has been cleared, the stack size in not
650 * that critical any more, etc.
651 *
652 ************************************************************************
653 */
654 void board_init_r (gd_t *id, ulong dest_addr)
655 {
656 cmd_tbl_t *cmdtp;
657 char *s, *e;
658 bd_t *bd;
659 int i;
660 extern void malloc_bin_reloc (void);
661 #ifndef CFG_ENV_IS_NOWHERE
662 extern char * env_name_spec;
663 #endif
664
665 #ifndef CFG_NO_FLASH
666 ulong flash_size;
667 #endif
668
669 gd = id; /* initialize RAM version of global data */
670 bd = gd->bd;
671
672 gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
673
674 #if defined(CONFIG_RELOC_FIXUP_WORKS)
675 gd->reloc_off = 0;
676 mem_malloc_end = dest_addr;
677 #else
678 gd->reloc_off = dest_addr - CFG_MONITOR_BASE;
679 #endif
680
681 #ifdef CONFIG_SERIAL_MULTI
682 serial_initialize();
683 #endif
684
685 debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
686
687 WATCHDOG_RESET ();
688
689 #if defined(CONFIG_BOARD_EARLY_INIT_R)
690 board_early_init_r ();
691 #endif
692
693 monitor_flash_len = (ulong)&__init_end - dest_addr;
694
695 /*
696 * We have to relocate the command table manually
697 */
698 for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) {
699 ulong addr;
700 addr = (ulong) (cmdtp->cmd) + gd->reloc_off;
701 #if 0
702 printf ("Command \"%s\": 0x%08lx => 0x%08lx\n",
703 cmdtp->name, (ulong) (cmdtp->cmd), addr);
704 #endif
705 cmdtp->cmd =
706 (int (*)(struct cmd_tbl_s *, int, int, char *[]))addr;
707
708 addr = (ulong)(cmdtp->name) + gd->reloc_off;
709 cmdtp->name = (char *)addr;
710
711 if (cmdtp->usage) {
712 addr = (ulong)(cmdtp->usage) + gd->reloc_off;
713 cmdtp->usage = (char *)addr;
714 }
715 #ifdef CFG_LONGHELP
716 if (cmdtp->help) {
717 addr = (ulong)(cmdtp->help) + gd->reloc_off;
718 cmdtp->help = (char *)addr;
719 }
720 #endif
721 }
722 /* there are some other pointer constants we must deal with */
723 #ifndef CFG_ENV_IS_NOWHERE
724 env_name_spec += gd->reloc_off;
725 #endif
726
727 WATCHDOG_RESET ();
728
729 #ifdef CONFIG_LOGBUFFER
730 logbuff_init_ptrs ();
731 #endif
732 #ifdef CONFIG_POST
733 post_output_backlog ();
734 post_reloc ();
735 #endif
736
737 WATCHDOG_RESET();
738
739 #if defined(CONFIG_IP860) || defined(CONFIG_PCU_E) || \
740 defined (CONFIG_FLAGADM) || defined(CONFIG_MPC83XX)
741 icache_enable (); /* it's time to enable the instruction cache */
742 #endif
743
744 #if defined(CFG_INIT_RAM_LOCK) && defined(CONFIG_E500)
745 unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
746 #endif
747
748 #if defined(CONFIG_BAB7xx) || defined(CONFIG_CPC45)
749 /*
750 * Do PCI configuration on BAB7xx and CPC45 _before_ the flash
751 * gets initialised, because we need the ISA resp. PCI_to_LOCAL bus
752 * bridge there.
753 */
754 pci_init ();
755 #endif
756 #if defined(CONFIG_BAB7xx)
757 /*
758 * Initialise the ISA bridge
759 */
760 initialise_w83c553f ();
761 #endif
762
763 asm ("sync ; isync");
764
765 /*
766 * Setup trap handlers
767 */
768 trap_init (dest_addr);
769
770 #if !defined(CFG_NO_FLASH)
771 puts ("FLASH: ");
772
773 if ((flash_size = flash_init ()) > 0) {
774 # ifdef CFG_FLASH_CHECKSUM
775 print_size (flash_size, "");
776 /*
777 * Compute and print flash CRC if flashchecksum is set to 'y'
778 *
779 * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
780 */
781 s = getenv ("flashchecksum");
782 if (s && (*s == 'y')) {
783 printf (" CRC: %08lX",
784 crc32 (0, (const unsigned char *) CFG_FLASH_BASE, flash_size)
785 );
786 }
787 putc ('\n');
788 # else /* !CFG_FLASH_CHECKSUM */
789 print_size (flash_size, "\n");
790 # endif /* CFG_FLASH_CHECKSUM */
791 } else {
792 puts (failed);
793 hang ();
794 }
795
796 bd->bi_flashstart = CFG_FLASH_BASE; /* update start of FLASH memory */
797 bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */
798
799 #if defined(CFG_UPDATE_FLASH_SIZE)
800 /* Make a update of the Memctrl. */
801 update_flash_size (flash_size);
802 #endif
803
804
805 # if defined(CONFIG_PCU_E) || defined(CONFIG_OXC) || defined(CONFIG_RMU)
806 /* flash mapped at end of memory map */
807 bd->bi_flashoffset = TEXT_BASE + flash_size;
808 # elif CFG_MONITOR_BASE == CFG_FLASH_BASE
809 bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */
810 # else
811 bd->bi_flashoffset = 0;
812 # endif
813 #else /* CFG_NO_FLASH */
814
815 bd->bi_flashsize = 0;
816 bd->bi_flashstart = 0;
817 bd->bi_flashoffset = 0;
818 #endif /* !CFG_NO_FLASH */
819
820 WATCHDOG_RESET ();
821
822 /* initialize higher level parts of CPU like time base and timers */
823 cpu_init_r ();
824
825 WATCHDOG_RESET ();
826
827 /* initialize malloc() area */
828 mem_malloc_init ();
829 malloc_bin_reloc ();
830
831 #ifdef CONFIG_SPI
832 # if !defined(CFG_ENV_IS_IN_EEPROM)
833 spi_init_f ();
834 # endif
835 spi_init_r ();
836 #endif
837
838 #if defined(CONFIG_CMD_NAND)
839 WATCHDOG_RESET ();
840 puts ("NAND: ");
841 nand_init(); /* go init the NAND */
842 #endif
843
844 /* relocate environment function pointers etc. */
845 env_relocate ();
846
847 /*
848 * Fill in missing fields of bd_info.
849 * We do this here, where we have "normal" access to the
850 * environment; we used to do this still running from ROM,
851 * where had to use getenv_r(), which can be pretty slow when
852 * the environment is in EEPROM.
853 */
854
855 #if defined(CFG_EXTBDINFO)
856 #if defined(CONFIG_405GP) || defined(CONFIG_405EP)
857 #if defined(CONFIG_I2CFAST)
858 /*
859 * set bi_iic_fast for linux taking environment variable
860 * "i2cfast" into account
861 */
862 {
863 char *s = getenv ("i2cfast");
864 if (s && ((*s == 'y') || (*s == 'Y'))) {
865 bd->bi_iic_fast[0] = 1;
866 bd->bi_iic_fast[1] = 1;
867 } else {
868 bd->bi_iic_fast[0] = 0;
869 bd->bi_iic_fast[1] = 0;
870 }
871 }
872 #else
873 bd->bi_iic_fast[0] = 0;
874 bd->bi_iic_fast[1] = 0;
875 #endif /* CONFIG_I2CFAST */
876 #endif /* CONFIG_405GP, CONFIG_405EP */
877 #endif /* CFG_EXTBDINFO */
878
879 #if defined(CONFIG_SC3)
880 sc3_read_eeprom();
881 #endif
882
883 #if defined (CFG_ID_EEPROM) || defined (CFG_I2C_MAC_OFFSET)
884 mac_read_from_eeprom();
885 #endif
886
887 s = getenv ("ethaddr");
888 #if defined (CONFIG_MBX) || \
889 defined (CONFIG_RPXCLASSIC) || \
890 defined(CONFIG_IAD210) || \
891 defined(CONFIG_V38B)
892 if (s == NULL)
893 board_get_enetaddr (bd->bi_enetaddr);
894 else
895 #endif
896 for (i = 0; i < 6; ++i) {
897 bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
898 if (s)
899 s = (*e) ? e + 1 : e;
900 }
901 #ifdef CONFIG_HERMES
902 if ((gd->board_type >> 16) == 2)
903 bd->bi_ethspeed = gd->board_type & 0xFFFF;
904 else
905 bd->bi_ethspeed = 0xFFFF;
906 #endif
907
908 #ifdef CONFIG_NX823
909 load_sernum_ethaddr ();
910 #endif
911
912 #ifdef CONFIG_HAS_ETH1
913 /* handle the 2nd ethernet address */
914
915 s = getenv ("eth1addr");
916
917 for (i = 0; i < 6; ++i) {
918 bd->bi_enet1addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
919 if (s)
920 s = (*e) ? e + 1 : e;
921 }
922 #endif
923 #ifdef CONFIG_HAS_ETH2
924 /* handle the 3rd ethernet address */
925
926 s = getenv ("eth2addr");
927 #if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF)
928 if (s == NULL)
929 board_get_enetaddr(bd->bi_enet2addr);
930 else
931 #endif
932 for (i = 0; i < 6; ++i) {
933 bd->bi_enet2addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
934 if (s)
935 s = (*e) ? e + 1 : e;
936 }
937 #endif
938
939 #ifdef CONFIG_HAS_ETH3
940 /* handle 4th ethernet address */
941 s = getenv("eth3addr");
942 #if defined(CONFIG_XPEDITE1K) || defined(CONFIG_METROBOX) || defined(CONFIG_KAREF)
943 if (s == NULL)
944 board_get_enetaddr(bd->bi_enet3addr);
945 else
946 #endif
947 for (i = 0; i < 6; ++i) {
948 bd->bi_enet3addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
949 if (s)
950 s = (*e) ? e + 1 : e;
951 }
952 #endif
953
954 #if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \
955 defined(CONFIG_TQM8272) || \
956 defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || \
957 defined(CONFIG_KUP4X) || defined(CONFIG_PCS440EP)
958 load_sernum_ethaddr ();
959 #endif
960 /* IP Address */
961 bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
962
963 WATCHDOG_RESET ();
964
965 #if defined(CONFIG_PCI) && !defined(CONFIG_BAB7xx) && !defined(CONFIG_CPC45)
966 /*
967 * Do pci configuration
968 */
969 pci_init ();
970 #endif
971
972 /** leave this here (after malloc(), environment and PCI are working) **/
973 /* Initialize devices */
974 devices_init ();
975
976 /* Initialize the jump table for applications */
977 jumptable_init ();
978
979 #if defined(CONFIG_API)
980 /* Initialize API */
981 api_init ();
982 #endif
983
984 /* Initialize the console (after the relocation and devices init) */
985 console_init_r ();
986
987 #if defined(CONFIG_CCM) || \
988 defined(CONFIG_COGENT) || \
989 defined(CONFIG_CPCI405) || \
990 defined(CONFIG_EVB64260) || \
991 defined(CONFIG_KUP4K) || \
992 defined(CONFIG_KUP4X) || \
993 defined(CONFIG_LWMON) || \
994 defined(CONFIG_PCU_E) || \
995 defined(CONFIG_SC3) || \
996 defined(CONFIG_W7O) || \
997 defined(CONFIG_MISC_INIT_R)
998 /* miscellaneous platform dependent initialisations */
999 misc_init_r ();
1000 #endif
1001
1002 #ifdef CONFIG_HERMES
1003 if (bd->bi_ethspeed != 0xFFFF)
1004 hermes_start_lxt980 ((int) bd->bi_ethspeed);
1005 #endif
1006
1007 #if defined(CONFIG_CMD_KGDB)
1008 WATCHDOG_RESET ();
1009 puts ("KGDB: ");
1010 kgdb_init ();
1011 #endif
1012
1013 debug ("U-Boot relocated to %08lx\n", dest_addr);
1014
1015 /*
1016 * Enable Interrupts
1017 */
1018 interrupt_init ();
1019
1020 /* Must happen after interrupts are initialized since
1021 * an irq handler gets installed
1022 */
1023 #ifdef CONFIG_SERIAL_SOFTWARE_FIFO
1024 serial_buffered_init();
1025 #endif
1026
1027 #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
1028 status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
1029 #endif
1030
1031 udelay (20);
1032
1033 set_timer (0);
1034
1035 /* Initialize from environment */
1036 if ((s = getenv ("loadaddr")) != NULL) {
1037 load_addr = simple_strtoul (s, NULL, 16);
1038 }
1039 #if defined(CONFIG_CMD_NET)
1040 if ((s = getenv ("bootfile")) != NULL) {
1041 copy_filename (BootFile, s, sizeof (BootFile));
1042 }
1043 #endif
1044
1045 WATCHDOG_RESET ();
1046
1047 #if defined(CONFIG_CMD_SCSI)
1048 WATCHDOG_RESET ();
1049 puts ("SCSI: ");
1050 scsi_init ();
1051 #endif
1052
1053 #if defined(CONFIG_CMD_DOC)
1054 WATCHDOG_RESET ();
1055 puts ("DOC: ");
1056 doc_init ();
1057 #endif
1058
1059 #if defined(CONFIG_CMD_NET)
1060 #if defined(CONFIG_NET_MULTI)
1061 WATCHDOG_RESET ();
1062 puts ("Net: ");
1063 #endif
1064 eth_initialize (bd);
1065 #endif
1066
1067 #if defined(CONFIG_CMD_NET) && ( \
1068 defined(CONFIG_CCM) || \
1069 defined(CONFIG_ELPT860) || \
1070 defined(CONFIG_EP8260) || \
1071 defined(CONFIG_IP860) || \
1072 defined(CONFIG_IVML24) || \
1073 defined(CONFIG_IVMS8) || \
1074 defined(CONFIG_MPC8260ADS) || \
1075 defined(CONFIG_MPC8266ADS) || \
1076 defined(CONFIG_MPC8560ADS) || \
1077 defined(CONFIG_PCU_E) || \
1078 defined(CONFIG_RPXSUPER) || \
1079 defined(CONFIG_STXGP3) || \
1080 defined(CONFIG_SPD823TS) || \
1081 defined(CONFIG_RESET_PHY_R) )
1082
1083 WATCHDOG_RESET ();
1084 debug ("Reset Ethernet PHY\n");
1085 reset_phy ();
1086 #endif
1087
1088 #ifdef CONFIG_POST
1089 post_run (NULL, POST_RAM | post_bootmode_get(0));
1090 #endif
1091
1092 #if defined(CONFIG_CMD_PCMCIA) \
1093 && !defined(CONFIG_CMD_IDE)
1094 WATCHDOG_RESET ();
1095 puts ("PCMCIA:");
1096 pcmcia_init ();
1097 #endif
1098
1099 #if defined(CONFIG_CMD_IDE)
1100 WATCHDOG_RESET ();
1101 # ifdef CONFIG_IDE_8xx_PCCARD
1102 puts ("PCMCIA:");
1103 # else
1104 puts ("IDE: ");
1105 #endif
1106 #if defined(CONFIG_START_IDE)
1107 if (board_start_ide())
1108 ide_init ();
1109 #else
1110 ide_init ();
1111 #endif
1112 #endif
1113
1114 #if defined(CONFIG_CMD_SATA)
1115 puts ("SATA: ");
1116 sata_initialize ();
1117 #endif
1118
1119 #ifdef CONFIG_LAST_STAGE_INIT
1120 WATCHDOG_RESET ();
1121 /*
1122 * Some parts can be only initialized if all others (like
1123 * Interrupts) are up and running (i.e. the PC-style ISA
1124 * keyboard).
1125 */
1126 last_stage_init ();
1127 #endif
1128
1129 #if defined(CONFIG_CMD_BEDBUG)
1130 WATCHDOG_RESET ();
1131 bedbug_init ();
1132 #endif
1133
1134 #if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
1135 /*
1136 * Export available size of memory for Linux,
1137 * taking into account the protected RAM at top of memory
1138 */
1139 {
1140 ulong pram;
1141 uchar memsz[32];
1142 #ifdef CONFIG_PRAM
1143 char *s;
1144
1145 if ((s = getenv ("pram")) != NULL) {
1146 pram = simple_strtoul (s, NULL, 10);
1147 } else {
1148 pram = CONFIG_PRAM;
1149 }
1150 #else
1151 pram=0;
1152 #endif
1153 #ifdef CONFIG_LOGBUFFER
1154 #ifndef CONFIG_ALT_LB_ADDR
1155 /* Also take the logbuffer into account (pram is in kB) */
1156 pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024;
1157 #endif
1158 #endif
1159 sprintf ((char *)memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
1160 setenv ("mem", (char *)memsz);
1161 }
1162 #endif
1163
1164 #ifdef CONFIG_PS2KBD
1165 puts ("PS/2: ");
1166 kbd_init();
1167 #endif
1168
1169 #ifdef CONFIG_MODEM_SUPPORT
1170 {
1171 extern int do_mdm_init;
1172 do_mdm_init = gd->do_mdm_init;
1173 }
1174 #endif
1175
1176 /* Initialization complete - start the monitor */
1177
1178 /* main_loop() can return to retry autoboot, if so just run it again. */
1179 for (;;) {
1180 WATCHDOG_RESET ();
1181 main_loop ();
1182 }
1183
1184 /* NOTREACHED - no way out of command loop except booting */
1185 }
1186
1187 void hang (void)
1188 {
1189 puts ("### ERROR ### Please RESET the board ###\n");
1190 show_boot_progress(-30);
1191 for (;;);
1192 }
1193
1194 #ifdef CONFIG_MODEM_SUPPORT
1195 /* called from main loop (common/main.c) */
1196 /* 'inline' - We have to do it fast */
1197 static inline void mdm_readline(char *buf, int bufsiz)
1198 {
1199 char c;
1200 char *p;
1201 int n;
1202
1203 n = 0;
1204 p = buf;
1205 for(;;) {
1206 c = serial_getc();
1207
1208 /* dbg("(%c)", c); */
1209
1210 switch(c) {
1211 case '\r':
1212 break;
1213 case '\n':
1214 *p = '\0';
1215 return;
1216
1217 default:
1218 if(n++ > bufsiz) {
1219 *p = '\0';
1220 return; /* sanity check */
1221 }
1222 *p = c;
1223 p++;
1224 break;
1225 }
1226 }
1227 }
1228
1229 extern void dbg(const char *fmt, ...);
1230 int mdm_init (void)
1231 {
1232 char env_str[16];
1233 char *init_str;
1234 int i;
1235 extern char console_buffer[];
1236 extern void enable_putc(void);
1237 extern int hwflow_onoff(int);
1238
1239 enable_putc(); /* enable serial_putc() */
1240
1241 #ifdef CONFIG_HWFLOW
1242 init_str = getenv("mdm_flow_control");
1243 if (init_str && (strcmp(init_str, "rts/cts") == 0))
1244 hwflow_onoff (1);
1245 else
1246 hwflow_onoff(-1);
1247 #endif
1248
1249 for (i = 1;;i++) {
1250 sprintf(env_str, "mdm_init%d", i);
1251 if ((init_str = getenv(env_str)) != NULL) {
1252 serial_puts(init_str);
1253 serial_puts("\n");
1254 for(;;) {
1255 mdm_readline(console_buffer, CFG_CBSIZE);
1256 dbg("ini%d: [%s]", i, console_buffer);
1257
1258 if ((strcmp(console_buffer, "OK") == 0) ||
1259 (strcmp(console_buffer, "ERROR") == 0)) {
1260 dbg("ini%d: cmd done", i);
1261 break;
1262 } else /* in case we are originating call ... */
1263 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1264 dbg("ini%d: connect", i);
1265 return 0;
1266 }
1267 }
1268 } else
1269 break; /* no init string - stop modem init */
1270
1271 udelay(100000);
1272 }
1273
1274 udelay(100000);
1275
1276 /* final stage - wait for connect */
1277 for(;i > 1;) { /* if 'i' > 1 - wait for connection
1278 message from modem */
1279 mdm_readline(console_buffer, CFG_CBSIZE);
1280 dbg("ini_f: [%s]", console_buffer);
1281 if (strncmp(console_buffer, "CONNECT", 7) == 0) {
1282 dbg("ini_f: connected");
1283 return 0;
1284 }
1285 }
1286
1287 return 0;
1288 }
1289
1290 #endif
1291
1292 #if 0 /* We could use plain global data, but the resulting code is bigger */
1293 /*
1294 * Pointer to initial global data area
1295 *
1296 * Here we initialize it.
1297 */
1298 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
1299 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
1300 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
1301 #endif /* 0 */
1302
1303 /************************************************************************/