2 * NAND boot for Freescale Enhanced Local Bus Controller, Flash Control Machine
4 * (C) Copyright 2006-2008
5 * Stefan Roese, DENX Software Engineering, sr@denx.de.
7 * Copyright (c) 2008 Freescale Semiconductor, Inc.
8 * Author: Scott Wood <scottwood@freescale.com>
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include <asm/immap_83xx.h>
29 #include <asm/fsl_lbc.h>
30 #include <linux/mtd/nand.h>
32 #define WINDOW_SIZE 8192
34 static void nand_wait(void)
36 fsl_lbus_t
*regs
= (fsl_lbus_t
*)(CONFIG_SYS_IMMR
+ 0x5000);
39 uint32_t status
= in_be32(®s
->ltesr
);
45 puts("read failed (ltesr)\n");
51 static void nand_load(unsigned int offs
, int uboot_size
, uchar
*dst
)
53 fsl_lbus_t
*regs
= (fsl_lbus_t
*)(CONFIG_SYS_IMMR
+ 0x5000);
54 uchar
*buf
= (uchar
*)CONFIG_SYS_NAND_BASE
;
55 int large
= in_be32(®s
->bank
[0].or) & OR_FCM_PGS
;
56 int block_shift
= large
? 17 : 14;
57 int block_size
= 1 << block_shift
;
58 int page_size
= large
? 2048 : 512;
59 int bad_marker
= large
? page_size
+ 0 : page_size
+ 5;
60 int fmr
= (15 << FMR_CWTO_SHIFT
) | (2 << FMR_AL_SHIFT
) | 2;
63 if (offs
& (block_size
- 1)) {
70 out_be32(®s
->fcr
, (NAND_CMD_READ0
<< FCR_CMD0_SHIFT
) |
71 (NAND_CMD_READSTART
<< FCR_CMD1_SHIFT
));
73 (FIR_OP_CW0
<< FIR_OP0_SHIFT
) |
74 (FIR_OP_CA
<< FIR_OP1_SHIFT
) |
75 (FIR_OP_PA
<< FIR_OP2_SHIFT
) |
76 (FIR_OP_CW1
<< FIR_OP3_SHIFT
) |
77 (FIR_OP_RBW
<< FIR_OP4_SHIFT
));
79 out_be32(®s
->fcr
, NAND_CMD_READ0
<< FCR_CMD0_SHIFT
);
81 (FIR_OP_CW0
<< FIR_OP0_SHIFT
) |
82 (FIR_OP_CA
<< FIR_OP1_SHIFT
) |
83 (FIR_OP_PA
<< FIR_OP2_SHIFT
) |
84 (FIR_OP_RBW
<< FIR_OP3_SHIFT
));
87 out_be32(®s
->fbcr
, 0);
88 clrsetbits_be32(®s
->bank
[0].br
, BR_DECC
, BR_DECC_CHK_GEN
);
90 while (pos
< uboot_size
) {
92 out_be32(®s
->fbar
, offs
>> block_shift
);
96 unsigned int page_offs
= (offs
& (block_size
- 1)) << 1;
98 out_be32(®s
->ltesr
, ~0);
99 out_be32(®s
->lteatr
, 0);
100 out_be32(®s
->fpar
, page_offs
);
101 out_be32(®s
->fmr
, fmr
);
102 out_be32(®s
->lsor
, 0);
105 page_offs
%= WINDOW_SIZE
;
108 * If either of the first two pages are marked bad,
109 * continue to the next block.
111 if (i
++ < 2 && buf
[page_offs
+ bad_marker
] != 0xff) {
113 offs
= (offs
+ block_size
) & ~(block_size
- 1);
114 pos
&= ~(block_size
- 1);
118 for (j
= 0; j
< page_size
; j
++)
119 dst
[pos
+ j
] = buf
[page_offs
+ j
];
123 } while ((offs
& (block_size
- 1)) && (pos
< uboot_size
));
128 * The main entry for NAND booting. It's necessary that SDRAM is already
129 * configured and available since this code loads the main U-Boot image
130 * from NAND into SDRAM and starts it from there.
134 __attribute__((noreturn
)) void (*uboot
)(void);
137 * Load U-Boot image from NAND into RAM
139 nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS
, CONFIG_SYS_NAND_U_BOOT_SIZE
,
140 (uchar
*)CONFIG_SYS_NAND_U_BOOT_DST
);
143 * Jump to U-Boot image
145 puts("transfering control\n");
147 * Clean d-cache and invalidate i-cache, to
148 * make sure that no stale data is executed.
150 flush_cache(CONFIG_SYS_NAND_U_BOOT_DST
, CONFIG_SYS_NAND_U_BOOT_SIZE
);
151 uboot
= (void *)CONFIG_SYS_NAND_U_BOOT_START
;