2 * NAND boot for Freescale Enhanced Local Bus Controller, Flash Control Machine
4 * (C) Copyright 2006-2008
5 * Stefan Roese, DENX Software Engineering, sr@denx.de.
7 * Copyright (c) 2008 Freescale Semiconductor, Inc.
8 * Author: Scott Wood <scottwood@freescale.com>
10 * SPDX-License-Identifier: GPL-2.0+
15 #include <asm/fsl_lbc.h>
16 #include <linux/mtd/nand.h>
18 #define WINDOW_SIZE 8192
20 static void nand_wait(void)
22 fsl_lbc_t
*regs
= LBC_BASE_ADDR
;
25 uint32_t status
= in_be32(®s
->ltesr
);
31 puts("read failed (ltesr)\n");
37 static void nand_load(unsigned int offs
, int uboot_size
, uchar
*dst
)
39 fsl_lbc_t
*regs
= LBC_BASE_ADDR
;
40 uchar
*buf
= (uchar
*)CONFIG_SYS_NAND_BASE
;
41 const int large
= CONFIG_SYS_NAND_OR_PRELIM
& OR_FCM_PGS
;
42 const int block_shift
= large
? 17 : 14;
43 const int block_size
= 1 << block_shift
;
44 const int page_size
= large
? 2048 : 512;
45 const int bad_marker
= large
? page_size
+ 0 : page_size
+ 5;
46 int fmr
= (15 << FMR_CWTO_SHIFT
) | (2 << FMR_AL_SHIFT
) | 2;
49 if (offs
& (block_size
- 1)) {
56 __raw_writel((NAND_CMD_READ0
<< FCR_CMD0_SHIFT
) |
57 (NAND_CMD_READSTART
<< FCR_CMD1_SHIFT
),
60 (FIR_OP_CW0
<< FIR_OP0_SHIFT
) |
61 (FIR_OP_CA
<< FIR_OP1_SHIFT
) |
62 (FIR_OP_PA
<< FIR_OP2_SHIFT
) |
63 (FIR_OP_CW1
<< FIR_OP3_SHIFT
) |
64 (FIR_OP_RBW
<< FIR_OP4_SHIFT
),
67 __raw_writel(NAND_CMD_READ0
<< FCR_CMD0_SHIFT
, ®s
->fcr
);
69 (FIR_OP_CW0
<< FIR_OP0_SHIFT
) |
70 (FIR_OP_CA
<< FIR_OP1_SHIFT
) |
71 (FIR_OP_PA
<< FIR_OP2_SHIFT
) |
72 (FIR_OP_RBW
<< FIR_OP3_SHIFT
),
76 __raw_writel(0, ®s
->fbcr
);
78 while (pos
< uboot_size
) {
80 __raw_writel(offs
>> block_shift
, ®s
->fbar
);
84 unsigned int page_offs
= (offs
& (block_size
- 1)) << 1;
86 __raw_writel(~0, ®s
->ltesr
);
87 __raw_writel(0, ®s
->lteatr
);
88 __raw_writel(page_offs
, ®s
->fpar
);
89 __raw_writel(fmr
, ®s
->fmr
);
91 __raw_writel(0, ®s
->lsor
);
94 page_offs
%= WINDOW_SIZE
;
97 * If either of the first two pages are marked bad,
98 * continue to the next block.
100 if (i
++ < 2 && buf
[page_offs
+ bad_marker
] != 0xff) {
102 offs
= (offs
+ block_size
) & ~(block_size
- 1);
103 pos
&= ~(block_size
- 1);
107 for (j
= 0; j
< page_size
; j
++)
108 dst
[pos
+ j
] = buf
[page_offs
+ j
];
112 } while ((offs
& (block_size
- 1)) && (pos
< uboot_size
));
117 * The main entry for NAND booting. It's necessary that SDRAM is already
118 * configured and available since this code loads the main U-Boot image
119 * from NAND into SDRAM and starts it from there.
123 __attribute__((noreturn
)) void (*uboot
)(void);
126 * Load U-Boot image from NAND into RAM
128 nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS
, CONFIG_SYS_NAND_U_BOOT_SIZE
,
129 (uchar
*)CONFIG_SYS_NAND_U_BOOT_DST
);
132 * Jump to U-Boot image
134 puts("transfering control\n");
136 * Clean d-cache and invalidate i-cache, to
137 * make sure that no stale data is executed.
139 flush_cache(CONFIG_SYS_NAND_U_BOOT_DST
, CONFIG_SYS_NAND_U_BOOT_SIZE
);
140 uboot
= (void *)CONFIG_SYS_NAND_U_BOOT_START
;