nand_spl/nand_boot_fsl_nfc.c

   1 /*
   2  * (C) Copyright 2009
   3  * Magnus Lilja <lilja.magnus@gmail.com>
   4  *
   5  * (C) Copyright 2008
   6  * Maxim Artamonov, <scn1874 at yandex.ru>
   7  *
   8  * (C) Copyright 2006-2008
   9  * Stefan Roese, DENX Software Engineering, sr at denx.de.
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation; either version 2 of
  14  * the License, or (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24  * MA 02111-1307 USA
  25  */
  26
  27 #include <common.h>
  28 #include <nand.h>
  29 #include <asm/arch/imx-regs.h>
  30 #include <asm/io.h>
  31 #include <fsl_nfc.h>
  32
  33 static struct fsl_nfc_regs *const nfc = (void *)NFC_BASE_ADDR;
  34
  35 static void nfc_wait_ready(void)
  36 {
  37         uint32_t tmp;
  38
  39         while (!(readw(&nfc->config2) & NFC_INT))
  40                 ;
  41
  42         /* Reset interrupt flag */
  43         tmp = readw(&nfc->config2);
  44         tmp &= ~NFC_INT;
  45         writew(tmp, &nfc->config2);
  46 }
  47
  48 static void nfc_nand_init(void)
  49 {
  50 #if defined(MXC_NFC_V2_1)
  51         int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
  52         int config1;
  53
  54         writew(CONFIG_SYS_NAND_SPARE_SIZE / 2, &nfc->spare_area_size);
  55
  56         /* unlocking RAM Buff */
  57         writew(0x2, &nfc->config);
  58
  59         /* hardware ECC checking and correct */
  60         config1 = readw(&nfc->config1) | NFC_ECC_EN | NFC_INT_MSK |
  61                         NFC_ONE_CYCLE | NFC_FP_INT;
  62         /*
  63          * if spare size is larger that 16 bytes per 512 byte hunk
  64          * then use 8 symbol correction instead of 4
  65          */
  66         if (CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16)
  67                 config1 &= ~NFC_4_8N_ECC;
  68         else
  69                 config1 |= NFC_4_8N_ECC;
  70         writew(config1, &nfc->config1);
  71 #elif defined(MXC_NFC_V1)
  72         /* unlocking RAM Buff */
  73         writew(0x2, &nfc->config);
  74
  75         /* hardware ECC checking and correct */
  76         writew(NFC_ECC_EN | NFC_INT_MSK, &nfc->config1);
  77 #endif
  78 }
  79
  80 static void nfc_nand_command(unsigned short command)
  81 {
  82         writew(command, &nfc->flash_cmd);
  83         writew(NFC_CMD, &nfc->config2);
  84         nfc_wait_ready();
  85 }
  86
  87 static void nfc_nand_address(unsigned short address)
  88 {
  89         writew(address, &nfc->flash_addr);
  90         writew(NFC_ADDR, &nfc->config2);
  91         nfc_wait_ready();
  92 }
  93
  94 static void nfc_nand_page_address(unsigned int page_address)
  95 {
  96         unsigned int page_count;
  97
  98         nfc_nand_address(0x00);
  99
 100         /* code only for large page flash */
 101         if (CONFIG_SYS_NAND_PAGE_SIZE > 512)
 102                 nfc_nand_address(0x00);
 103
 104         page_count = CONFIG_SYS_NAND_SIZE / CONFIG_SYS_NAND_PAGE_SIZE;
 105
 106         if (page_address <= page_count) {
 107                 page_count--; /* transform 0x01000000 to 0x00ffffff */
 108                 do {
 109                         nfc_nand_address(page_address & 0xff);
 110                         page_address = page_address >> 8;
 111                         page_count = page_count >> 8;
 112                 } while (page_count);
 113         }
 114
 115         nfc_nand_address(0x00);
 116 }
 117
 118 static void nfc_nand_data_output(void)
 119 {
 120 #ifdef NAND_MXC_2K_MULTI_CYCLE
 121         int i;
 122 #endif
 123
 124         writew(0, &nfc->buf_addr);
 125         writew(NFC_OUTPUT, &nfc->config2);
 126         nfc_wait_ready();
 127 #ifdef NAND_MXC_2K_MULTI_CYCLE
 128         /*
 129          * This NAND controller requires multiple input commands
 130          * for pages larger than 512 bytes.
 131          */
 132         for (i = 1; i < CONFIG_SYS_NAND_PAGE_SIZE / 512; i++) {
 133                 writew(i, &nfc->buf_addr);
 134                 writew(NFC_OUTPUT, &nfc->config2);
 135                 nfc_wait_ready();
 136         }
 137 #endif
 138 }
 139
 140 static int nfc_nand_check_ecc(void)
 141 {
 142 #if defined(MXC_NFC_V1)
 143         u16 ecc_status = readw(&nfc->ecc_status_result);
 144         return (ecc_status & 0x3) == 2 || (ecc_status >> 2) == 2;
 145 #elif defined(MXC_NFC_V2_1)
 146         u32 ecc_status = readl(&nfc->ecc_status_result);
 147         int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
 148         int err_limit = CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16 ? 8 : 4;
 149         int subpages = CONFIG_SYS_NAND_PAGE_SIZE / 512;
 150
 151         do {
 152                 if ((ecc_status & 0xf) > err_limit)
 153                         return 1;
 154                 ecc_status >>= 4;
 155         } while (--subpages);
 156
 157         return 0;
 158 #endif
 159 }
 160
 161 static void nfc_nand_read_page(unsigned int page_address)
 162 {
 163         writew(0, &nfc->buf_addr); /* read in first 0 buffer */
 164         nfc_nand_command(NAND_CMD_READ0);
 165         nfc_nand_page_address(page_address);
 166
 167         if (CONFIG_SYS_NAND_PAGE_SIZE > 512)
 168                 nfc_nand_command(NAND_CMD_READSTART);
 169
 170         nfc_nand_data_output(); /* fill the main buffer 0 */
 171 }
 172
 173 static int nfc_read_page(unsigned int page_address, unsigned char *buf)
 174 {
 175         int i;
 176         u32 *src;
 177         u32 *dst;
 178
 179         nfc_nand_read_page(page_address);
 180
 181         if (nfc_nand_check_ecc())
 182                 return -1;
 183
 184         src = (u32 *)&nfc->main_area[0][0];
 185         dst = (u32 *)buf;
 186
 187         /* main copy loop from NAND-buffer to SDRAM memory */
 188         for (i = 0; i < CONFIG_SYS_NAND_PAGE_SIZE / 4; i++) {
 189                 writel(readl(src), dst);
 190                 src++;
 191                 dst++;
 192         }
 193
 194         return 0;
 195 }
 196
 197 static int is_badblock(int pagenumber)
 198 {
 199         int page = pagenumber;
 200         u32 badblock;
 201         u32 *src;
 202
 203         /* Check the first two pages for bad block markers */
 204         for (page = pagenumber; page < pagenumber + 2; page++) {
 205                 nfc_nand_read_page(page);
 206
 207                 src = (u32 *)&nfc->spare_area[0][0];
 208
 209                 /*
 210                  * IMPORTANT NOTE: The nand flash controller uses a non-
 211                  * standard layout for large page devices. This can
 212                  * affect the position of the bad block marker.
 213                  */
 214                 /* Get the bad block marker */
 215                 badblock = readl(&src[CONFIG_SYS_NAND_BAD_BLOCK_POS / 4]);
 216                 badblock >>= 8 * (CONFIG_SYS_NAND_BAD_BLOCK_POS % 4);
 217                 badblock &= 0xff;
 218
 219                 /* bad block marker verify */
 220                 if (badblock != 0xff)
 221                         return 1; /* potential bad block */
 222         }
 223
 224         return 0;
 225 }
 226
 227 static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)
 228 {
 229         int i;
 230         unsigned int page;
 231         unsigned int maxpages = CONFIG_SYS_NAND_SIZE /
 232                                 CONFIG_SYS_NAND_PAGE_SIZE;
 233
 234         nfc_nand_init();
 235
 236         /* Convert to page number */
 237         page = from / CONFIG_SYS_NAND_PAGE_SIZE;
 238         i = 0;
 239
 240         while (i < size / CONFIG_SYS_NAND_PAGE_SIZE) {
 241                 if (nfc_read_page(page, buf) < 0)
 242                         return -1;
 243
 244                 page++;
 245                 i++;
 246                 buf = buf + CONFIG_SYS_NAND_PAGE_SIZE;
 247
 248                 /*
 249                  * Check if we have crossed a block boundary, and if so
 250                  * check for bad block.
 251                  */
 252                 if (!(page % CONFIG_SYS_NAND_PAGE_COUNT)) {
 253                         /*
 254                          * Yes, new block. See if this block is good. If not,
 255                          * loop until we find a good block.
 256                          */
 257                         while (is_badblock(page)) {
 258                                 page = page + CONFIG_SYS_NAND_PAGE_COUNT;
 259                                 /* Check i we've reached the end of flash. */
 260                                 if (page >= maxpages)
 261                                         return -1;
 262                         }
 263                 }
 264         }
 265
 266         return 0;
 267 }
 268
 269 #if defined(CONFIG_ARM)
 270 void board_init_f (ulong bootflag)
 271 {
 272         relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL,
 273                        CONFIG_SYS_TEXT_BASE);
 274 }
 275 #endif
 276
 277 /*
 278  * The main entry for NAND booting. It's necessary that SDRAM is already
 279  * configured and available since this code loads the main U-Boot image
 280  * from NAND into SDRAM and starts it from there.
 281  */
 282 void nand_boot(void)
 283 {
 284         __attribute__((noreturn)) void (*uboot)(void);
 285
 286         /*
 287          * CONFIG_SYS_NAND_U_BOOT_OFFS and CONFIG_SYS_NAND_U_BOOT_SIZE must
 288          * be aligned to full pages
 289          */
 290         if (!nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
 291                        (uchar *)CONFIG_SYS_NAND_U_BOOT_DST)) {
 292                 /* Copy from NAND successful, start U-boot */
 293                 uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
 294                 uboot();
 295         } else {
 296                 /* Unrecoverable error when copying from NAND */
 297                 hang();
 298         }
 299 }
 300
 301 /*
 302  * Called in case of an exception.
 303  */
 304 void hang(void)
 305 {
 306         /* Loop forever */
 307         while (1) ;
 308 }