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[thirdparty/binutils-gdb.git] / opcodes / csky-opc.h
1 /* Declarations for C-SKY opcode table
2 Copyright (C) 2007-2020 Free Software Foundation, Inc.
3 Contributed by C-SKY Microsystems and Mentor Graphics.
4
5 This file is part of the GNU opcodes library.
6
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
11
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
21
22 #include "opcode/csky.h"
23
24 #define OP_TABLE_NUM 2
25 #define MAX_OPRND_NUM 5
26
27 enum operand_type
28 {
29 OPRND_TYPE_NONE = 0,
30 /* Control register. */
31 OPRND_TYPE_CTRLREG,
32 /* r0 - r7. */
33 OPRND_TYPE_GREG0_7,
34 /* r0 - r15. */
35 OPRND_TYPE_GREG0_15,
36 /* r16 - r31. */
37 OPRND_TYPE_GREG16_31,
38 /* r0 - r31. */
39 OPRND_TYPE_AREG,
40 /* (rx). */
41 OPRND_TYPE_AREG_WITH_BRACKET,
42 OPRND_TYPE_AREG_WITH_LSHIFT,
43 OPRND_TYPE_AREG_WITH_LSHIFT_FPU,
44
45 OPRND_TYPE_FREG_WITH_INDEX,
46 /* r1 only, for xtrb0(1)(2)(3) in csky v1 ISA. */
47 OPRND_TYPE_REG_r1a,
48 /* r1 only, for divs/divu in csky v1 ISA. */
49 OPRND_TYPE_REG_r1b,
50 /* r28. */
51 OPRND_TYPE_REG_r28,
52 OPRND_TYPE_REGr4_r7,
53 /* sp register with bracket. */
54 OPRND_TYPE_REGbsp,
55 /* sp register. */
56 OPRND_TYPE_REGsp,
57 /* Register with bracket. */
58 OPRND_TYPE_REGnr4_r7,
59 /* Not sp register. */
60 OPRND_TYPE_REGnsp,
61 /* Not lr register. */
62 OPRND_TYPE_REGnlr,
63 /* Not sp/lr register. */
64 OPRND_TYPE_REGnsplr,
65 /* hi/lo register. */
66 OPRND_TYPE_REGhilo,
67 /* VDSP register. */
68 OPRND_TYPE_VREG,
69
70 /* cp index. */
71 OPRND_TYPE_CPIDX,
72 /* cp regs. */
73 OPRND_TYPE_CPREG,
74 /* cp cregs. */
75 OPRND_TYPE_CPCREG,
76 /* fpu regs. */
77 OPRND_TYPE_FREG,
78 /* fpu even regs. */
79 OPRND_TYPE_FEREG,
80 /* Float round mode. */
81 OPRND_TYPE_RM,
82 /* PSR bits. */
83 OPRND_TYPE_PSR_BITS_LIST,
84
85 /* Constant. */
86 OPRND_TYPE_CONSTANT,
87 /* Floating Constant. */
88 OPRND_TYPE_FCONSTANT,
89 /* Extern lrw constant. */
90 OPRND_TYPE_ELRW_CONSTANT,
91 /* [label]. */
92 OPRND_TYPE_LABEL_WITH_BRACKET,
93 /* The operand is the same as first reg. It is a dummy reg that doesn't
94 appear in the binary code of the instruction. It is also used by
95 the disassembler.
96 For example: bclri rz, rz, imm5 -> bclri rz, imm5. */
97 OPRND_TYPE_DUMMY_REG,
98 /* The type of the operand is same as the first operand. If the value
99 of the operand is same as the first operand, we can use a 16-bit
100 instruction to represent the opcode.
101 For example: addc r1, r1, r2 -> addc16 r1, r2. */
102 OPRND_TYPE_2IN1_DUMMY,
103 /* Output a reg same as the first reg.
104 For example: addc r17, r1 -> addc32 r17, r17, r1.
105 The old "addc" cannot be represented by a 16-bit instruction because
106 16-bit "addc" only supports regs from r0 to r15. So we use "addc32"
107 which has 3 operands, and duplicate the first operand to the second. */
108 OPRND_TYPE_DUP_GREG0_7,
109 OPRND_TYPE_DUP_GREG0_15,
110 OPRND_TYPE_DUP_AREG,
111 /* Immediate. */
112 OPRND_TYPE_IMM1b,
113 OPRND_TYPE_IMM2b,
114 OPRND_TYPE_IMM3b,
115 OPRND_TYPE_IMM4b,
116 OPRND_TYPE_IMM5b,
117 OPRND_TYPE_IMM7b,
118 OPRND_TYPE_IMM8b,
119 OPRND_TYPE_IMM9b,
120 OPRND_TYPE_IMM12b,
121 OPRND_TYPE_IMM15b,
122 OPRND_TYPE_IMM16b,
123 OPRND_TYPE_IMM18b,
124 OPRND_TYPE_IMM32b,
125 /* Immediate left shift 2 bits. */
126 OPRND_TYPE_IMM7b_LS2,
127 OPRND_TYPE_IMM8b_LS2,
128 /* OPRND_TYPE_IMM5b_a_b means: Immediate in (a, b). */
129 OPRND_TYPE_IMM5b_1_31,
130 OPRND_TYPE_IMM5b_7_31,
131 /* Operand type for rori and rotri. */
132 OPRND_TYPE_IMM5b_RORI,
133 OPRND_TYPE_IMM5b_POWER,
134 OPRND_TYPE_IMM5b_7_31_POWER,
135 OPRND_TYPE_IMM5b_BMASKI,
136 OPRND_TYPE_IMM8b_BMASKI,
137 /* For v2 movih. */
138 OPRND_TYPE_IMM16b_MOVIH,
139 /* For v2 ori. */
140 OPRND_TYPE_IMM16b_ORI,
141 /* For v2 ld/st. */
142 OPRND_TYPE_IMM_LDST,
143 OPRND_TYPE_IMM_FLDST,
144 OPRND_TYPE_IMM2b_JMPIX,
145 /* Offset for bloop. */
146 OPRND_TYPE_BLOOP_OFF4b,
147 OPRND_TYPE_BLOOP_OFF12b,
148 /* Offset for jump. */
149 OPRND_TYPE_OFF8b,
150 OPRND_TYPE_OFF10b,
151 OPRND_TYPE_OFF11b,
152 OPRND_TYPE_OFF16b,
153 OPRND_TYPE_OFF16b_LSL1,
154 OPRND_TYPE_OFF26b,
155 /* An immediate or label. */
156 OPRND_TYPE_IMM_OFF18b,
157 /* Offset immediate. */
158 OPRND_TYPE_OIMM3b,
159 OPRND_TYPE_OIMM4b,
160 OPRND_TYPE_OIMM5b,
161 OPRND_TYPE_OIMM8b,
162 OPRND_TYPE_OIMM12b,
163 OPRND_TYPE_OIMM16b,
164 OPRND_TYPE_OIMM18b,
165 /* For csky v2 idly. */
166 OPRND_TYPE_OIMM5b_IDLY,
167 /* For v2 bmaski. */
168 OPRND_TYPE_OIMM5b_BMASKI,
169 /* Constants. */
170 OPRND_TYPE_CONST1,
171 /* PC relative offset. */
172 OPRND_TYPE_PCR_OFFSET_16K,
173 OPRND_TYPE_PCR_OFFSET_64K,
174 OPRND_TYPE_PCR_OFFSET_64M,
175 OPRND_TYPE_CPFUNC,
176 OPRND_TYPE_GOT_PLT,
177 OPRND_TYPE_REGLIST_LDM,
178 OPRND_TYPE_REGLIST_DASH,
179 OPRND_TYPE_FREGLIST_DASH,
180 OPRND_TYPE_REGLIST_COMMA,
181 OPRND_TYPE_REGLIST_DASH_COMMA,
182 OPRND_TYPE_BRACKET,
183 OPRND_TYPE_ABRACKET,
184 OPRND_TYPE_JBTF,
185 OPRND_TYPE_JBR,
186 OPRND_TYPE_JBSR,
187 OPRND_TYPE_UNCOND10b,
188 OPRND_TYPE_UNCOND16b,
189 OPRND_TYPE_COND10b,
190 OPRND_TYPE_COND16b,
191 OPRND_TYPE_JCOMPZ,
192 OPRND_TYPE_LSB2SIZE,
193 OPRND_TYPE_MSB2SIZE,
194 OPRND_TYPE_LSB,
195 OPRND_TYPE_MSB,
196 /* Single float and double float. */
197 OPRND_TYPE_SFLOAT,
198 OPRND_TYPE_DFLOAT,
199 OPRND_TYPE_HFLOAT_FMOVI,
200 OPRND_TYPE_SFLOAT_FMOVI,
201 OPRND_TYPE_DFLOAT_FMOVI,
202 };
203
204 /* Operand descriptors. */
205 struct operand
206 {
207 /* Mask for suboperand. */
208 unsigned int mask;
209 /* Suboperand type. */
210 enum operand_type type;
211 /* Operand shift. */
212 int shift;
213 };
214
215 struct soperand
216 {
217 /* Mask for operand. */
218 unsigned int mask;
219 /* Operand type. */
220 enum operand_type type;
221 /* Operand shift. */
222 int shift;
223 /* Suboperand. */
224 struct operand subs[3];
225 };
226
227 union csky_operand
228 {
229 struct operand oprnds[MAX_OPRND_NUM];
230 struct suboperand1
231 {
232 struct operand oprnd;
233 struct soperand soprnd;
234 } soprnd1;
235 struct suboperand2
236 {
237 struct soperand soprnd;
238 struct operand oprnd;
239 } soprnd2;
240 };
241
242 /* Describe a single instruction encoding. */
243 struct csky_opcode_info
244 {
245 /* How many operands. */
246 long operand_num;
247 /* The instruction opcode. */
248 unsigned int opcode;
249 /* Operand information. */
250 union csky_operand oprnd;
251 };
252
253 /* C-SKY instruction description. Each mnemonic can have multiple
254 16-bit and 32-bit encodings. */
255 struct csky_opcode
256 {
257 /* The instruction name. */
258 const char *mnemonic;
259 /* Whether this is an unconditional control transfer instruction,
260 for the purposes of placing literal pools after it.
261 0 = no, 1 = within function, 2 = end of function.
262 See check_literals in gas/config/tc-csky.c. */
263 int transfer;
264 /* Encodings for 16-bit opcodes. */
265 struct csky_opcode_info op16[OP_TABLE_NUM];
266 /* Encodings for 32-bit opcodes. */
267 struct csky_opcode_info op32[OP_TABLE_NUM];
268 /* Instruction set flag. */
269 BFD_HOST_U_64_BIT isa_flag16;
270 BFD_HOST_U_64_BIT isa_flag32;
271 /* Whether this insn needs relocation, 0: no, !=0: yes. */
272 signed int reloc16;
273 signed int reloc32;
274 /* Whether this insn needs relaxation, 0: no, != 0: yes. */
275 signed int relax;
276 /* Worker function to call when this instruction needs special assembler
277 handling. */
278 bfd_boolean (*work)(void);
279 };
280
281 /* The following are the opcodes used in relax/fix process. */
282 #define CSKYV1_INST_JMPI 0x7000
283 #define CSKYV1_INST_ADDI 0x2000
284 #define CSKYV1_INST_SUBI 0x2400
285 #define CSKYV1_INST_LDW 0x8000
286 #define CSKYV1_INST_STW 0x9000
287 #define CSKYV1_INST_BSR 0xf800
288 #define CSKYV1_INST_LRW 0x7000
289 #define CSKYV1_INST_ADDU 0x1c00
290 #define CSKYV1_INST_JMP 0x00c0
291 #define CSKYV1_INST_MOV_R1_RX 0x1201
292 #define CSKYV1_INST_MOV_RX_R1 0x1210
293
294 #define CSKYV2_INST_BT16 0x0800
295 #define CSKYV2_INST_BF16 0x0c00
296 #define CSKYV2_INST_BT32 0xe8600000
297 #define CSKYV2_INST_BF32 0xe8400000
298 #define CSKYV2_INST_BR32 0xe8000000
299 #define CSKYV2_INST_NOP 0x6c03
300 #define CSKYV2_INST_MOVI16 0x3000
301 #define CSKYV2_INST_MOVI32 0xea000000
302 #define CSKYV2_INST_MOVIH 0xea200000
303 #define CSKYV2_INST_LRW16 0x1000
304 #define CSKYV2_INST_LRW32 0xea800000
305 #define CSKYV2_INST_BSR32 0xe0000000
306 #define CSKYV2_INST_BR32 0xe8000000
307 #define CSKYV2_INST_FLRW 0xf4003800
308 #define CSKYV2_INST_JMPI32 0xeac00000
309 #define CSKYV2_INST_JSRI32 0xeae00000
310 #define CSKYV2_INST_JSRI_TO_LRW 0xea9a0000
311 #define CSKYV2_INST_JSR_R26 0xe8fa0000
312 #define CSKYV2_INST_MOV_R0_R0 0xc4004820
313
314 #define OPRND_SHIFT_0_BIT 0
315 #define OPRND_SHIFT_1_BIT 1
316 #define OPRND_SHIFT_2_BIT 2
317 #define OPRND_SHIFT_3_BIT 3
318 #define OPRND_SHIFT_4_BIT 4
319
320 #define OPRND_MASK_NONE 0x0
321 #define OPRND_MASK_0_1 0x3
322 #define OPRND_MASK_0_2 0x7
323 #define OPRND_MASK_0_3 0xf
324 #define OPRND_MASK_0_4 0x1f
325 #define OPRND_MASK_0_7 0xff
326 #define OPRND_MASK_0_8 0x1ff
327 #define OPRND_MASK_0_9 0x3ff
328 #define OPRND_MASK_0_10 0x7ff
329 #define OPRND_MASK_0_11 0xfff
330 #define OPRND_MASK_0_14 0x7fff
331 #define OPRND_MASK_0_15 0xffff
332 #define OPRND_MASK_0_17 0x3ffff
333 #define OPRND_MASK_0_25 0x3ffffff
334 #define OPRND_MASK_2_4 0x1c
335 #define OPRND_MASK_2_5 0x3c
336 #define OPRND_MASK_3_7 0xf8
337 #define OPRND_MASK_4 0x10
338 #define OPRND_MASK_4_5 0x30
339 #define OPRND_MASK_4_6 0x70
340 #define OPRND_MASK_4_7 0xf0
341 #define OPRND_MASK_4_8 0x1f0
342 #define OPRND_MASK_4_10 0x7f0
343 #define OPRND_MASK_5 0x20
344 #define OPRND_MASK_5_6 0x60
345 #define OPRND_MASK_5_7 0xe0
346 #define OPRND_MASK_5_8 0x1e0
347 #define OPRND_MASK_5_9 0x3e0
348 #define OPRND_MASK_6 0x40
349 #define OPRND_MASK_6_7 0xc0
350 #define OPRND_MASK_6_8 0x1c0
351 #define OPRND_MASK_6_9 0x3c0
352 #define OPRND_MASK_6_10 0x7c0
353 #define OPRND_MASK_7 0x80
354 #define OPRND_MASK_7_8 0x180
355 #define OPRND_MASK_8_9 0x300
356 #define OPRND_MASK_8_10 0x700
357 #define OPRND_MASK_8_11 0xf00
358 #define OPRND_MASK_9_10 0x600
359 #define OPRND_MASK_9_12 0x1e00
360 #define OPRND_MASK_10_11 0xc00
361 #define OPRND_MASK_10_14 0x7c00
362 #define OPRND_MASK_12_15 0xf000
363 #define OPRND_MASK_13_17 0x3e000
364 #define OPRND_MASK_16_19 0xf0000
365 #define OPRND_MASK_16_20 0x1f0000
366 #define OPRND_MASK_16_25 0x3ff0000
367 #define OPRND_MASK_17_24 0x1fe0000
368 #define OPRND_MASK_20 0x0100000
369 #define OPRND_MASK_20_21 0x0300000
370 #define OPRND_MASK_20_22 0x0700000
371 #define OPRND_MASK_20_23 0x0f00000
372 #define OPRND_MASK_20_24 0x1f00000
373 #define OPRND_MASK_20_25 0x3f00000
374 #define OPRND_MASK_21_24 0x1e00000
375 #define OPRND_MASK_21_25 0x3e00000
376 #define OPRND_MASK_25 0x2000000
377 #define OPRND_MASK_RSV 0xffffffff
378 #define OPRND_MASK_0_3or5_8 OPRND_MASK_0_3 | OPRND_MASK_5_8
379 #define OPRND_MASK_0_3or6_7 OPRND_MASK_0_3 | OPRND_MASK_6_7
380 #define OPRND_MASK_0_3or21_24 OPRND_MASK_0_3 | OPRND_MASK_21_24
381 #define OPRND_MASK_0_3or25 OPRND_MASK_0_3 | OPRND_MASK_25
382 #define OPRND_MASK_0_4or21_24 OPRND_MASK_0_4 | OPRND_MASK_21_24
383 #define OPRND_MASK_0_4or21_25 OPRND_MASK_0_4 | OPRND_MASK_21_25
384 #define OPRND_MASK_0_4or16_20 OPRND_MASK_0_4 | OPRND_MASK_16_20
385 #define OPRND_MASK_0_4or8_10 OPRND_MASK_0_4 | OPRND_MASK_8_10
386 #define OPRND_MASK_0_4or8_9 OPRND_MASK_0_4 | OPRND_MASK_8_9
387 #define OPRND_MASK_0_14or16_20 OPRND_MASK_0_14 | OPRND_MASK_16_20
388 #define OPRND_MASK_4or5_8 OPRND_MASK_4 | OPRND_MASK_5_8
389 #define OPRND_MASK_5or20_21 OPRND_MASK_5 | OPRND_MASK_20_21
390 #define OPRND_MASK_5or20_22 OPRND_MASK_5 | OPRND_MASK_20_22
391 #define OPRND_MASK_5or20_23 OPRND_MASK_5 | OPRND_MASK_20_23
392 #define OPRND_MASK_5or20_24 OPRND_MASK_5 | OPRND_MASK_20_24
393 #define OPRND_MASK_5or20_25 OPRND_MASK_5 | OPRND_MASK_20_25
394 #define OPRND_MASK_5or21_24 OPRND_MASK_5 | OPRND_MASK_21_24
395 #define OPRND_MASK_2_5or6_9 OPRND_MASK_2_5 | OPRND_MASK_6_9
396 #define OPRND_MASK_4_6or21_25 OPRND_MASK_4_6 | OPRND_MASK_21_25
397 #define OPRND_MASK_4_7or21_24 OPRND_MASK_4_7 | OPRND_MASK_21_24
398 #define OPRND_MASK_5_6or21_25 OPRND_MASK_5_6 | OPRND_MASK_21_25
399 #define OPRND_MASK_5_7or8_10 OPRND_MASK_5_7 | OPRND_MASK_8_10
400 #define OPRND_MASK_5_9or21_25 OPRND_MASK_5_9 | OPRND_MASK_21_25
401 #define OPRND_MASK_8_9or21_25 OPRND_MASK_8_9 | OPRND_MASK_21_25
402 #define OPRND_MASK_8_9or16_25 OPRND_MASK_8_9 | OPRND_MASK_16_20 | OPRND_MASK_21_25
403 #define OPRND_MASK_16_19or21_24 OPRND_MASK_16_19 | OPRND_MASK_21_24
404 #define OPRND_MASK_16_20or21_25 OPRND_MASK_16_20 | OPRND_MASK_21_25
405 #define OPRND_MASK_4or9_10or25 OPRND_MASK_4 | OPRND_MASK_9_10 | OPRND_MASK_25
406 #define OPRND_MASK_4_7or16_24 OPRND_MASK_4_7 | OPRND_MASK_16_20 | OPRND_MASK_21_24
407 #define OPRND_MASK_4_6or20 OPRND_MASK_4_6 | OPRND_MASK_20
408 #define OPRND_MASK_5_7or20 OPRND_MASK_5_7 | OPRND_MASK_20
409 #define OPRND_MASK_4_5or20or25 OPRND_MASK_4 | OPRND_MASK_5 | OPRND_MASK_20 | OPRND_MASK_25
410 #define OPRND_MASK_4_6or20or25 OPRND_MASK_4_6 | OPRND_MASK_20 | OPRND_MASK_25
411 #define OPRND_MASK_4_7or20or25 OPRND_MASK_4_7 | OPRND_MASK_20 | OPRND_MASK_25
412 #define OPRND_MASK_6_9or17_24 OPRND_MASK_6_9 | OPRND_MASK_17_24
413 #define OPRND_MASK_6_7or20 OPRND_MASK_6_7 | OPRND_MASK_20
414 #define OPRND_MASK_6or20 OPRND_MASK_6 | OPRND_MASK_20
415 #define OPRND_MASK_7or20 OPRND_MASK_7 | OPRND_MASK_20
416 #define OPRND_MASK_5or8_9or16_25 OPRND_MASK_5 | OPRND_MASK_8_9or16_25
417 #define OPRND_MASK_5or8_9or20_25 OPRND_MASK_5 | OPRND_MASK_8_9 | OPRND_MASK_20_25
418
419 #define OPERAND_INFO(mask, type, shift) \
420 {OPRND_MASK_##mask, OPRND_TYPE_##type, shift}
421
422 #define OPCODE_INFO_NONE() \
423 {-2, 0, \
424 {{OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
425 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
426 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
427 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
428 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
429
430 /* Here and in subsequent macros, the "oprnd" arguments are the
431 parenthesized arglist to the OPERAND_INFO macro above. */
432 #define OPCODE_INFO(num, op, oprnd1, oprnd2, oprnd3, oprnd4, oprnd5) \
433 {num, op, \
434 {OPERAND_INFO oprnd1, OPERAND_INFO oprnd2, OPERAND_INFO oprnd3, \
435 OPERAND_INFO oprnd4, OPERAND_INFO oprnd5}}
436
437 #define OPCODE_INFO0(op) \
438 {0, op, \
439 {{OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
440 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
441 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
442 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
443 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
444 #define OPCODE_INFO1(op, oprnd) \
445 {1, op, \
446 {{OPERAND_INFO oprnd, \
447 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
448 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
449 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
450 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
451 #define OPCODE_INFO2(op, oprnd1, oprnd2) \
452 {2, op, \
453 {{OPERAND_INFO oprnd1, \
454 OPERAND_INFO oprnd2, \
455 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
456 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
457 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
458 #define OPCODE_INFO3(op, oprnd1, oprnd2, oprnd3) \
459 {3, op, \
460 {{OPERAND_INFO oprnd1, \
461 OPERAND_INFO oprnd2, \
462 OPERAND_INFO oprnd3, \
463 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
464 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
465 #define OPCODE_INFO4(op, oprnd1, oprnd2, oprnd3, oprnd4) \
466 {4, op, \
467 {{OPERAND_INFO oprnd1, \
468 OPERAND_INFO oprnd2, \
469 OPERAND_INFO oprnd3, \
470 OPERAND_INFO oprnd4, \
471 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
472 #define OPCODE_INFO_LIST(op, oprnd) \
473 {-1, op, \
474 {{OPERAND_INFO oprnd, \
475 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
476 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT) , \
477 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
478 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
479 #define OPCODE_INFO5(op, oprnd1, oprnd2, oprnd3, oprnd4, oprnd5) \
480 {5, op, \
481 {{OPERAND_INFO oprnd1, \
482 OPERAND_INFO oprnd2, \
483 OPERAND_INFO oprnd3, \
484 OPERAND_INFO oprnd4, \
485 OPERAND_INFO oprnd5}}}
486
487 #define BRACKET_OPRND(oprnd1, oprnd2) \
488 OPERAND_INFO (RSV, BRACKET, OPRND_SHIFT_0_BIT), \
489 OPERAND_INFO oprnd1, \
490 OPERAND_INFO oprnd2, \
491 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)
492 #define ABRACKET_OPRND(oprnd1, oprnd2) \
493 OPERAND_INFO (RSV, ABRACKET, OPRND_SHIFT_0_BIT), \
494 OPERAND_INFO oprnd1, \
495 OPERAND_INFO oprnd2, \
496 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)
497
498 #define SOPCODE_INFO1(op, soprnd) \
499 {1, op, \
500 {{soprnd, \
501 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
502 #define SOPCODE_INFO2(op, oprnd, soprnd) \
503 {2, op, \
504 {{OPERAND_INFO oprnd, soprnd}}}
505
506
507 /* Before using the opcode-defining macros, there need to be
508 #defines for _TRANSFER, _RELOC16, _RELOC32, and _RELAX. See
509 below. */
510 /* FIXME: it is a wart that these parameters are not explicit. */
511
512 #define OP16(mnem, opcode16, isa) \
513 {mnem, _TRANSFER, \
514 {opcode16, OPCODE_INFO_NONE ()}, \
515 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
516 isa, 0, _RELOC16, 0, _RELAX, NULL}
517
518 #ifdef BUILD_AS
519
520 #define OP16_WITH_WORK(mnem, opcode16, isa, work) \
521 {mnem, _TRANSFER, \
522 {opcode16, OPCODE_INFO_NONE ()}, \
523 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
524 isa, 0, _RELOC16, 0, _RELAX, work}
525 #define OP32_WITH_WORK(mnem, opcode32, isa, work) \
526 {mnem, _TRANSFER, \
527 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
528 {opcode32, OPCODE_INFO_NONE ()}, \
529 0, isa, 0, _RELOC32, _RELAX, work}
530 #define OP16_OP32_WITH_WORK(mnem, opcode16, isa16, opcode32, isa32, work) \
531 {mnem, _TRANSFER, \
532 {opcode16, OPCODE_INFO_NONE ()}, \
533 {opcode32, OPCODE_INFO_NONE ()}, \
534 isa16, isa32, _RELOC16, _RELOC32, _RELAX, work}
535 #define DOP16_OP32_WITH_WORK(mnem, opcode16a, opcode16b, isa16, opcode32, isa32, work) \
536 {mnem, _TRANSFER, \
537 {opcode16a, opcode16b}, \
538 {opcode32, OPCODE_INFO_NONE ()}, \
539 isa16, isa32, _RELOC16, _RELOC32, _RELAX, work}
540 #define DOP16_DOP32_WITH_WORK(mnem, opcode16a, opcode16b, isa16, opcode32a, opcode32b, isa32, work) \
541 {mnem, _TRANSFER, \
542 {opcode16a, opcode16b}, \
543 {opcode32a, opcode32b}, \
544 isa16, isa32, _RELOC16, _RELOC32, _RELAX, work}
545 #define DOP32_WITH_WORK(mnem, opcode32a, opcode32b, isa, work) \
546 {mnem, _TRANSFER, \
547 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
548 {opcode32a, opcode32b}, \
549 0, isa, 0, _RELOC32, _RELAX, work}
550
551 #else /* ifdef BUILD_AS */
552
553 #define OP16_WITH_WORK(mnem, opcode16, isa, work) \
554 {mnem, _TRANSFER, \
555 {opcode16, OPCODE_INFO_NONE ()}, \
556 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
557 isa, 0, _RELOC16, 0, _RELAX, NULL}
558 #define OP32_WITH_WORK(mnem, opcode32, isa, work) \
559 {mnem, _TRANSFER, \
560 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
561 {opcode32, OPCODE_INFO_NONE ()}, \
562 0, isa, 0, _RELOC32, _RELAX, NULL}
563 #define OP16_OP32_WITH_WORK(mnem, opcode16, isa16, opcode32, isa32, work) \
564 {mnem, _TRANSFER, \
565 {opcode16, OPCODE_INFO_NONE ()}, \
566 {opcode32, OPCODE_INFO_NONE ()}, \
567 isa16, isa32, _RELOC16, _RELOC32, _RELAX, NULL}
568 #define DOP16_OP32_WITH_WORK(mnem, opcode16a, opcode16b, isa16, opcode32, isa32, work) \
569 {mnem, _TRANSFER, \
570 {opcode16a, opcode16b}, \
571 {opcode32, OPCODE_INFO_NONE ()}, \
572 isa16, isa32, _RELOC16, _RELOC32, _RELAX, NULL}
573 #define DOP16_DOP32_WITH_WORK(mnem, opcode16a, opcode16b, isa16, opcode32a, opcode32b, isa32, work) \
574 {mnem, _TRANSFER, \
575 {opcode16a, opcode16b}, \
576 {opcode32a, opcode32b}, \
577 isa16, isa32, _RELOC16, _RELOC32, _RELAX, NULL}
578 #define DOP32_WITH_WORK(mnem, opcode32a, opcode32b, isa, work) \
579 {mnem, _TRANSFER, \
580 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
581 {opcode32a, opcode32b}, \
582 0, isa, 0, _RELOC32, _RELAX, NULL}
583
584 #endif /* ifdef BUILD_AS */
585
586 #define DOP16(mnem, opcode16_1, opcode16_2, isa) \
587 {mnem, _TRANSFER, \
588 {opcode16_1, opcode16_2}, \
589 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
590 isa, 0, _RELOC16, 0, _RELAX, NULL}
591 #define OP32(mnem, opcode32, isa) \
592 {mnem, _TRANSFER, \
593 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
594 {opcode32, OPCODE_INFO_NONE ()}, \
595 0, isa, 0, _RELOC32, _RELAX, NULL}
596 #define DOP32(mnem, opcode32a, opcode32b, isa) \
597 {mnem, _TRANSFER, \
598 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
599 {opcode32a, opcode32b}, \
600 0, isa, 0, _RELOC32, _RELAX, NULL}
601 #define OP16_OP32(mnem, opcode16, isa16, opcode32, isa32) \
602 {mnem, _TRANSFER, \
603 {opcode16, OPCODE_INFO_NONE ()}, \
604 {opcode32, OPCODE_INFO_NONE ()}, \
605 isa16, isa32, _RELOC16, _RELOC32, _RELAX, NULL}
606 #define DOP16_OP32(mnem, opcode16a, opcode16b, isa16, opcode32, isa32) \
607 {mnem, _TRANSFER, \
608 {opcode16a, opcode16b}, \
609 {opcode32, OPCODE_INFO_NONE ()}, \
610 isa16, isa32, _RELOC16, _RELOC32, _RELAX, NULL}
611 #define OP16_DOP32(mnem, opcode16, isa16, opcode32a, opcode32b, isa32) \
612 {mnem, _TRANSFER, \
613 {opcode16, OPCODE_INFO_NONE ()}, \
614 {opcode32a, opcode32b}, \
615 isa16, isa32, _RELOC16, _RELOC32, _RELAX, NULL}
616 #define DOP16_DOP32(mnem, opcode16a, opcode16b, isa16, opcode32a, opcode32b, isa32) \
617 {mnem, _TRANSFER, \
618 {opcode16a, opcode16b}, \
619 {opcode32a, opcode32b}, \
620 isa16, isa32, _RELOC16, _RELOC32, _RELAX, NULL}
621
622
623 /* Register names and numbers. */
624 #define V1_REG_SP 0
625 #define V1_REG_LR 15
626
627 struct csky_reg
628 {
629 const char *name;
630 int index;
631 int flag;
632 };
633
634 const char *csky_general_reg[] =
635 {
636 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
637 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
638 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
639 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
640 NULL,
641 };
642
643 /* TODO: optimize. */
644 const char *cskyv2_general_alias_reg[] =
645 {
646 "a0", "a1", "a2", "a3", "l0", "l1", "l2", "l3",
647 "l4", "l5", "l6", "l7", "t0", "t1", "sp", "lr",
648 "l8", "l9", "t2", "t3", "t4", "t5", "t6", "t7",
649 "t8", "t9", "r26", "r27", "rdb", "gb", "r30", "r31",
650 NULL,
651 };
652
653 /* TODO: optimize. */
654 const char *cskyv1_general_alias_reg[] =
655 {
656 "sp", "r1", "a0", "a1", "a2", "a3", "a4", "a5",
657 "fp", "l0", "l1", "l2", "l3", "l4", "gb", "lr",
658 NULL,
659 };
660
661 /* TODO: optimize. */
662 const char *csky_fpu_reg[] =
663 {
664 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
665 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
666 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23",
667 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31",
668 NULL,
669 };
670
671 /* Control Registers. */
672 struct csky_reg csky_ctrl_regs[] =
673 {
674 {"psr", 0, 0}, {"vbr", 1, 0}, {"epsr", 2, 0}, {"fpsr", 3, 0},
675 {"epc", 4, 0}, {"fpc", 5, 0}, {"ss0", 6, 0}, {"ss1", 7, 0},
676 {"ss2", 8, 0}, {"ss3", 9, 0}, {"ss4", 10, 0}, {"gcr", 11, 0},
677 {"gsr", 12, 0}, {"cpuidr", 13, 0}, {"dcsr", 14, 0}, {"cwr", 15, 0},
678 {"cfr", 16, 0}, {"ccr", 17, 0}, {"capr", 19, 0}, {"pacr", 20, 0},
679 {"rid", 21, 0}, {"sedcr", 8, CSKY_ISA_TRUST}, {"sepcr", 9, CSKY_ISA_TRUST},
680 {NULL, 0, 0}
681 };
682
683 const char *csky_cp_idx[] =
684 {
685 "cp0", "cp1", "cp2", "cp3", "cp4", "cp5", "cp6", "cp7",
686 "cp8", "cp9", "cp10", "cp11", "cp12", "cp13", "cp14", "cp15",
687 "cp16", "cp17", "cp18", "cp19", "cp20",
688 NULL,
689 };
690
691 const char *csky_cp_reg[] =
692 {
693 "cpr0", "cpr1", "cpr2", "cpr3", "cpr4", "cpr5", "cpr6", "cpr7",
694 "cpr8", "cpr9", "cpr10", "cpr11", "cpr12", "cpr13", "cpr14", "cpr15",
695 "cpr16", "cpr17", "cpr18", "cpr19", "cpr20", "cpr21", "cpr22", "cpr23",
696 "cpr24", "cpr25", "cpr26", "cpr27", "cpr28", "cpr29", "cpr30", "cpr31",
697 "cpr32", "cpr33", "cpr34", "cpr35", "cpr36", "cpr37", "cpr38", "cpr39",
698 "cpr40", "cpr41", "cpr42", "cpr43", "cpr44", "cpr45", "cpr46", "cpr47",
699 "cpr48", "cpr49", "cpr50", "cpr51", "cpr52", "cpr53", "cpr54", "cpr55",
700 "cpr56", "cpr57", "cpr58", "cpr59", "cpr60", "cpr61", "cpr62", "cpr63",
701 NULL,
702 };
703
704 const char *csky_cp_creg[] =
705 {
706 "cpcr0", "cpcr1", "cpcr2", "cpcr3",
707 "cpcr4", "cpcr5", "cpcr6", "cpcr7",
708 "cpcr8", "cpcr9", "cpcr10", "cpcr11",
709 "cpcr12", "cpcr13", "cpcr14", "cpcr15",
710 "cpcr16", "cpcr17", "cpcr18", "cpcr19",
711 "cpcr20", "cpcr21", "cpcr22", "cpcr23",
712 "cpcr24", "cpcr25", "cpcr26", "cpcr27",
713 "cpcr28", "cpcr29", "cpcr30", "cpcr31",
714 "cpcr32", "cpcr33", "cpcr34", "cpcr35",
715 "cpcr36", "cpcr37", "cpcr38", "cpcr39",
716 "cpcr40", "cpcr41", "cpcr42", "cpcr43",
717 "cpcr44", "cpcr45", "cpcr46", "cpcr47",
718 "cpcr48", "cpcr49", "cpcr50", "cpcr51",
719 "cpcr52", "cpcr53", "cpcr54", "cpcr55",
720 "cpcr56", "cpcr57", "cpcr58", "cpcr59",
721 "cpcr60", "cpcr61", "cpcr62", "cpcr63",
722 NULL,
723 };
724
725 struct psrbit
726 {
727 int value;
728 int isa;
729 const char *name;
730 };
731 const struct psrbit cskyv1_psr_bits[] =
732 {
733 {1, 0, "ie"},
734 {2, 0, "fe"},
735 {4, 0, "ee"},
736 {8, 0, "af"},
737 {0, 0, NULL},
738 };
739 const struct psrbit cskyv2_psr_bits[] =
740 {
741 {8, 0, "ee"},
742 {4, 0, "ie"},
743 {2, 0, "fe"},
744 {1, 0, "af"},
745 {0x10, CSKY_ISA_TRUST, "sie"},
746 {0, 0, NULL},
747 };
748
749
750 /* C-SKY V1 opcodes. */
751 const struct csky_opcode csky_v1_opcodes[] =
752 {
753 #define _TRANSFER 0
754 #define _RELOC16 0
755 #define _RELOC32 0
756 #define _RELAX 0
757 OP16 ("bkpt",
758 OPCODE_INFO0 (0x0000),
759 CSKYV1_ISA_E1),
760 OP16 ("sync",
761 OPCODE_INFO0 (0x0001),
762 CSKYV1_ISA_E1),
763 #undef _TRANSFER
764 #define _TRANSFER 2
765 OP16 ("rfi",
766 OPCODE_INFO0 (0x0003),
767 CSKYV1_ISA_E1),
768 #undef _TRANSFER
769 #define _TRANSFER 0
770 OP16 ("stop",
771 OPCODE_INFO0 (0x0004),
772 CSKYV1_ISA_E1),
773 OP16 ("wait",
774 OPCODE_INFO0 (0x0005),
775 CSKYV1_ISA_E1),
776 OP16 ("doze",
777 OPCODE_INFO0 (0x0006),
778 CSKYV1_ISA_E1),
779 OP16 ("idly4",
780 OPCODE_INFO0 (0x0007),
781 CSKYV1_ISA_E1),
782 OP16 ("trap",
783 OPCODE_INFO1 (0x0008,
784 (0_1, IMM2b, OPRND_SHIFT_0_BIT)),
785 CSKYV1_ISA_E1),
786 OP16 ("mvtc",
787 OPCODE_INFO0 (0x000c),
788 CSKY_ISA_DSP),
789 OP16 ("cprc",
790 OPCODE_INFO0 (0x000d),
791 CSKY_ISA_CP),
792 OP16 ("cpseti",
793 OPCODE_INFO1 (0x0010,
794 (0_3, CPIDX, OPRND_SHIFT_0_BIT)),
795 CSKY_ISA_CP),
796 OP16 ("mvc",
797 OPCODE_INFO1 (0x0020,
798 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
799 CSKYV1_ISA_E1),
800 OP16 ("mvcv",
801 OPCODE_INFO1 (0x0030,
802 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
803 CSKYV1_ISA_E1),
804 OP16 ("ldq",
805 OPCODE_INFO2 (0x0040,
806 (NONE, REGr4_r7, OPRND_SHIFT_0_BIT),
807 (0_3, REGnr4_r7, OPRND_SHIFT_0_BIT)),
808 CSKYV1_ISA_E1),
809 OP16 ("stq",
810 OPCODE_INFO2 (0x0050,
811 (NONE, REGr4_r7, OPRND_SHIFT_0_BIT),
812 (0_3, REGnr4_r7, OPRND_SHIFT_0_BIT)),
813 CSKYV1_ISA_E1),
814 OP16 ("ldm",
815 OPCODE_INFO2 (0x0060,
816 (0_3, REGLIST_DASH, OPRND_SHIFT_0_BIT),
817 (NONE, REGbsp, OPRND_SHIFT_0_BIT)),
818 CSKYV1_ISA_E1),
819 OP16 ("stm",
820 OPCODE_INFO2 (0x0070,
821 (0_3, REGLIST_DASH, OPRND_SHIFT_0_BIT),
822 (NONE, REGbsp, OPRND_SHIFT_0_BIT)),
823 CSKYV1_ISA_E1),
824 DOP16 ("dect",
825 OPCODE_INFO3 (0x0080,
826 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
827 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
828 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
829 OPCODE_INFO1 (0x0080,
830 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
831 CSKYV1_ISA_E1),
832 DOP16 ("decf",
833 OPCODE_INFO3 (0x0090,
834 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
835 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
836 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
837 OPCODE_INFO1 (0x0090,
838 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
839 CSKYV1_ISA_E1),
840 DOP16 ("inct",
841 OPCODE_INFO3 (0x00a0,
842 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
843 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
844 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
845 OPCODE_INFO1 (0x00a0,
846 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
847 CSKYV1_ISA_E1),
848 DOP16 ("incf",
849 OPCODE_INFO3 (0x00b0,
850 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
851 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
852 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
853 OPCODE_INFO1 (0x00b0,
854 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
855 CSKYV1_ISA_E1),
856 #undef _TRANSFER
857 #define _TRANSFER 2
858 OP16 ("jmp",
859 OPCODE_INFO1 (0x00c0,
860 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
861 CSKYV1_ISA_E1),
862 #undef _TRANSFER
863 #define _TRANSFER 0
864 OP16 ("jsr",
865 OPCODE_INFO1 (0x00d0,
866 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
867 CSKYV1_ISA_E1),
868 DOP16 ("ff1",
869 OPCODE_INFO2 (0x00e0,
870 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
871 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT)),
872 OPCODE_INFO1 (0x00e0,
873 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
874 CSKYV1_ISA_E1),
875 DOP16 ("brev",
876 OPCODE_INFO2 (0x00f0,
877 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
878 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT)),
879 OPCODE_INFO1 (0x00f0,
880 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
881 CSKYV1_ISA_E1),
882 DOP16 ("xtrb3",
883 OPCODE_INFO2 (0x0100,
884 (NONE, REG_r1a, OPRND_SHIFT_0_BIT),
885 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
886 OPCODE_INFO1 (0x0100,
887 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
888 CSKYV1_ISA_E1),
889 DOP16 ("xtrb2",
890 OPCODE_INFO2 (0x0110,
891 (NONE, REG_r1a, OPRND_SHIFT_0_BIT),
892 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
893 OPCODE_INFO1 (0x0110,
894 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
895 CSKYV1_ISA_E1),
896 DOP16 ("xtrb1",
897 OPCODE_INFO2 (0x0120,
898 (NONE, REG_r1a, OPRND_SHIFT_0_BIT),
899 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
900 OPCODE_INFO1 (0x0120,
901 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
902 CSKYV1_ISA_E1),
903 DOP16 ("xtrb0",
904 OPCODE_INFO2 (0x0130,
905 (NONE, REG_r1a, OPRND_SHIFT_0_BIT),
906 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
907 OPCODE_INFO1 (0x0130,
908 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
909 CSKYV1_ISA_E1),
910 DOP16 ("zextb",
911 OPCODE_INFO2 (0x0140,
912 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
913 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT)),
914 OPCODE_INFO1 (0x0140,
915 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
916 CSKYV1_ISA_E1),
917 DOP16 ("sextb",
918 OPCODE_INFO2 (0x0150,
919 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
920 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT)),
921 OPCODE_INFO1 (0x0150,
922 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
923 CSKYV1_ISA_E1),
924 DOP16 ("zexth",
925 OPCODE_INFO2 (0x0160,
926 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
927 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT)),
928 OPCODE_INFO1 (0x0160,
929 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
930 CSKYV1_ISA_E1),
931 DOP16 ("sexth",
932 OPCODE_INFO2 (0x0170,
933 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
934 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT)),
935 OPCODE_INFO1 (0x0170,
936 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
937 CSKYV1_ISA_E1),
938 DOP16 ("declt",
939 OPCODE_INFO3 (0x0180,
940 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
941 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
942 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
943 OPCODE_INFO1 (0x0180,
944 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
945 CSKYV1_ISA_E1),
946 OP16 ("tstnbz",
947 OPCODE_INFO1 (0x0190,
948 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
949 CSKYV1_ISA_E1),
950 DOP16 ("decgt",
951 OPCODE_INFO3 (0x01a0,
952 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
953 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
954 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
955 OPCODE_INFO1 (0x01a0,
956 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
957 CSKYV1_ISA_E1),
958 DOP16 ("decne",
959 OPCODE_INFO3 (0x01b0,
960 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
961 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
962 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
963 OPCODE_INFO1 (0x01b0,
964 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
965 CSKYV1_ISA_E1),
966 OP16 ("clrt",
967 OPCODE_INFO1 (0x01c0,
968 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
969 CSKYV1_ISA_E1),
970 OP16 ("clrf",
971 OPCODE_INFO1 (0x01d0,
972 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
973 CSKYV1_ISA_E1),
974 DOP16 ("abs",
975 OPCODE_INFO2 (0x01e0,
976 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
977 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT)),
978 OPCODE_INFO1 (0x01e0,
979 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
980 CSKYV1_ISA_E1),
981 DOP16 ("not",
982 OPCODE_INFO2 (0x01f0,
983 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
984 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT)),
985 OPCODE_INFO1 (0x01f0,
986 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
987 CSKYV1_ISA_E1),
988 OP16 ("movt",
989 OPCODE_INFO2 (0x0200,
990 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
991 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
992 CSKYV1_ISA_E1),
993 DOP16 ("mult",
994 OPCODE_INFO3 (0x0300,
995 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
996 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
997 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
998 OPCODE_INFO2 (0x0300,
999 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1000 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1001 CSKYV1_ISA_E1),
1002 OP16 ("mac",
1003 OPCODE_INFO2 (0x0400,
1004 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1005 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1006 CSKY_ISA_MAC),
1007 DOP16 ("subu",
1008 OPCODE_INFO3 (0x0500,
1009 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1010 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1011 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1012 OPCODE_INFO2 (0x0500,
1013 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1014 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1015 CSKYV1_ISA_E1),
1016 DOP16 ("sub",
1017 OPCODE_INFO3 (0x0500,
1018 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1019 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1020 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1021 OPCODE_INFO2 (0x0500,
1022 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1023 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1024 CSKYV1_ISA_E1),
1025 DOP16 ("addc",
1026 OPCODE_INFO3 (0x0600,
1027 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1028 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1029 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1030 OPCODE_INFO2 (0x0600,
1031 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1032 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1033 CSKYV1_ISA_E1),
1034 DOP16 ("subc",
1035 OPCODE_INFO3 (0x0700,
1036 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1037 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1038 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1039 OPCODE_INFO2 (0x0700,
1040 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1041 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1042 CSKYV1_ISA_E1),
1043 OP16 ("cprgr",
1044 OPCODE_INFO2 (0x0800,
1045 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1046 (4_8, CPREG, OPRND_SHIFT_0_BIT)),
1047 CSKY_ISA_CP),
1048 OP16 ("movf",
1049 OPCODE_INFO2 (0x0a00,
1050 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1051 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1052 CSKYV1_ISA_E1),
1053 DOP16 ("lsr",
1054 OPCODE_INFO3 (0x0b00,
1055 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1056 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1057 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1058 OPCODE_INFO2 (0x0b00,
1059 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1060 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1061 CSKYV1_ISA_E1),
1062 OP16 ("cmphs",
1063 OPCODE_INFO2 (0x0c00,
1064 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1065 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1066 CSKYV1_ISA_E1),
1067 OP16 ("cmplt",
1068 OPCODE_INFO2 (0x0d00,
1069 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1070 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1071 CSKYV1_ISA_E1),
1072 OP16 ("tst",
1073 OPCODE_INFO2 (0x0e00,
1074 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1075 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1076 CSKYV1_ISA_E1),
1077 OP16 ("cmpne",
1078 OPCODE_INFO2 (0x0f00,
1079 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1080 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1081 CSKYV1_ISA_E1),
1082 OP16 ("mfcr",
1083 OPCODE_INFO2 (0x1000,
1084 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1085 (4_8, CTRLREG, OPRND_SHIFT_0_BIT)),
1086 CSKYV1_ISA_E1),
1087 OP16 ("psrclr",
1088 OPCODE_INFO_LIST (0x11f0,
1089 (0_2, PSR_BITS_LIST, OPRND_SHIFT_0_BIT)),
1090 CSKYV1_ISA_E1),
1091 OP16 ("psrset",
1092 OPCODE_INFO_LIST (0x11f8,
1093 (0_2, PSR_BITS_LIST, OPRND_SHIFT_0_BIT)),
1094 CSKYV1_ISA_E1),
1095 OP16 ("mov",
1096 OPCODE_INFO2 (0x1200,
1097 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1098 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1099 CSKYV1_ISA_E1),
1100 OP16 ("bgenr",
1101 OPCODE_INFO2 (0x1300,
1102 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1103 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1104 CSKYV1_ISA_E1),
1105 DOP16 ("rsub",
1106 OPCODE_INFO3 (0x1400,
1107 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1108 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1109 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1110 OPCODE_INFO2 (0x1400,
1111 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1112 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1113 CSKYV1_ISA_E1),
1114 DOP16 ("ixw",
1115 OPCODE_INFO3 (0x1500,
1116 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1117 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1118 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1119 OPCODE_INFO2 (0x1500,
1120 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1121 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1122 CSKYV1_ISA_E1),
1123 DOP16 ("and",
1124 OPCODE_INFO3 (0x1600,
1125 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1126 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1127 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1128 OPCODE_INFO2 (0x1600,
1129 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1130 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1131 CSKYV1_ISA_E1),
1132 DOP16 ("xor",
1133 OPCODE_INFO3 (0x1700,
1134 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1135 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1136 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1137 OPCODE_INFO2 (0x1700,
1138 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1139 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1140 CSKYV1_ISA_E1),
1141 OP16 ("mtcr",
1142 OPCODE_INFO2 (0x1800,
1143 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1144 (4_8, CTRLREG, OPRND_SHIFT_0_BIT)),
1145 CSKYV1_ISA_E1),
1146 DOP16 ("asr",
1147 OPCODE_INFO3 (0x1a00,
1148 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1149 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1150 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1151 OPCODE_INFO2 (0x1a00,
1152 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1153 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1154 CSKYV1_ISA_E1),
1155 DOP16 ("lsl",
1156 OPCODE_INFO3 (0x1b00,
1157 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1158 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1159 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1160 OPCODE_INFO2 (0x1b00,
1161 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1162 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1163 CSKYV1_ISA_E1),
1164 DOP16 ("addu",
1165 OPCODE_INFO3 (0x1c00,
1166 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1167 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1168 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1169 OPCODE_INFO2 (0x1c00,
1170 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1171 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1172 CSKYV1_ISA_E1),
1173 OP16 ("add",
1174 OPCODE_INFO2 (0x1c00,
1175 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1176 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1177 CSKYV1_ISA_E1),
1178 DOP16 ("ixh",
1179 OPCODE_INFO3 (0x1d00,
1180 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1181 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1182 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1183 OPCODE_INFO2 (0x1d00,
1184 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1185 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1186 CSKYV1_ISA_E1),
1187 DOP16 ("or",
1188 OPCODE_INFO3 (0x1e00,
1189 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1190 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1191 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1192 OPCODE_INFO2 (0x1e00,
1193 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1194 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1195 CSKYV1_ISA_E1),
1196 DOP16 ("andn",
1197 OPCODE_INFO3 (0x1f00,
1198 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1199 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1200 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1201 OPCODE_INFO2 (0x1f00,
1202 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1203 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1204 CSKYV1_ISA_E1),
1205 DOP16 ("addi",
1206 OPCODE_INFO3 (0x2000,
1207 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1208 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1209 (4_8, OIMM5b, OPRND_SHIFT_0_BIT)),
1210 OPCODE_INFO2 (0x2000,
1211 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1212 (4_8, OIMM5b, OPRND_SHIFT_0_BIT)),
1213 CSKYV1_ISA_E1),
1214 OP16 ("cmplti",
1215 OPCODE_INFO2 (0x2200,
1216 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1217 (4_8, OIMM5b, OPRND_SHIFT_0_BIT)),
1218 CSKYV1_ISA_E1),
1219 DOP16 ("subi",
1220 OPCODE_INFO3 (0x2400,
1221 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1222 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1223 (4_8, OIMM5b, OPRND_SHIFT_0_BIT)),
1224 OPCODE_INFO2 (0x2400,
1225 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1226 (4_8, OIMM5b, OPRND_SHIFT_0_BIT)),
1227 CSKYV1_ISA_E1),
1228 OP16 ("cpwgr",
1229 OPCODE_INFO2 (0x2600,
1230 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1231 (4_8, CPREG, OPRND_SHIFT_0_BIT)),
1232 CSKY_ISA_CP),
1233 DOP16 ("rsubi",
1234 OPCODE_INFO3 (0x2800,
1235 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1236 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1237 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1238 OPCODE_INFO2 (0x2800,
1239 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1240 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1241 CSKYV1_ISA_E1),
1242 OP16 ("cmpnei",
1243 OPCODE_INFO2 (0x2a00,
1244 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1245 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1246 CSKYV1_ISA_E1),
1247 OP16 ("bmaski",
1248 OPCODE_INFO2 (0x2c00,
1249 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1250 (4_8, IMM5b_BMASKI, OPRND_SHIFT_0_BIT)),
1251 CSKYV1_ISA_E1),
1252 DOP16 ("divu",
1253 OPCODE_INFO3 (0x2c10,
1254 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1255 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1256 (NONE, REG_r1b, OPRND_SHIFT_0_BIT)),
1257 OPCODE_INFO2 (0x2c10,
1258 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1259 (NONE, REG_r1b, OPRND_SHIFT_0_BIT)),
1260 CSKYV1_ISA_E1),
1261 OP16 ("mflos",
1262 OPCODE_INFO1 (0x2c20,
1263 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1264 CSKY_ISA_MAC_DSP),
1265 OP16 ("mfhis",
1266 OPCODE_INFO1 (0x2c30,
1267 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1268 CSKY_ISA_MAC_DSP),
1269 OP16 ("mtlo",
1270 OPCODE_INFO1 (0x2c40,
1271 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1272 CSKY_ISA_MAC_DSP),
1273 OP16 ("mthi",
1274 OPCODE_INFO1 (0x2c50,
1275 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1276 CSKY_ISA_MAC_DSP),
1277 OP16 ("mflo",
1278 OPCODE_INFO1 (0x2c60,
1279 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1280 CSKY_ISA_MAC_DSP),
1281 OP16 ("mfhi",
1282 OPCODE_INFO1 (0x2c70,
1283 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1284 CSKY_ISA_MAC_DSP),
1285 DOP16 ("andi",
1286 OPCODE_INFO3 (0x2e00,
1287 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1288 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1289 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1290 OPCODE_INFO2 (0x2e00,
1291 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1292 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1293 CSKYV1_ISA_E1),
1294 DOP16 ("bclri",
1295 OPCODE_INFO3 (0x3000,
1296 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1297 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1298 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1299 OPCODE_INFO2 (0x3000,
1300 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1301 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1302 CSKYV1_ISA_E1),
1303 OP16 ("bgeni",
1304 OPCODE_INFO2 (0x3200,
1305 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1306 (4_8, IMM5b_7_31, OPRND_SHIFT_0_BIT)),
1307 CSKYV1_ISA_E1),
1308 OP16 ("cpwir",
1309 OPCODE_INFO1 (0x3200,
1310 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1311 CSKY_ISA_CP),
1312 DOP16 ("divs",
1313 OPCODE_INFO3 (0x3210,
1314 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1315 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1316 (NONE, REG_r1b, OPRND_SHIFT_0_BIT)),
1317 OPCODE_INFO2 (0x3210,
1318 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1319 (NONE, REG_r1b, OPRND_SHIFT_0_BIT)),
1320 CSKYV1_ISA_E1),
1321 OP16 ("cprsr",
1322 OPCODE_INFO1 (0x3220,
1323 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1324 CSKY_ISA_CP),
1325 OP16 ("cpwsr",
1326 OPCODE_INFO1 (0x3230,
1327 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1328 CSKY_ISA_CP),
1329 DOP16 ("bseti",
1330 OPCODE_INFO3 (0x3400,
1331 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1332 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1333 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1334 OPCODE_INFO2 (0x3400,
1335 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1336 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1337 CSKYV1_ISA_E1),
1338 OP16 ("btsti",
1339 OPCODE_INFO2 (0x3600,
1340 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1341 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1342 CSKYV1_ISA_E1),
1343 DOP16 ("rotli",
1344 OPCODE_INFO3 (0x3800,
1345 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1346 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1347 (4_8, IMM5b_1_31, OPRND_SHIFT_0_BIT)),
1348 OPCODE_INFO2 (0x3800,
1349 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1350 (4_8, IMM5b_1_31, OPRND_SHIFT_0_BIT)),
1351 CSKYV1_ISA_E1),
1352 DOP16 ("xsr",
1353 OPCODE_INFO3 (0x3800,
1354 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1355 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1356 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
1357 OPCODE_INFO1 (0x3800,
1358 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1359 CSKYV1_ISA_E1),
1360 DOP16 ("asrc",
1361 OPCODE_INFO3 (0x3a00,
1362 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1363 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1364 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
1365 OPCODE_INFO1 (0x3a00,
1366 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1367 CSKYV1_ISA_E1),
1368 DOP16 ("asri",
1369 OPCODE_INFO3 (0x3a00,
1370 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1371 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1372 (4_8, IMM5b_1_31, OPRND_SHIFT_0_BIT)),
1373 OPCODE_INFO2 (0x3a00,
1374 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1375 (4_8, IMM5b_1_31, OPRND_SHIFT_0_BIT)),
1376 CSKYV1_ISA_E1),
1377 DOP16 ("lslc",
1378 OPCODE_INFO3 (0x3c00,
1379 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1380 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1381 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
1382 OPCODE_INFO1 (0x3c00,
1383 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1384 CSKYV1_ISA_E1),
1385 DOP16 ("lsli",
1386 OPCODE_INFO3 (0x3c00,
1387 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1388 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1389 (4_8, IMM5b_1_31, OPRND_SHIFT_0_BIT)),
1390 OPCODE_INFO2 (0x3c00,
1391 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1392 (4_8, IMM5b_1_31, OPRND_SHIFT_0_BIT)),
1393 CSKYV1_ISA_E1),
1394 DOP16 ("lsrc",
1395 OPCODE_INFO3 (0x3e00,
1396 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1397 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1398 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
1399 OPCODE_INFO1 (0x3e00,
1400 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1401 CSKYV1_ISA_E1),
1402 DOP16 ("lsri",
1403 OPCODE_INFO3 (0x3e00,
1404 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1405 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1406 (4_8, IMM5b_1_31, OPRND_SHIFT_0_BIT)),
1407 OPCODE_INFO2 (0x3e00,
1408 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1409 (4_8, IMM5b_1_31, OPRND_SHIFT_0_BIT)),
1410 CSKYV1_ISA_E1),
1411 OP16 ("ldex",
1412 SOPCODE_INFO2 (0x4000,
1413 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1414 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1415 (4_7, IMM_LDST, OPRND_SHIFT_0_BIT))),
1416 CSKY_ISA_MP),
1417 OP16 ("ldex.w",
1418 SOPCODE_INFO2 (0x4000,
1419 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1420 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1421 (4_7, IMM_LDST, OPRND_SHIFT_0_BIT))),
1422 CSKY_ISA_MP),
1423 OP16 ("ldwex",
1424 SOPCODE_INFO2 (0x4000,
1425 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1426 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1427 (4_7, IMM_LDST, OPRND_SHIFT_0_BIT))),
1428 CSKY_ISA_MP),
1429 OP16 ("stex",
1430 SOPCODE_INFO2 (0x5000,
1431 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1432 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1433 (4_7, IMM_LDST, OPRND_SHIFT_0_BIT))),
1434 CSKY_ISA_MP),
1435 OP16 ("stex.w",
1436 SOPCODE_INFO2 (0x5000,
1437 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1438 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1439 (4_7, IMM_LDST, OPRND_SHIFT_0_BIT))),
1440 CSKY_ISA_MP),
1441 OP16 ("stwex",
1442 SOPCODE_INFO2 (0x5000,
1443 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1444 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1445 (4_7, IMM_LDST, OPRND_SHIFT_0_BIT))),
1446 CSKY_ISA_MP),
1447 OP16 ("omflip0",
1448 OPCODE_INFO2 (0x4000,
1449 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1450 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1451 CSKY_ISA_MAC),
1452 OP16 ("omflip1",
1453 OPCODE_INFO2 (0x4100,
1454 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1455 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1456 CSKY_ISA_MAC),
1457 OP16 ("omflip2",
1458 OPCODE_INFO2 (0x4200,
1459 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1460 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1461 CSKY_ISA_MAC),
1462 OP16 ("omflip3",
1463 OPCODE_INFO2 (0x4300,
1464 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1465 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1466 CSKY_ISA_MAC),
1467 OP16 ("muls",
1468 OPCODE_INFO2 (0x5000,
1469 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1470 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1471 CSKY_ISA_DSP),
1472 OP16 ("mulsa",
1473 OPCODE_INFO2 (0x5100,
1474 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1475 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1476 CSKY_ISA_DSP),
1477 OP16 ("mulss",
1478 OPCODE_INFO2 (0x5200,
1479 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1480 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1481 CSKY_ISA_DSP),
1482 OP16 ("mulu",
1483 OPCODE_INFO2 (0x5400,
1484 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1485 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1486 CSKY_ISA_DSP),
1487 OP16 ("mulua",
1488 OPCODE_INFO2 (0x5500,
1489 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1490 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1491 CSKY_ISA_DSP),
1492 OP16 ("mulus",
1493 OPCODE_INFO2 (0x5600,
1494 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1495 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1496 CSKY_ISA_DSP),
1497 OP16 ("vmulsh",
1498 OPCODE_INFO2 (0x5800,
1499 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1500 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1501 CSKY_ISA_DSP),
1502 OP16 ("vmulsha",
1503 OPCODE_INFO2 (0x5900,
1504 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1505 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1506 CSKY_ISA_DSP),
1507 OP16 ("vmulshs",
1508 OPCODE_INFO2 (0x5a00,
1509 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1510 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1511 CSKY_ISA_DSP),
1512 OP16 ("vmulsw",
1513 OPCODE_INFO2 (0x5c00,
1514 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1515 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1516 CSKY_ISA_DSP),
1517 OP16 ("vmulswa",
1518 OPCODE_INFO2 (0x5d00,
1519 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1520 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1521 CSKY_ISA_DSP),
1522 OP16 ("vmulsws",
1523 OPCODE_INFO2 (0x5e00,
1524 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1525 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1526 CSKY_ISA_DSP),
1527 OP16 ("movi",
1528 OPCODE_INFO2 (0x6000,
1529 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1530 (4_10, IMM7b, OPRND_SHIFT_0_BIT)),
1531 CSKYV1_ISA_E1),
1532 DOP16 ("mulsh",
1533 OPCODE_INFO3 (0x6800,
1534 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1535 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1536 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1537 OPCODE_INFO2 (0x6800,
1538 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1539 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1540 CSKYV1_ISA_E1),
1541 DOP16 ("mulsh.h",
1542 OPCODE_INFO3 (0x6800,
1543 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1544 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1545 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1546 OPCODE_INFO2 (0x6800,
1547 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1548 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1549 CSKYV1_ISA_E1),
1550 OP16 ("mulsha",
1551 OPCODE_INFO2 (0x6900,
1552 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1553 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1554 CSKY_ISA_DSP),
1555 OP16 ("mulshs",
1556 OPCODE_INFO2 (0x6a00,
1557 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1558 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1559 CSKY_ISA_DSP),
1560 OP16 ("cprcr",
1561 OPCODE_INFO2 (0x6b00,
1562 (0_2, GREG0_7, OPRND_SHIFT_0_BIT),
1563 (3_7, CPCREG, OPRND_SHIFT_0_BIT)),
1564 CSKY_ISA_CP),
1565 OP16 ("mulsw",
1566 OPCODE_INFO2 (0x6c00,
1567 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1568 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1569 CSKY_ISA_DSP),
1570 OP16 ("mulswa",
1571 OPCODE_INFO2 (0x6d00,
1572 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1573 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1574 CSKY_ISA_DSP),
1575 OP16 ("mulsws",
1576 OPCODE_INFO2 (0x6e00,
1577 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1578 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1579 CSKY_ISA_DSP),
1580 OP16 ("cpwcr",
1581 OPCODE_INFO2 (0x6f00,
1582 (0_2, GREG0_7, OPRND_SHIFT_0_BIT),
1583 (3_7, CPCREG, OPRND_SHIFT_0_BIT)),
1584 CSKY_ISA_CP),
1585 #undef _RELOC16
1586 #define _RELOC16 BFD_RELOC_CKCORE_PCREL_IMM8BY4
1587 #undef _TRANSFER
1588 #define _TRANSFER 1
1589 OP16 ("jmpi",
1590 OPCODE_INFO1 (0x7000,
1591 (0_7, OFF8b, OPRND_SHIFT_2_BIT)),
1592 CSKYV1_ISA_E1),
1593 #undef _TRANSFER
1594 #define _TRANSFER 0
1595 OP16 ("jsri",
1596 OPCODE_INFO1 (0x7f00,
1597 (0_7, OFF8b, OPRND_SHIFT_2_BIT)),
1598 CSKYV1_ISA_E1),
1599 OP16_WITH_WORK ("lrw",
1600 OPCODE_INFO2 (0x7000,
1601 (8_11, REGnsplr, OPRND_SHIFT_0_BIT),
1602 (0_7, CONSTANT, OPRND_SHIFT_2_BIT)),
1603 CSKYV1_ISA_E1,
1604 v1_work_lrw),
1605 #undef _RELOC16
1606 #define _RELOC16 0
1607 DOP16 ("ld.w",
1608 SOPCODE_INFO2 (0x8000,
1609 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1610 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1611 (4_7, IMM_LDST, OPRND_SHIFT_2_BIT))),
1612 OPCODE_INFO2 (0x8000,
1613 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1614 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1615 CSKYV1_ISA_E1),
1616 DOP16 ("ldw",
1617 SOPCODE_INFO2 (0x8000,
1618 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1619 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1620 (4_7, IMM_LDST, OPRND_SHIFT_2_BIT))),
1621 OPCODE_INFO2 (0x8000,
1622 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1623 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1624 CSKYV1_ISA_E1),
1625 DOP16 ("ld",
1626 SOPCODE_INFO2 (0x8000,
1627 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1628 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1629 (4_7, IMM_LDST, OPRND_SHIFT_2_BIT))),
1630 OPCODE_INFO2 (0x8000,
1631 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1632 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1633 CSKYV1_ISA_E1),
1634 DOP16 ("st.w",
1635 SOPCODE_INFO2 (0x9000,
1636 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1637 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1638 (4_7, IMM_LDST, OPRND_SHIFT_2_BIT))),
1639 OPCODE_INFO2 (0x9000,
1640 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1641 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1642 CSKYV1_ISA_E1),
1643 DOP16 ("stw",
1644 SOPCODE_INFO2 (0x9000,
1645 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1646 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1647 (4_7, IMM_LDST, OPRND_SHIFT_2_BIT))),
1648 OPCODE_INFO2 (0x9000,
1649 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1650 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1651 CSKYV1_ISA_E1),
1652 DOP16 ("st",
1653 SOPCODE_INFO2 (0x9000,
1654 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1655 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1656 (4_7, IMM_LDST, OPRND_SHIFT_2_BIT))),
1657 OPCODE_INFO2 (0x9000,
1658 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1659 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1660 CSKYV1_ISA_E1),
1661 DOP16 ("ld.b",
1662 SOPCODE_INFO2 (0xa000,
1663 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1664 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1665 (4_7, IMM_LDST, OPRND_SHIFT_0_BIT))),
1666 OPCODE_INFO2 (0xa000,
1667 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1668 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1669 CSKYV1_ISA_E1),
1670 DOP16 ("ldb",
1671 SOPCODE_INFO2 (0xa000,
1672 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1673 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1674 (4_7, IMM_LDST, OPRND_SHIFT_0_BIT))),
1675 OPCODE_INFO2 (0xa000,
1676 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1677 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1678 CSKYV1_ISA_E1),
1679 DOP16 ("st.b",
1680 SOPCODE_INFO2 (0xb000,
1681 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1682 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1683 (4_7, IMM_LDST, OPRND_SHIFT_0_BIT))),
1684 OPCODE_INFO2 (0xb000,
1685 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1686 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1687 CSKYV1_ISA_E1),
1688 DOP16 ("stb",
1689 SOPCODE_INFO2 (0xb000,
1690 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1691 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1692 (4_7, IMM_LDST, OPRND_SHIFT_0_BIT))),
1693 OPCODE_INFO2 (0xb000,
1694 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1695 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1696 CSKYV1_ISA_E1),
1697 DOP16 ("ld.h",
1698 SOPCODE_INFO2 (0xc000,
1699 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1700 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1701 (4_7, IMM_LDST, OPRND_SHIFT_1_BIT))),
1702 OPCODE_INFO2 (0xc000,
1703 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1704 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1705 CSKYV1_ISA_E1),
1706 DOP16 ("ldh",
1707 SOPCODE_INFO2 (0xc000,
1708 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1709 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1710 (4_7, IMM_LDST, OPRND_SHIFT_1_BIT))),
1711 OPCODE_INFO2 (0xc000,
1712 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1713 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1714 CSKYV1_ISA_E1),
1715 DOP16 ("st.h",
1716 SOPCODE_INFO2 (0xd000,
1717 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1718 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1719 (4_7, IMM_LDST, OPRND_SHIFT_1_BIT))),
1720 OPCODE_INFO2 (0xd000,
1721 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1722 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1723 CSKYV1_ISA_E1),
1724 DOP16 ("sth",
1725 SOPCODE_INFO2 (0xd000,
1726 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1727 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1728 (4_7, IMM_LDST, OPRND_SHIFT_1_BIT))),
1729 OPCODE_INFO2 (0xd000,
1730 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1731 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1732 CSKYV1_ISA_E1),
1733
1734 #undef _RELOC16
1735 #define _RELOC16 BFD_RELOC_CKCORE_PCREL_IMM11BY2
1736 OP16 ("bt",
1737 OPCODE_INFO1 (0xe000,
1738 (0_10, OFF11b, OPRND_SHIFT_1_BIT)),
1739 CSKYV1_ISA_E1),
1740 OP16 ("bf",
1741 OPCODE_INFO1 (0xe800,
1742 (0_10, OFF11b, OPRND_SHIFT_1_BIT)),
1743 CSKYV1_ISA_E1),
1744 #undef _TRANSFER
1745 #define _TRANSFER 1
1746 OP16 ("br",
1747 OPCODE_INFO1 (0xf000,
1748 (0_10, OFF11b, OPRND_SHIFT_1_BIT)),
1749 CSKYV1_ISA_E1),
1750 #undef _TRANSFER
1751 #define _TRANSFER 0
1752 OP16 ("bsr",
1753 OPCODE_INFO1 (0xf800,
1754 (0_10, OFF11b, OPRND_SHIFT_1_BIT)),
1755 CSKYV1_ISA_E1),
1756 #undef _RELOC16
1757 #define _RELOC16 0
1758
1759 #undef _RELAX
1760 #define _RELAX 1
1761 OP16 ("jbt",
1762 OPCODE_INFO1 (0xe000,
1763 (0_10, JBTF, OPRND_SHIFT_0_BIT)),
1764 CSKYV1_ISA_E1),
1765 OP16 ("jbf",
1766 OPCODE_INFO1 (0xe800,
1767 (0_10, JBTF, OPRND_SHIFT_0_BIT)),
1768 CSKYV1_ISA_E1),
1769 #undef _TRANSFER
1770 #define _TRANSFER 1
1771 OP16 ("jbr",
1772 OPCODE_INFO1 (0xf000,
1773 (0_10, JBR, OPRND_SHIFT_0_BIT)),
1774 CSKYV1_ISA_E1),
1775 #undef _TRANSFER
1776 #define _TRANSFER 0
1777 #undef _RELAX
1778 #define _RELAX 0
1779
1780 OP16_WITH_WORK ("jbsr",
1781 OPCODE_INFO1 (0xf800,
1782 (0_10, JBSR, OPRND_SHIFT_0_BIT)),
1783 CSKYV1_ISA_E1,
1784 v1_work_jbsr),
1785
1786 /* The following are aliases for other instructions. */
1787 /* rts -> jmp r15. */
1788 #undef _TRANSFER
1789 #define _TRANSFER 2
1790 OP16 ("rts",
1791 OPCODE_INFO0 (0x00CF),
1792 CSKYV1_ISA_E1),
1793 OP16 ("rte",
1794 OPCODE_INFO0 (0x0002),
1795 CSKYV1_ISA_E1),
1796 OP16 ("rfe",
1797 OPCODE_INFO0 (0x0002),
1798 CSKYV1_ISA_E1),
1799 #undef _TRANSFER
1800 #define _TRANSFER 0
1801
1802 /* cmphs r0,r0 */
1803 OP16 ("setc",
1804 OPCODE_INFO0 (0x0c00),
1805 CSKYV1_ISA_E1),
1806 /* cmpne r0,r0 */
1807 OP16 ("clrc",
1808 OPCODE_INFO0 (0x0f00),
1809 CSKYV1_ISA_E1),
1810 /* cmplti rd,1 */
1811 OP16 ("tstle",
1812 OPCODE_INFO1 (0x2200,
1813 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1814 CSKYV1_ISA_E1),
1815 /* cmplei rd,X -> cmplti rd,X+1 */
1816 OP16 ("cmplei",
1817 OPCODE_INFO2 (0x2200,
1818 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1819 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1820 CSKYV1_ISA_E1),
1821 /* rsubi rd,0 */
1822 OP16 ("neg",
1823 OPCODE_INFO1 (0x2800,
1824 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1825 CSKYV1_ISA_E1),
1826 /* cmpnei rd,0. */
1827 OP16 ("tstne",
1828 OPCODE_INFO1 (0x2a00,
1829 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1830 CSKYV1_ISA_E1),
1831 /* btsti rx,31. */
1832 OP16 ("tstlt",
1833 OPCODE_INFO1 (0x37f0,
1834 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1835 CSKYV1_ISA_E1),
1836 /* bclri rx,log2(imm). */
1837 OP16 ("mclri",
1838 OPCODE_INFO2 (0x3000,
1839 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1840 (4_8, IMM5b_POWER, OPRND_SHIFT_0_BIT)),
1841 CSKYV1_ISA_E1),
1842 /* bgeni rx,log2(imm). */
1843 OP16 ("mgeni",
1844 OPCODE_INFO2 (0x3200,
1845 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1846 (4_8, IMM5b_7_31_POWER, OPRND_SHIFT_0_BIT)),
1847 CSKYV1_ISA_E1),
1848 /* bseti rx,log2(imm). */
1849 OP16 ("mseti",
1850 OPCODE_INFO2 (0x3400,
1851 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1852 (4_8, IMM5b_POWER, OPRND_SHIFT_0_BIT)),
1853 CSKYV1_ISA_E1),
1854 /* btsti rx,log2(imm). */
1855 OP16 ("mtsti",
1856 OPCODE_INFO2 (0x3600,
1857 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1858 (4_8, IMM5b_POWER, OPRND_SHIFT_0_BIT)),
1859 CSKYV1_ISA_E1),
1860 OP16 ("rori",
1861 OPCODE_INFO2 (0x3800,
1862 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1863 (4_8, IMM5b_RORI, OPRND_SHIFT_0_BIT)),
1864 CSKYV1_ISA_E1),
1865 OP16 ("rotri",
1866 OPCODE_INFO2 (0x3800,
1867 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1868 (4_8, IMM5b_RORI, OPRND_SHIFT_0_BIT)),
1869 CSKYV1_ISA_E1),
1870 /* mov r0, r0. */
1871 OP16 ("nop",
1872 OPCODE_INFO0 (0x1200),
1873 CSKYV1_ISA_E1),
1874
1875 /* Float instruction with work. */
1876 OP16_WITH_WORK ("fabss",
1877 OPCODE_INFO3 (0xffe04400,
1878 (5_9, FREG, OPRND_SHIFT_0_BIT),
1879 (0_4, FREG, OPRND_SHIFT_0_BIT),
1880 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1881 CSKY_ISA_FLOAT_E1,
1882 v1_work_fpu_fo),
1883 OP16_WITH_WORK ("fnegs",
1884 OPCODE_INFO3 (0xffe04c00,
1885 (5_9, FREG, OPRND_SHIFT_0_BIT),
1886 (0_4, FREG, OPRND_SHIFT_0_BIT),
1887 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1888 CSKY_ISA_FLOAT_E1,
1889 v1_work_fpu_fo),
1890 OP16_WITH_WORK ("fsqrts",
1891 OPCODE_INFO3 (0xffe05400,
1892 (5_9, FREG, OPRND_SHIFT_0_BIT),
1893 (0_4, FREG, OPRND_SHIFT_0_BIT),
1894 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1895 CSKY_ISA_FLOAT_E1,
1896 v1_work_fpu_fo),
1897 OP16_WITH_WORK ("frecips",
1898 OPCODE_INFO3 (0xffe05c00,
1899 (5_9, FREG, OPRND_SHIFT_0_BIT),
1900 (0_4, FREG, OPRND_SHIFT_0_BIT),
1901 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1902 CSKY_ISA_FLOAT_E1,
1903 v1_work_fpu_fo),
1904 OP16_WITH_WORK ("fadds",
1905 OPCODE_INFO4 (0xffe38000,
1906 (5_9, FREG, OPRND_SHIFT_0_BIT),
1907 (0_4, FREG, OPRND_SHIFT_0_BIT),
1908 (10_14, FREG, OPRND_SHIFT_0_BIT),
1909 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1910 CSKY_ISA_FLOAT_E1,
1911 v1_work_fpu_fo),
1912 OP16_WITH_WORK ("fsubs",
1913 OPCODE_INFO4 (0xffe48000,
1914 (5_9, FREG, OPRND_SHIFT_0_BIT),
1915 (0_4, FREG, OPRND_SHIFT_0_BIT),
1916 (10_14, FREG, OPRND_SHIFT_0_BIT),
1917 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1918 CSKY_ISA_FLOAT_E1, v1_work_fpu_fo),
1919 OP16_WITH_WORK ("fmacs",
1920 OPCODE_INFO4 (0xffe58000,
1921 (5_9, FREG, OPRND_SHIFT_0_BIT),
1922 (0_4, FREG, OPRND_SHIFT_0_BIT),
1923 (10_14, FREG, OPRND_SHIFT_0_BIT),
1924 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1925 CSKY_ISA_FLOAT_E1,
1926 v1_work_fpu_fo),
1927 OP16_WITH_WORK ("fmscs",
1928 OPCODE_INFO4 (0xffe68000,
1929 (5_9, FREG, OPRND_SHIFT_0_BIT),
1930 (0_4, FREG, OPRND_SHIFT_0_BIT),
1931 (10_14, FREG, OPRND_SHIFT_0_BIT),
1932 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1933 CSKY_ISA_FLOAT_E1,
1934 v1_work_fpu_fo),
1935 OP16_WITH_WORK ("fmuls",
1936 OPCODE_INFO4 (0xffe78000,
1937 (5_9, FREG, OPRND_SHIFT_0_BIT),
1938 (0_4, FREG, OPRND_SHIFT_0_BIT),
1939 (10_14, FREG, OPRND_SHIFT_0_BIT),
1940 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1941 CSKY_ISA_FLOAT_E1,
1942 v1_work_fpu_fo),
1943 OP16_WITH_WORK ("fdivs",
1944 OPCODE_INFO4 (0xffe88000,
1945 (5_9, FREG, OPRND_SHIFT_0_BIT),
1946 (0_4, FREG, OPRND_SHIFT_0_BIT),
1947 (10_14, FREG, OPRND_SHIFT_0_BIT),
1948 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1949 CSKY_ISA_FLOAT_E1,
1950 v1_work_fpu_fo),
1951 OP16_WITH_WORK ("fnmacs",
1952 OPCODE_INFO4 (0xffe98000,
1953 (5_9, FREG, OPRND_SHIFT_0_BIT),
1954 (0_4, FREG, OPRND_SHIFT_0_BIT),
1955 (10_14, FREG, OPRND_SHIFT_0_BIT),
1956 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1957 CSKY_ISA_FLOAT_E1,
1958 v1_work_fpu_fo),
1959 OP16_WITH_WORK ("fnmscs",
1960 OPCODE_INFO4 (0xffea8000,
1961 (5_9, FREG, OPRND_SHIFT_0_BIT),
1962 (0_4, FREG, OPRND_SHIFT_0_BIT),
1963 (10_14, FREG, OPRND_SHIFT_0_BIT),
1964 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1965 CSKY_ISA_FLOAT_E1,
1966 v1_work_fpu_fo),
1967 OP16_WITH_WORK ("fnmuls",
1968 OPCODE_INFO4 (0xffeb8000,
1969 (5_9, FREG, OPRND_SHIFT_0_BIT),
1970 (0_4, FREG, OPRND_SHIFT_0_BIT),
1971 (10_14, FREG, OPRND_SHIFT_0_BIT),
1972 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1973 CSKY_ISA_FLOAT_E1,
1974 v1_work_fpu_fo),
1975 OP16_WITH_WORK ("fabsd",
1976 OPCODE_INFO3 (0xffe04000,
1977 (5_9, FEREG, OPRND_SHIFT_0_BIT),
1978 (0_4, FEREG, OPRND_SHIFT_0_BIT),
1979 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1980 CSKY_ISA_FLOAT_E1,
1981 v1_work_fpu_fo),
1982 OP16_WITH_WORK ("fnegd",
1983 OPCODE_INFO3 (0xffe04800,
1984 (5_9, FEREG, OPRND_SHIFT_0_BIT),
1985 (0_4, FEREG, OPRND_SHIFT_0_BIT),
1986 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1987 CSKY_ISA_FLOAT_E1,
1988 v1_work_fpu_fo),
1989 OP16_WITH_WORK ("fsqrtd",
1990 OPCODE_INFO3 (0xffe05000,
1991 (5_9, FEREG, OPRND_SHIFT_0_BIT),
1992 (0_4, FEREG, OPRND_SHIFT_0_BIT),
1993 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1994 CSKY_ISA_FLOAT_E1,
1995 v1_work_fpu_fo),
1996 OP16_WITH_WORK ("frecipd",
1997 OPCODE_INFO3 (0xffe05800,
1998 (5_9, FEREG, OPRND_SHIFT_0_BIT),
1999 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2000 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2001 CSKY_ISA_FLOAT_E1,
2002 v1_work_fpu_fo),
2003 OP16_WITH_WORK ("faddd",
2004 OPCODE_INFO4 (0xffe30000,
2005 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2006 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2007 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2008 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2009 CSKY_ISA_FLOAT_E1,
2010 v1_work_fpu_fo),
2011 OP16_WITH_WORK ("fsubd",
2012 OPCODE_INFO4 (0xffe40000,
2013 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2014 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2015 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2016 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2017 CSKY_ISA_FLOAT_E1,
2018 v1_work_fpu_fo),
2019 OP16_WITH_WORK ("fmacd",
2020 OPCODE_INFO4 (0xffe50000,
2021 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2022 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2023 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2024 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2025 CSKY_ISA_FLOAT_E1,
2026 v1_work_fpu_fo),
2027 OP16_WITH_WORK ("fmscd",
2028 OPCODE_INFO4 (0xffe60000,
2029 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2030 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2031 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2032 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2033 CSKY_ISA_FLOAT_E1,
2034 v1_work_fpu_fo),
2035 OP16_WITH_WORK ("fmuld",
2036 OPCODE_INFO4 (0xffe70000,
2037 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2038 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2039 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2040 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2041 CSKY_ISA_FLOAT_E1,
2042 v1_work_fpu_fo),
2043 OP16_WITH_WORK ("fdivd",
2044 OPCODE_INFO4 (0xffe80000,
2045 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2046 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2047 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2048 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2049 CSKY_ISA_FLOAT_E1,
2050 v1_work_fpu_fo),
2051 OP16_WITH_WORK ("fnmacd",
2052 OPCODE_INFO4 (0xffe90000,
2053 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2054 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2055 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2056 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2057 CSKY_ISA_FLOAT_E1,
2058 v1_work_fpu_fo),
2059 OP16_WITH_WORK ("fnmscd",
2060 OPCODE_INFO4 (0xffea0000,
2061 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2062 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2063 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2064 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2065 CSKY_ISA_FLOAT_E1,
2066 v1_work_fpu_fo),
2067 OP16_WITH_WORK ("fnmuld",
2068 OPCODE_INFO4 (0xffeb0000,
2069 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2070 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2071 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2072 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2073 CSKY_ISA_FLOAT_E1,
2074 v1_work_fpu_fo),
2075 OP16_WITH_WORK ("fabsm",
2076 OPCODE_INFO3 (0xffe06000,
2077 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2078 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2079 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2080 CSKY_ISA_FLOAT_E1,
2081 v1_work_fpu_fo),
2082 OP16_WITH_WORK ("fnegm",
2083 OPCODE_INFO3 (0xffe06400,
2084 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2085 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2086 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2087 CSKY_ISA_FLOAT_E1,
2088 v1_work_fpu_fo),
2089 OP16_WITH_WORK ("faddm",
2090 OPCODE_INFO4 (0xffec0000,
2091 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2092 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2093 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2094 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2095 CSKY_ISA_FLOAT_E1,
2096 v1_work_fpu_fo),
2097 OP16_WITH_WORK ("fsubm",
2098 OPCODE_INFO4 (0xffec8000,
2099 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2100 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2101 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2102 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2103 CSKY_ISA_FLOAT_E1,
2104 v1_work_fpu_fo),
2105 OP16_WITH_WORK ("fmacm",
2106 OPCODE_INFO4 (0xffed8000,
2107 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2108 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2109 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2110 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2111 CSKY_ISA_FLOAT_E1,
2112 v1_work_fpu_fo),
2113 OP16_WITH_WORK ("fmscm",
2114 OPCODE_INFO4 (0xffee0000,
2115 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2116 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2117 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2118 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2119 CSKY_ISA_FLOAT_E1,
2120 v1_work_fpu_fo),
2121 OP16_WITH_WORK ("fmulm",
2122 OPCODE_INFO4 (0xffed0000,
2123 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2124 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2125 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2126 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2127 CSKY_ISA_FLOAT_E1,
2128 v1_work_fpu_fo),
2129 OP16_WITH_WORK ("fnmacm",
2130 OPCODE_INFO4 (0xffee8000,
2131 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2132 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2133 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2134 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2135 CSKY_ISA_FLOAT_E1,
2136 v1_work_fpu_fo),
2137 OP16_WITH_WORK ("fnmscm",
2138 OPCODE_INFO4 (0xffef0000,
2139 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2140 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2141 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2142 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2143 CSKY_ISA_FLOAT_E1,
2144 v1_work_fpu_fo),
2145 OP16_WITH_WORK ("fnmulm",
2146 OPCODE_INFO4 (0xffef8000,
2147 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2148 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2149 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2150 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2151 CSKY_ISA_FLOAT_E1,
2152 v1_work_fpu_fo),
2153 OP16_WITH_WORK ("fcmphsd",
2154 OPCODE_INFO3 (0xffe00800,
2155 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2156 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2157 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2158 CSKY_ISA_FLOAT_E1,
2159 v1_work_fpu_fo_fc),
2160 OP16_WITH_WORK ("fcmpltd",
2161 OPCODE_INFO3 (0xffe00c00,
2162 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2163 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2164 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2165 CSKY_ISA_FLOAT_E1,
2166 v1_work_fpu_fo_fc),
2167 OP16_WITH_WORK ("fcmpned",
2168 OPCODE_INFO3 (0xffe01000,
2169 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2170 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2171 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2172 CSKY_ISA_FLOAT_E1,
2173 v1_work_fpu_fo_fc),
2174 OP16_WITH_WORK ("fcmpuod",
2175 OPCODE_INFO3 (0xffe01400,
2176 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2177 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2178 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2179 CSKY_ISA_FLOAT_E1,
2180 v1_work_fpu_fo_fc),
2181 OP16_WITH_WORK ("fcmphss",
2182 OPCODE_INFO3 (0xffe01800,
2183 (0_4, FREG, OPRND_SHIFT_0_BIT),
2184 (5_9, FREG, OPRND_SHIFT_0_BIT),
2185 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2186 CSKY_ISA_FLOAT_E1,
2187 v1_work_fpu_fo_fc),
2188 OP16_WITH_WORK ("fcmplts",
2189 OPCODE_INFO3 (0xffe01c00,
2190 (0_4, FREG, OPRND_SHIFT_0_BIT),
2191 (5_9, FREG, OPRND_SHIFT_0_BIT),
2192 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2193 CSKY_ISA_FLOAT_E1,
2194 v1_work_fpu_fo_fc),
2195 OP16_WITH_WORK ("fcmpnes",
2196 OPCODE_INFO3 (0xffe02000,
2197 (0_4, FREG, OPRND_SHIFT_0_BIT),
2198 (5_9, FREG, OPRND_SHIFT_0_BIT),
2199 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2200 CSKY_ISA_FLOAT_E1,
2201 v1_work_fpu_fo_fc),
2202 OP16_WITH_WORK ("fcmpuos",
2203 OPCODE_INFO3 (0xffe02400,
2204 (0_4, FREG, OPRND_SHIFT_0_BIT),
2205 (5_9, FREG, OPRND_SHIFT_0_BIT),
2206 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2207 CSKY_ISA_FLOAT_E1,
2208 v1_work_fpu_fo_fc),
2209 OP16_WITH_WORK ("fcmpzhsd",
2210 OPCODE_INFO2 (0xffe00400,
2211 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2212 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2213 CSKY_ISA_FLOAT_E1,
2214 v1_work_fpu_fo_fc),
2215 OP16_WITH_WORK ("fcmpzltd",
2216 OPCODE_INFO2 (0xffe00480,
2217 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2218 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2219 CSKY_ISA_FLOAT_E1,
2220 v1_work_fpu_fo_fc),
2221 OP16_WITH_WORK ("fcmpzned",
2222 OPCODE_INFO2 (0xffe00500,
2223 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2224 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2225 CSKY_ISA_FLOAT_E1,
2226 v1_work_fpu_fo_fc),
2227 OP16_WITH_WORK ("fcmpzuod",
2228 OPCODE_INFO2 (0xffe00580,
2229 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2230 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2231 CSKY_ISA_FLOAT_E1,
2232 v1_work_fpu_fo_fc),
2233 OP16_WITH_WORK ("fcmpzhss",
2234 OPCODE_INFO2 (0xffe00600,
2235 (0_4, FREG, OPRND_SHIFT_0_BIT),
2236 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2237 CSKY_ISA_FLOAT_E1,
2238 v1_work_fpu_fo_fc),
2239 OP16_WITH_WORK ("fcmpzlts",
2240 OPCODE_INFO2 (0xffe00680,
2241 (0_4, FREG, OPRND_SHIFT_0_BIT),
2242 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2243 CSKY_ISA_FLOAT_E1,
2244 v1_work_fpu_fo_fc),
2245 OP16_WITH_WORK ("fcmpznes",
2246 OPCODE_INFO2 (0xffe00700,
2247 (0_4, FREG, OPRND_SHIFT_0_BIT),
2248 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2249 CSKY_ISA_FLOAT_E1,
2250 v1_work_fpu_fo_fc),
2251 OP16_WITH_WORK ("fcmpzuos",
2252 OPCODE_INFO2 (0xffe00780,
2253 (0_4, FREG, OPRND_SHIFT_0_BIT),
2254 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2255 CSKY_ISA_FLOAT_E1,
2256 v1_work_fpu_fo_fc),
2257 OP16_WITH_WORK ("fstod",
2258 OPCODE_INFO3 (0xffe02800,
2259 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2260 (0_4, FREG, OPRND_SHIFT_0_BIT),
2261 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2262 CSKY_ISA_FLOAT_E1,
2263 v1_work_fpu_fo),
2264 OP16_WITH_WORK ("fdtos",
2265 OPCODE_INFO3 (0xffe02c00,
2266 (5_9, FREG, OPRND_SHIFT_0_BIT),
2267 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2268 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2269 CSKY_ISA_FLOAT_E1,
2270 v1_work_fpu_fo),
2271 OP16_WITH_WORK ("fsitos",
2272 OPCODE_INFO3 (0xffe03400,
2273 (5_9, FREG, OPRND_SHIFT_0_BIT),
2274 (0_4, FREG, OPRND_SHIFT_0_BIT),
2275 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2276 CSKY_ISA_FLOAT_E1,
2277 v1_work_fpu_fo),
2278 OP16_WITH_WORK ("fsitod",
2279 OPCODE_INFO3 (0xffe03000,
2280 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2281 (0_4, FREG, OPRND_SHIFT_0_BIT),
2282 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2283 CSKY_ISA_FLOAT_E1,
2284 v1_work_fpu_fo),
2285 OP16_WITH_WORK ("fuitos",
2286 OPCODE_INFO3 (0xffe03c00,
2287 (5_9, FREG, OPRND_SHIFT_0_BIT),
2288 (0_4, FREG, OPRND_SHIFT_0_BIT),
2289 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2290 CSKY_ISA_FLOAT_E1,
2291 v1_work_fpu_fo),
2292 OP16_WITH_WORK ("fuitod",
2293 OPCODE_INFO3 (0xffe03800,
2294 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2295 (0_4, FREG, OPRND_SHIFT_0_BIT),
2296 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2297 CSKY_ISA_FLOAT_E1,
2298 v1_work_fpu_fo),
2299 OP16_WITH_WORK ("fstosi",
2300 OPCODE_INFO4 (0xffe10000,
2301 (5_9, FREG, OPRND_SHIFT_0_BIT),
2302 (0_4, FREG, OPRND_SHIFT_0_BIT),
2303 (13_17, RM, OPRND_SHIFT_0_BIT),
2304 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2305 CSKY_ISA_FLOAT_E1,
2306 v1_work_fpu_fo),
2307 OP16_WITH_WORK ("fdtosi",
2308 OPCODE_INFO4 (0xffe08000,
2309 (5_9, FREG, OPRND_SHIFT_0_BIT),
2310 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2311 (13_17, RM, OPRND_SHIFT_0_BIT),
2312 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2313 CSKY_ISA_FLOAT_E1,
2314 v1_work_fpu_fo),
2315 OP16_WITH_WORK ("fstoui",
2316 OPCODE_INFO4 (0xffe20000,
2317 (5_9, FREG, OPRND_SHIFT_0_BIT),
2318 (0_4, FREG, OPRND_SHIFT_0_BIT),
2319 (13_17, RM, OPRND_SHIFT_0_BIT),
2320 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2321 CSKY_ISA_FLOAT_E1,
2322 v1_work_fpu_fo),
2323 OP16_WITH_WORK ("fdtoui",
2324 OPCODE_INFO4 (0xffe18000,
2325 (5_9, FREG, OPRND_SHIFT_0_BIT),
2326 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2327 (13_17, RM, OPRND_SHIFT_0_BIT),
2328 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2329 CSKY_ISA_FLOAT_E1,
2330 v1_work_fpu_fo),
2331 OP16_WITH_WORK ("fmovd",
2332 OPCODE_INFO3 (0xffe06800,
2333 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2334 (0_4, FREG, OPRND_SHIFT_0_BIT),
2335 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2336 CSKY_ISA_FLOAT_E1,
2337 v1_work_fpu_fo),
2338 OP16_WITH_WORK ("fmovs",
2339 OPCODE_INFO3 (0xffe06c00,
2340 (5_9, FREG, OPRND_SHIFT_0_BIT),
2341 (0_4, FREG, OPRND_SHIFT_0_BIT),
2342 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2343 CSKY_ISA_FLOAT_E1,
2344 v1_work_fpu_fo),
2345 OP16_WITH_WORK ("fmts",
2346 OPCODE_INFO2 (0x00000000,
2347 (NONE, GREG0_15, OPRND_SHIFT_0_BIT),
2348 (NONE, FREG, OPRND_SHIFT_0_BIT)),
2349 CSKY_ISA_FLOAT_E1,
2350 v1_work_fpu_write),
2351 OP16_WITH_WORK ("fmfs",
2352 OPCODE_INFO2 (0x00000000,
2353 (NONE, GREG0_15, OPRND_SHIFT_0_BIT),
2354 (NONE, FREG, OPRND_SHIFT_0_BIT)),
2355 CSKY_ISA_FLOAT_E1,
2356 v1_work_fpu_read),
2357 OP16_WITH_WORK ("fmtd",
2358 OPCODE_INFO2 (0x00000000,
2359 (NONE, GREG0_15, OPRND_SHIFT_0_BIT),
2360 (NONE, FEREG, OPRND_SHIFT_0_BIT)),
2361 CSKY_ISA_FLOAT_E1,
2362 v1_work_fpu_writed),
2363 OP16_WITH_WORK ("fmfd",
2364 OPCODE_INFO2 (0x00000000,
2365 (NONE, GREG0_15, OPRND_SHIFT_0_BIT),
2366 (NONE, FEREG, OPRND_SHIFT_0_BIT)),
2367 CSKY_ISA_FLOAT_E1,
2368 v1_work_fpu_readd),
2369 {NULL, 0, {}, {}, 0, 0, 0, 0, 0, NULL}
2370 };
2371
2372 #undef _TRANSFER
2373 #undef _RELOC16
2374 #undef _RELOC32
2375 #undef _RELAX
2376
2377 /* C-SKY v2 opcodes. */
2378 const struct csky_opcode csky_v2_opcodes[] =
2379 {
2380 #define _TRANSFER 0
2381 #define _RELOC16 0
2382 #define _RELOC32 0
2383 #define _RELAX 0
2384 OP16 ("bkpt",
2385 OPCODE_INFO0 (0x0000),
2386 CSKYV2_ISA_E1),
2387 OP16_WITH_WORK ("nie",
2388 OPCODE_INFO0 (0x1460),
2389 CSKYV2_ISA_E1,
2390 v2_work_istack),
2391 OP16_WITH_WORK ("nir",
2392 OPCODE_INFO0 (0x1461),
2393 CSKYV2_ISA_E1,
2394 v2_work_istack),
2395 OP16_WITH_WORK ("ipush",
2396 OPCODE_INFO0 (0x1462),
2397 CSKYV2_ISA_E1,
2398 v2_work_istack),
2399 OP16_WITH_WORK ("ipop",
2400 OPCODE_INFO0 (0x1463),
2401 CSKYV2_ISA_E1,
2402 v2_work_istack),
2403 OP16 ("bpop.h",
2404 OPCODE_INFO1 (0x14a0,
2405 (2_4, GREG0_7, OPRND_SHIFT_0_BIT)),
2406 CSKY_ISA_JAVA),
2407 OP16 ("bpop.w",
2408 OPCODE_INFO1 (0x14a2,
2409 (2_4, GREG0_7, OPRND_SHIFT_0_BIT)),
2410 CSKY_ISA_JAVA),
2411 OP16 ("bpush.h",
2412 OPCODE_INFO1 (0x14e0,
2413 (2_4, GREG0_7, OPRND_SHIFT_0_BIT)),
2414 CSKY_ISA_JAVA),
2415 OP16 ("bpush.w",
2416 OPCODE_INFO1 (0x14e2,
2417 (2_4, GREG0_7, OPRND_SHIFT_0_BIT)),
2418 CSKY_ISA_JAVA),
2419 OP32 ("bmset",
2420 OPCODE_INFO0 (0xc0001020),
2421 CSKY_ISA_JAVA),
2422 OP32 ("bmclr",
2423 OPCODE_INFO0 (0xc0001420),
2424 CSKY_ISA_JAVA),
2425 OP32 ("sce",
2426 OPCODE_INFO1 (0xc0001820,
2427 (21_24, IMM4b, OPRND_SHIFT_0_BIT)),
2428 CSKY_ISA_MP),
2429 OP32 ("trap",
2430 OPCODE_INFO1 (0xc0002020,
2431 (10_11, IMM2b, OPRND_SHIFT_0_BIT)),
2432 CSKYV2_ISA_E1),
2433 /* Secure/nsecure world switch. */
2434 OP32 ("wsc",
2435 OPCODE_INFO0 (0xc0003c20),
2436 CSKY_ISA_TRUST),
2437 OP32 ("mtcr",
2438 OPCODE_INFO2 (0xc0006420,
2439 (16_20, AREG, OPRND_SHIFT_0_BIT),
2440 (0_4or21_25, CTRLREG, OPRND_SHIFT_0_BIT)),
2441 CSKYV2_ISA_E1),
2442 OP32 ("mfcr",
2443 OPCODE_INFO2 (0xc0006020,
2444 (0_4, AREG, OPRND_SHIFT_0_BIT),
2445 (16_20or21_25, CTRLREG, OPRND_SHIFT_0_BIT)),
2446 CSKYV2_ISA_E1),
2447 #undef _TRANSFER
2448 #define _TRANSFER 2
2449 OP32 ("rte",
2450 OPCODE_INFO0 (0xc0004020),
2451 CSKYV2_ISA_E1),
2452 OP32 ("rfi",
2453 OPCODE_INFO0 (0xc0004420),
2454 CSKYV2_ISA_2E3),
2455 #undef _TRANSFER
2456 #define _TRANSFER 0
2457 OP32 ("stop",
2458 OPCODE_INFO0 (0xc0004820),
2459 CSKYV2_ISA_E1),
2460 OP32 ("wait",
2461 OPCODE_INFO0 (0xc0004c20),
2462 CSKYV2_ISA_E1),
2463 OP32 ("doze",
2464 OPCODE_INFO0 (0xc0005020),
2465 CSKYV2_ISA_E1),
2466 OP32 ("we",
2467 OPCODE_INFO0 (0xc0005420),
2468 CSKY_ISA_MP_1E2),
2469 OP32 ("se",
2470 OPCODE_INFO0 (0xc0005820),
2471 CSKY_ISA_MP_1E2),
2472 OP32 ("psrclr",
2473 OPCODE_INFO_LIST (0xc0007020,
2474 (21_25, PSR_BITS_LIST, OPRND_SHIFT_0_BIT)),
2475 CSKYV2_ISA_E1),
2476 OP32 ("psrset",
2477 OPCODE_INFO_LIST (0xc0007420,
2478 (21_25, PSR_BITS_LIST, OPRND_SHIFT_0_BIT)),
2479 CSKYV2_ISA_E1),
2480 DOP32 ("abs",
2481 OPCODE_INFO2 (0xc4000200,
2482 (0_4, AREG, OPRND_SHIFT_0_BIT),
2483 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2484 OPCODE_INFO1 (0xc4000200,
2485 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT)),
2486 CSKYV2_ISA_2E3),
2487 OP32 ("mvc",
2488 OPCODE_INFO1 (0xc4000500,
2489 (0_4, AREG, OPRND_SHIFT_0_BIT)),
2490 CSKYV2_ISA_1E2),
2491 OP32 ("incf",
2492 OPCODE_INFO3 (0xc4000c20,
2493 (21_25, AREG, OPRND_SHIFT_0_BIT),
2494 (16_20, AREG, OPRND_SHIFT_0_BIT),
2495 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
2496 CSKYV2_ISA_1E2),
2497 OP32 ("movf",
2498 OPCODE_INFO2 (0xc4000c20,
2499 (21_25, AREG, OPRND_SHIFT_0_BIT),
2500 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2501 CSKYV2_ISA_1E2),
2502 OP32 ("inct",
2503 OPCODE_INFO3 (0xc4000c40,
2504 (21_25, AREG, OPRND_SHIFT_0_BIT),
2505 (16_20, AREG, OPRND_SHIFT_0_BIT),
2506 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
2507 CSKYV2_ISA_1E2),
2508 OP32 ("movt",
2509 OPCODE_INFO2 (0xc4000c40,
2510 (21_25, AREG, OPRND_SHIFT_0_BIT),
2511 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2512 CSKYV2_ISA_1E2),
2513 OP32 ("decf",
2514 OPCODE_INFO3 (0xc4000c80,
2515 (21_25, AREG, OPRND_SHIFT_0_BIT),
2516 (16_20, AREG, OPRND_SHIFT_0_BIT),
2517 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
2518 CSKYV2_ISA_1E2),
2519 OP32 ("dect",
2520 OPCODE_INFO3 (0xc4000d00,
2521 (21_25, AREG, OPRND_SHIFT_0_BIT),
2522 (16_20, AREG, OPRND_SHIFT_0_BIT),
2523 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
2524 CSKYV2_ISA_1E2),
2525 OP32 ("decgt",
2526 OPCODE_INFO3 (0xc4001020,
2527 (0_4, AREG, OPRND_SHIFT_0_BIT),
2528 (16_20, AREG, OPRND_SHIFT_0_BIT),
2529 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
2530 CSKYV2_ISA_2E3),
2531 OP32 ("declt",
2532 OPCODE_INFO3 (0xc4001040,
2533 (0_4, AREG, OPRND_SHIFT_0_BIT),
2534 (16_20, AREG, OPRND_SHIFT_0_BIT),
2535 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
2536 CSKYV2_ISA_2E3),
2537 OP32 ("decne",
2538 OPCODE_INFO3 (0xc4001080,
2539 (0_4, AREG, OPRND_SHIFT_0_BIT),
2540 (16_20, AREG, OPRND_SHIFT_0_BIT),
2541 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
2542 CSKYV2_ISA_2E3),
2543 OP32 ("clrf",
2544 OPCODE_INFO1 (0xc4002c20,
2545 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2546 CSKYV2_ISA_2E3),
2547 OP32 ("clrt",
2548 OPCODE_INFO1 (0xc4002c40,
2549 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2550 CSKYV2_ISA_2E3),
2551 DOP32 ("rotli",
2552 OPCODE_INFO3 (0xc4004900,
2553 (0_4, AREG, OPRND_SHIFT_0_BIT),
2554 (16_20, AREG, OPRND_SHIFT_0_BIT),
2555 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
2556 OPCODE_INFO2 (0xc4004900,
2557 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
2558 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
2559 CSKYV2_ISA_1E2),
2560 OP32 ("lslc",
2561 OPCODE_INFO3 (0xc4004c20,
2562 (0_4, AREG, OPRND_SHIFT_0_BIT),
2563 (16_20, AREG, OPRND_SHIFT_0_BIT),
2564 (21_25, OIMM5b, OPRND_SHIFT_0_BIT)),
2565 CSKYV2_ISA_1E2),
2566 OP32 ("lsrc",
2567 OPCODE_INFO3 (0xc4004c40,
2568 (0_4, AREG, OPRND_SHIFT_0_BIT),
2569 (16_20, AREG, OPRND_SHIFT_0_BIT),
2570 (21_25, OIMM5b, OPRND_SHIFT_0_BIT)),
2571 CSKYV2_ISA_1E2),
2572 DOP32 ("asrc",
2573 OPCODE_INFO3 (0xc4004c80,
2574 (0_4, AREG, OPRND_SHIFT_0_BIT),
2575 (16_20, AREG, OPRND_SHIFT_0_BIT),
2576 (21_25, OIMM5b, OPRND_SHIFT_0_BIT)),
2577 OPCODE_INFO1 (0xc4004c80,
2578 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT)),
2579 CSKYV2_ISA_1E2),
2580 OP32 ("xsr",
2581 OPCODE_INFO3 (0xc4004d00,
2582 (0_4, AREG, OPRND_SHIFT_0_BIT),
2583 (16_20, AREG, OPRND_SHIFT_0_BIT),
2584 (21_25, OIMM5b, OPRND_SHIFT_0_BIT)),
2585 CSKYV2_ISA_1E2),
2586 OP32 ("bgenr",
2587 OPCODE_INFO2 (0xc4005040,
2588 (0_4, AREG, OPRND_SHIFT_0_BIT),
2589 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2590 CSKYV2_ISA_2E3),
2591 DOP32 ("brev",
2592 OPCODE_INFO2 (0xc4006200,
2593 (0_4, AREG, OPRND_SHIFT_0_BIT),
2594 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2595 OPCODE_INFO1 (0xc4006200,
2596 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT)),
2597 CSKYV2_ISA_2E3),
2598 OP32 ("xtrb0",
2599 OPCODE_INFO2 (0xc4007020,
2600 (0_4, AREG, OPRND_SHIFT_0_BIT),
2601 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2602 CSKYV2_ISA_1E2),
2603 OP32 ("xtrb1",
2604 OPCODE_INFO2 (0xc4007040,
2605 (0_4, AREG, OPRND_SHIFT_0_BIT),
2606 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2607 CSKYV2_ISA_1E2),
2608 OP32 ("xtrb2",
2609 OPCODE_INFO2 (0xc4007080,
2610 (0_4, AREG, OPRND_SHIFT_0_BIT),
2611 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2612 CSKYV2_ISA_1E2),
2613 OP32 ("xtrb3",
2614 OPCODE_INFO2 (0xc4007100,
2615 (0_4, AREG, OPRND_SHIFT_0_BIT),
2616 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2617 CSKYV2_ISA_1E2),
2618 OP32 ("ff0",
2619 OPCODE_INFO2 (0xc4007c20,
2620 (0_4, AREG, OPRND_SHIFT_0_BIT),
2621 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2622 CSKYV2_ISA_1E2),
2623 DOP32 ("ff1",
2624 OPCODE_INFO2 (0xc4007c40,
2625 (0_4, AREG, OPRND_SHIFT_0_BIT),
2626 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2627 OPCODE_INFO1 (0xc4007c40,
2628 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT)),
2629 CSKYV2_ISA_1E2),
2630 OP32 ("mulu",
2631 OPCODE_INFO2 (0xc4008820,
2632 (16_20, AREG, OPRND_SHIFT_0_BIT),
2633 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2634 CSKY_ISA_DSP),
2635 OP32 ("mulua",
2636 OPCODE_INFO2 (0xc4008840,
2637 (16_20, AREG, OPRND_SHIFT_0_BIT),
2638 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2639 CSKY_ISA_DSP),
2640 OP32 ("mulus",
2641 OPCODE_INFO2 (0xc4008880,
2642 (16_20, AREG, OPRND_SHIFT_0_BIT),
2643 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2644 CSKY_ISA_DSP),
2645 OP32 ("muls",
2646 OPCODE_INFO2 (0xc4008c20,
2647 (16_20, AREG, OPRND_SHIFT_0_BIT),
2648 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2649 CSKY_ISA_DSP),
2650 OP32 ("mulsa",
2651 OPCODE_INFO2 (0xc4008c40,
2652 (16_20, AREG, OPRND_SHIFT_0_BIT),
2653 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2654 CSKY_ISA_DSP),
2655 OP32 ("mulss",
2656 OPCODE_INFO2 (0xc4008c80,
2657 (16_20, AREG, OPRND_SHIFT_0_BIT),
2658 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2659 CSKY_ISA_DSP),
2660 OP32 ("mulsha",
2661 OPCODE_INFO2 (0xc4009040,
2662 (16_20, AREG, OPRND_SHIFT_0_BIT),
2663 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2664 CSKY_ISA_DSP),
2665 OP32 ("mulshs",
2666 OPCODE_INFO2 (0xc4009080,
2667 (16_20, AREG, OPRND_SHIFT_0_BIT),
2668 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2669 CSKY_ISA_DSP),
2670 OP32 ("mulswa",
2671 OPCODE_INFO2 (0xc4009440,
2672 (16_20, AREG, OPRND_SHIFT_0_BIT),
2673 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2674 CSKY_ISA_DSP),
2675 OP32 ("mulsws",
2676 OPCODE_INFO2 (0xc4009500,
2677 (16_20, AREG, OPRND_SHIFT_0_BIT),
2678 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2679 CSKY_ISA_DSP),
2680 OP32 ("mfhis",
2681 OPCODE_INFO1 (0xc4009820,
2682 (0_4, AREG, OPRND_SHIFT_0_BIT)),
2683 CSKY_ISA_DSP),
2684 OP32 ("mflos",
2685 OPCODE_INFO1 (0xc4009880,
2686 (0_4, AREG, OPRND_SHIFT_0_BIT)),
2687 CSKY_ISA_DSP),
2688 OP32 ("mvtc",
2689 OPCODE_INFO0 (0xc4009a00),
2690 CSKY_ISA_DSP),
2691 OP32 ("mfhi",
2692 OPCODE_INFO1 (0xc4009c20,
2693 (0_4, AREG, OPRND_SHIFT_0_BIT)),
2694 CSKY_ISA_DSP),
2695 OP32 ("mthi",
2696 OPCODE_INFO1 (0xc4009c40,
2697 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2698 CSKY_ISA_DSP),
2699 OP32 ("mflo",
2700 OPCODE_INFO1 (0xc4009c80,
2701 (0_4, AREG, OPRND_SHIFT_0_BIT)),
2702 CSKY_ISA_DSP),
2703 OP32 ("mtlo",
2704 OPCODE_INFO1 (0xc4009d00,
2705 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2706 CSKY_ISA_DSP),
2707 OP32 ("vmulsh",
2708 OPCODE_INFO2 (0xc400b020,
2709 (16_20, AREG, OPRND_SHIFT_0_BIT),
2710 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2711 CSKY_ISA_DSP_1E2),
2712 OP32 ("vmulsha",
2713 OPCODE_INFO2 (0xc400b040,
2714 (16_20, AREG, OPRND_SHIFT_0_BIT),
2715 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2716 CSKY_ISA_DSP_1E2),
2717 OP32 ("vmulshs",
2718 OPCODE_INFO2 (0xc400b080,
2719 (16_20, AREG, OPRND_SHIFT_0_BIT),
2720 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2721 CSKY_ISA_DSP_1E2),
2722 OP32 ("vmulsw",
2723 OPCODE_INFO2 (0xc400b420,
2724 (16_20, AREG, OPRND_SHIFT_0_BIT),
2725 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2726 CSKY_ISA_DSP_1E2),
2727 OP32 ("vmulswa",
2728 OPCODE_INFO2 (0xc400b440,
2729 (16_20, AREG, OPRND_SHIFT_0_BIT),
2730 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2731 CSKY_ISA_DSP_1E2),
2732 OP32 ("vmulsws",
2733 OPCODE_INFO2 (0xc400b480,
2734 (16_20, AREG, OPRND_SHIFT_0_BIT),
2735 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2736 CSKY_ISA_DSP_1E2),
2737 OP32 ("ldr.b",
2738 SOPCODE_INFO2 (0xd0000000,
2739 (0_4, AREG, OPRND_SHIFT_0_BIT),
2740 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2741 (5_9or21_25, AREG_WITH_LSHIFT, OPRND_SHIFT_0_BIT))),
2742 CSKYV2_ISA_2E3),
2743 OP32 ("ldr.bs",
2744 SOPCODE_INFO2 (0xd0001000,
2745 (0_4, AREG, OPRND_SHIFT_0_BIT),
2746 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2747 (5_9or21_25, AREG_WITH_LSHIFT, OPRND_SHIFT_0_BIT))),
2748 CSKYV2_ISA_2E3),
2749 OP32 ("ldr.h",
2750 SOPCODE_INFO2 (0xd0000400,
2751 (0_4, AREG, OPRND_SHIFT_0_BIT),
2752 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2753 (5_9or21_25, AREG_WITH_LSHIFT, OPRND_SHIFT_0_BIT))),
2754 CSKYV2_ISA_2E3),
2755 OP32 ("ldr.hs",
2756 SOPCODE_INFO2 (0xd0001400,
2757 (0_4, AREG, OPRND_SHIFT_0_BIT),
2758 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2759 (5_9or21_25, AREG_WITH_LSHIFT, OPRND_SHIFT_0_BIT))),
2760 CSKYV2_ISA_2E3),
2761 OP32 ("ldr.w",
2762 SOPCODE_INFO2 (0xd0000800,
2763 (0_4, AREG, OPRND_SHIFT_0_BIT),
2764 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2765 (5_9or21_25, AREG_WITH_LSHIFT, OPRND_SHIFT_0_BIT))),
2766 CSKYV2_ISA_2E3),
2767 OP32 ("ldm",
2768 OPCODE_INFO2 (0xd0001c20,
2769 (0_4or21_25, REGLIST_DASH, OPRND_SHIFT_0_BIT),
2770 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
2771 CSKYV2_ISA_1E2),
2772 OP32 ("ldq",
2773 OPCODE_INFO2 (0xd0801c23,
2774 (NONE, REGr4_r7, OPRND_SHIFT_0_BIT),
2775 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
2776 CSKYV2_ISA_2E3),
2777 OP32 ("str.b",
2778 SOPCODE_INFO2 (0xd4000000,
2779 (0_4, AREG, OPRND_SHIFT_0_BIT),
2780 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2781 (5_9or21_25, AREG_WITH_LSHIFT, OPRND_SHIFT_0_BIT))),
2782 CSKYV2_ISA_2E3),
2783 OP32 ("str.h",
2784 SOPCODE_INFO2 (0xd4000400,
2785 (0_4, AREG, OPRND_SHIFT_0_BIT),
2786 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2787 (5_9or21_25, AREG_WITH_LSHIFT, OPRND_SHIFT_0_BIT))),
2788 CSKYV2_ISA_2E3),
2789 OP32 ("str.w",
2790 SOPCODE_INFO2 (0xd4000800,
2791 (0_4, AREG, OPRND_SHIFT_0_BIT),
2792 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2793 (5_9or21_25, AREG_WITH_LSHIFT, OPRND_SHIFT_0_BIT))),
2794 CSKYV2_ISA_2E3),
2795 OP32 ("stm",
2796 OPCODE_INFO2 (0xd4001c20,
2797 (0_4or21_25, REGLIST_DASH, OPRND_SHIFT_0_BIT),
2798 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
2799 CSKYV2_ISA_1E2),
2800 OP32 ("stq",
2801 OPCODE_INFO2 (0xd4801c23,
2802 (NONE, REGr4_r7, OPRND_SHIFT_0_BIT),
2803 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
2804 CSKYV2_ISA_2E3),
2805 OP32 ("ld.bs",
2806 SOPCODE_INFO2 (0xd8004000,
2807 (21_25, AREG, OPRND_SHIFT_0_BIT),
2808 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2809 (0_11, IMM_LDST, OPRND_SHIFT_0_BIT))),
2810 CSKYV2_ISA_1E2),
2811 OP32 ("ldbs",
2812 SOPCODE_INFO2 (0xd8004000,
2813 (21_25, AREG, OPRND_SHIFT_0_BIT),
2814 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2815 (0_11, IMM_LDST, OPRND_SHIFT_0_BIT))),
2816 CSKYV2_ISA_1E2),
2817 OP32 ("ld.hs",
2818 SOPCODE_INFO2 (0xd8005000,
2819 (21_25, AREG, OPRND_SHIFT_0_BIT),
2820 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2821 (0_11, IMM_LDST, OPRND_SHIFT_1_BIT))),
2822 CSKYV2_ISA_1E2),
2823 OP32 ("ldhs",
2824 SOPCODE_INFO2 (0xd8005000,
2825 (21_25, AREG, OPRND_SHIFT_0_BIT),
2826 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2827 (0_11, IMM_LDST, OPRND_SHIFT_1_BIT))),
2828 CSKYV2_ISA_1E2),
2829 OP32 ("ld.d",
2830 SOPCODE_INFO2 (0xd8003000,
2831 (21_25, AREG, OPRND_SHIFT_0_BIT),
2832 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2833 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
2834 CSKYV2_ISA_3E7),
2835 OP32 ("ldex.w",
2836 SOPCODE_INFO2 (0xd8007000,
2837 (21_25, AREG, OPRND_SHIFT_0_BIT),
2838 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2839 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
2840 CSKY_ISA_MP_1E2),
2841 OP32 ("ldexw",
2842 SOPCODE_INFO2 (0xd8007000,
2843 (21_25, AREG, OPRND_SHIFT_0_BIT),
2844 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2845 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
2846 CSKY_ISA_MP_1E2),
2847 OP32 ("ldex",
2848 SOPCODE_INFO2 (0xd8007000,
2849 (21_25, AREG, OPRND_SHIFT_0_BIT),
2850 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2851 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
2852 CSKY_ISA_MP_1E2),
2853 OP32 ("st.d",
2854 SOPCODE_INFO2 (0xdc003000,
2855 (21_25, AREG, OPRND_SHIFT_0_BIT),
2856 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2857 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
2858 CSKYV2_ISA_3E7),
2859 OP32 ("stex.w",
2860 SOPCODE_INFO2 (0xdc007000,
2861 (21_25, AREG, OPRND_SHIFT_0_BIT),
2862 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2863 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
2864 CSKY_ISA_MP_1E2),
2865 OP32 ("stexw",
2866 SOPCODE_INFO2 (0xdc007000,
2867 (21_25, AREG, OPRND_SHIFT_0_BIT),
2868 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2869 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
2870 CSKY_ISA_MP_1E2),
2871 OP32 ("stex",
2872 SOPCODE_INFO2 (0xdc007000,
2873 (21_25, AREG, OPRND_SHIFT_0_BIT),
2874 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2875 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
2876 CSKY_ISA_MP_1E2),
2877 DOP32 ("andi",
2878 OPCODE_INFO3 (0xe4002000,
2879 (21_25, AREG, OPRND_SHIFT_0_BIT),
2880 (16_20, AREG, OPRND_SHIFT_0_BIT),
2881 (0_11, IMM12b, OPRND_SHIFT_0_BIT)),
2882 OPCODE_INFO2 (0xe4002000,
2883 (16_20or21_25, DUP_AREG, OPRND_SHIFT_0_BIT),
2884 (0_11, IMM12b, OPRND_SHIFT_0_BIT)),
2885 CSKYV2_ISA_1E2),
2886 OP32 ("andni",
2887 OPCODE_INFO3 (0xe4003000,
2888 (21_25, AREG, OPRND_SHIFT_0_BIT),
2889 (16_20, AREG, OPRND_SHIFT_0_BIT),
2890 (0_11, IMM12b, OPRND_SHIFT_0_BIT)),
2891 CSKYV2_ISA_1E2),
2892 OP32 ("xori",
2893 OPCODE_INFO3 (0xe4004000,
2894 (21_25, AREG, OPRND_SHIFT_0_BIT),
2895 (16_20, AREG, OPRND_SHIFT_0_BIT),
2896 (0_11, IMM12b, OPRND_SHIFT_0_BIT)),
2897 CSKYV2_ISA_1E2),
2898 OP32 ("ins",
2899 OPCODE_INFO4 (0xc4005c00,
2900 (21_25, AREG, OPRND_SHIFT_0_BIT),
2901 (16_20, AREG, OPRND_SHIFT_0_BIT),
2902 (5_9, MSB2SIZE, OPRND_SHIFT_0_BIT),
2903 (0_4, LSB2SIZE, OPRND_SHIFT_0_BIT)),
2904 CSKYV2_ISA_2E3),
2905 #undef _TRANSFER
2906 #undef _RELOC32
2907 #define _TRANSFER 1
2908 #define _RELOC32 BFD_RELOC_CKCORE_PCREL_IMM16BY4
2909 OP32 ("jmpi",
2910 OPCODE_INFO1 (0xeac00000,
2911 (0_15, OFF16b, OPRND_SHIFT_2_BIT)),
2912 CSKYV2_ISA_2E3),
2913 #undef _TRANSFER
2914 #undef _RELOC32
2915 #define _TRANSFER 0
2916 #define _RELOC32 0
2917
2918 OP32 ("fadds",
2919 OPCODE_INFO3 (0xf4000000,
2920 (0_3, FREG, OPRND_SHIFT_0_BIT),
2921 (16_19, FREG, OPRND_SHIFT_0_BIT),
2922 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2923 CSKY_ISA_FLOAT_E1),
2924 OP32 ("fsubs",
2925 OPCODE_INFO3 (0xf4000020,
2926 (0_3, FREG, OPRND_SHIFT_0_BIT),
2927 (16_19, FREG, OPRND_SHIFT_0_BIT),
2928 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2929 CSKY_ISA_FLOAT_E1),
2930 OP32 ("fmovs",
2931 OPCODE_INFO2 (0xf4000080,
2932 (0_3, FREG, OPRND_SHIFT_0_BIT),
2933 (16_19, FREG, OPRND_SHIFT_0_BIT)),
2934 CSKY_ISA_FLOAT_E1),
2935 OP32 ("fabss",
2936 OPCODE_INFO2 (0xf40000c0,
2937 (0_3, FREG, OPRND_SHIFT_0_BIT),
2938 (16_19, FREG, OPRND_SHIFT_0_BIT)),
2939 CSKY_ISA_FLOAT_E1),
2940 OP32 ("fnegs",
2941 OPCODE_INFO2 (0xf40000e0,
2942 (0_3, FREG, OPRND_SHIFT_0_BIT),
2943 (16_19, FREG, OPRND_SHIFT_0_BIT)),
2944 CSKY_ISA_FLOAT_E1),
2945 OP32 ("fcmpzhss",
2946 OPCODE_INFO1 (0xf4000100,
2947 (16_19, FREG, OPRND_SHIFT_0_BIT)),
2948 CSKY_ISA_FLOAT_E1),
2949 OP32 ("fcmpzlss",
2950 OPCODE_INFO1 (0xf4000120,
2951 (16_19, FREG, OPRND_SHIFT_0_BIT)),
2952 CSKY_ISA_FLOAT_E1),
2953 OP32 ("fcmpznes",
2954 OPCODE_INFO1 (0xf4000140,
2955 (16_19, FREG, OPRND_SHIFT_0_BIT)),
2956 CSKY_ISA_FLOAT_E1),
2957 OP32 ("fcmpzuos",
2958 OPCODE_INFO1 (0xf4000160,
2959 (16_19, FREG, OPRND_SHIFT_0_BIT)),
2960 CSKY_ISA_FLOAT_E1),
2961 OP32 ("fcmphss",
2962 OPCODE_INFO2 (0xf4000180,
2963 (16_19, FREG, OPRND_SHIFT_0_BIT),
2964 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2965 CSKY_ISA_FLOAT_E1),
2966 OP32 ("fcmplts",
2967 OPCODE_INFO2 (0xf40001a0,
2968 (16_19, FREG, OPRND_SHIFT_0_BIT),
2969 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2970 CSKY_ISA_FLOAT_E1),
2971 OP32 ("fcmpnes",
2972 OPCODE_INFO2 (0xf40001c0,
2973 (16_19, FREG, OPRND_SHIFT_0_BIT),
2974 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2975 CSKY_ISA_FLOAT_E1),
2976 OP32 ("fcmpuos",
2977 OPCODE_INFO2 (0xf40001e0,
2978 (16_19, FREG, OPRND_SHIFT_0_BIT),
2979 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2980 CSKY_ISA_FLOAT_E1),
2981 OP32 ("fmuls",
2982 OPCODE_INFO3 (0xf4000200,
2983 (0_3, FREG, OPRND_SHIFT_0_BIT),
2984 (16_19, FREG, OPRND_SHIFT_0_BIT),
2985 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2986 CSKY_ISA_FLOAT_E1),
2987 OP32 ("fmacs",
2988 OPCODE_INFO3 (0xf4000280,
2989 (0_3, FREG, OPRND_SHIFT_0_BIT),
2990 (16_19, FREG, OPRND_SHIFT_0_BIT),
2991 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2992 CSKY_ISA_FLOAT_E1),
2993 OP32 ("fmscs",
2994 OPCODE_INFO3 (0xf40002a0,
2995 (0_3, FREG, OPRND_SHIFT_0_BIT),
2996 (16_19, FREG, OPRND_SHIFT_0_BIT),
2997 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2998 CSKY_ISA_FLOAT_E1),
2999 OP32 ("fnmacs",
3000 OPCODE_INFO3 (0xf40002c0,
3001 (0_3, FREG, OPRND_SHIFT_0_BIT),
3002 (16_19, FREG, OPRND_SHIFT_0_BIT),
3003 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3004 CSKY_ISA_FLOAT_E1),
3005 OP32 ("fnmscs",
3006 OPCODE_INFO3 (0xf40002e0,
3007 (0_3, FREG, OPRND_SHIFT_0_BIT),
3008 (16_19, FREG, OPRND_SHIFT_0_BIT),
3009 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3010 CSKY_ISA_FLOAT_E1),
3011 OP32 ("fnmuls",
3012 OPCODE_INFO3 (0xf4000220,
3013 (0_3, FREG, OPRND_SHIFT_0_BIT),
3014 (16_19, FREG, OPRND_SHIFT_0_BIT),
3015 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3016 CSKY_ISA_FLOAT_E1),
3017 OP32 ("fdivs",
3018 OPCODE_INFO3 (0xf4000300,
3019 (0_3, FREG, OPRND_SHIFT_0_BIT),
3020 (16_19, FREG, OPRND_SHIFT_0_BIT),
3021 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3022 CSKY_ISA_FLOAT_E1),
3023 OP32 ("frecips",
3024 OPCODE_INFO2 (0xf4000320,
3025 (0_3, FREG, OPRND_SHIFT_0_BIT),
3026 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3027 CSKY_ISA_FLOAT_E1),
3028 OP32 ("fsqrts",
3029 OPCODE_INFO2 (0xf4000340,
3030 (0_3, FREG, OPRND_SHIFT_0_BIT),
3031 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3032 CSKY_ISA_FLOAT_E1),
3033 OP32 ("faddd",
3034 OPCODE_INFO3 (0xf4000800,
3035 (0_3, FREG, OPRND_SHIFT_0_BIT),
3036 (16_19, FREG, OPRND_SHIFT_0_BIT),
3037 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3038 CSKY_ISA_FLOAT_1E2),
3039 OP32 ("fsubd",
3040 OPCODE_INFO3 (0xf4000820,
3041 (0_3, FREG, OPRND_SHIFT_0_BIT),
3042 (16_19, FREG, OPRND_SHIFT_0_BIT),
3043 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3044 CSKY_ISA_FLOAT_1E2),
3045 OP32 ("fmovd",
3046 OPCODE_INFO2 (0xf4000880,
3047 (0_3, FREG, OPRND_SHIFT_0_BIT),
3048 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3049 CSKY_ISA_FLOAT_1E2),
3050 OP32 ("fabsd",
3051 OPCODE_INFO2 (0xf40008c0,
3052 (0_3, FREG, OPRND_SHIFT_0_BIT),
3053 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3054 CSKY_ISA_FLOAT_1E2),
3055 OP32 ("fnegd",
3056 OPCODE_INFO2 (0xf40008e0,
3057 (0_3, FREG, OPRND_SHIFT_0_BIT),
3058 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3059 CSKY_ISA_FLOAT_1E2),
3060 OP32 ("fcmpzhsd",
3061 OPCODE_INFO1 (0xf4000900,
3062 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3063 CSKY_ISA_FLOAT_1E2),
3064 OP32 ("fcmpzlsd",
3065 OPCODE_INFO1 (0xf4000920,
3066 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3067 CSKY_ISA_FLOAT_1E2),
3068 OP32 ("fcmpzned",
3069 OPCODE_INFO1 (0xf4000940,
3070 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3071 CSKY_ISA_FLOAT_1E2),
3072 OP32 ("fcmpzuod",
3073 OPCODE_INFO1 (0xf4000960,
3074 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3075 CSKY_ISA_FLOAT_1E2),
3076 OP32 ("fcmphsd",
3077 OPCODE_INFO2 (0xf4000980,
3078 (16_19, FREG, OPRND_SHIFT_0_BIT),
3079 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3080 CSKY_ISA_FLOAT_1E2),
3081 OP32 ("fcmpltd",
3082 OPCODE_INFO2 (0xf40009a0,
3083 (16_19, FREG, OPRND_SHIFT_0_BIT),
3084 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3085 CSKY_ISA_FLOAT_1E2),
3086 OP32 ("fcmpned",
3087 OPCODE_INFO2 (0xf40009c0,
3088 (16_19, FREG, OPRND_SHIFT_0_BIT),
3089 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3090 CSKY_ISA_FLOAT_1E2),
3091 OP32 ("fcmpuod",
3092 OPCODE_INFO2 (0xf40009e0,
3093 (16_19, FREG, OPRND_SHIFT_0_BIT),
3094 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3095 CSKY_ISA_FLOAT_1E2),
3096 OP32 ("fmuld",
3097 OPCODE_INFO3 (0xf4000a00,
3098 (0_3, FREG, OPRND_SHIFT_0_BIT),
3099 (16_19, FREG, OPRND_SHIFT_0_BIT),
3100 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3101 CSKY_ISA_FLOAT_1E2),
3102 OP32 ("fnmuld",
3103 OPCODE_INFO3 (0xf4000a20,
3104 (0_3, FREG, OPRND_SHIFT_0_BIT),
3105 (16_19, FREG, OPRND_SHIFT_0_BIT),
3106 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3107 CSKY_ISA_FLOAT_1E2),
3108 OP32 ("fmacd",
3109 OPCODE_INFO3 (0xf4000a80,
3110 (0_3, FREG, OPRND_SHIFT_0_BIT),
3111 (16_19, FREG, OPRND_SHIFT_0_BIT),
3112 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3113 CSKY_ISA_FLOAT_1E2),
3114 OP32 ("fmscd",
3115 OPCODE_INFO3 (0xf4000aa0,
3116 (0_3, FREG, OPRND_SHIFT_0_BIT),
3117 (16_19, FREG, OPRND_SHIFT_0_BIT),
3118 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3119 CSKY_ISA_FLOAT_1E2),
3120 OP32 ("fnmacd",
3121 OPCODE_INFO3 (0xf4000ac0,
3122 (0_3, FREG, OPRND_SHIFT_0_BIT),
3123 (16_19, FREG, OPRND_SHIFT_0_BIT),
3124 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3125 CSKY_ISA_FLOAT_1E2),
3126 OP32 ("fnmscd",
3127 OPCODE_INFO3 (0xf4000ae0,
3128 (0_3, FREG, OPRND_SHIFT_0_BIT),
3129 (16_19, FREG, OPRND_SHIFT_0_BIT),
3130 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3131 CSKY_ISA_FLOAT_1E2),
3132 OP32 ("fdivd",
3133 OPCODE_INFO3 (0xf4000b00,
3134 (0_3, FREG, OPRND_SHIFT_0_BIT),
3135 (16_19, FREG, OPRND_SHIFT_0_BIT),
3136 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3137 CSKY_ISA_FLOAT_1E2),
3138 OP32 ("frecipd",
3139 OPCODE_INFO2 (0xf4000b20,
3140 (0_3, FREG, OPRND_SHIFT_0_BIT),
3141 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3142 CSKY_ISA_FLOAT_1E2),
3143 OP32 ("fsqrtd",
3144 OPCODE_INFO2 (0xf4000b40,
3145 (0_3, FREG, OPRND_SHIFT_0_BIT),
3146 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3147 CSKY_ISA_FLOAT_1E2),
3148 OP32 ("faddm",
3149 OPCODE_INFO3 (0xf4001000,
3150 (0_3, FREG, OPRND_SHIFT_0_BIT),
3151 (16_19, FREG, OPRND_SHIFT_0_BIT),
3152 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3153 CSKY_ISA_FLOAT_1E2),
3154 OP32 ("fsubm",
3155 OPCODE_INFO3 (0xf4001020,
3156 (0_3, FREG, OPRND_SHIFT_0_BIT),
3157 (16_19, FREG, OPRND_SHIFT_0_BIT),
3158 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3159 CSKY_ISA_FLOAT_1E2),
3160 OP32 ("fmovm",
3161 OPCODE_INFO2 (0xf4001080,
3162 (0_3, FREG, OPRND_SHIFT_0_BIT),
3163 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3164 CSKY_ISA_FLOAT_1E2),
3165 OP32 ("fabsm",
3166 OPCODE_INFO2 (0xf40010c0,
3167 (0_3, FREG, OPRND_SHIFT_0_BIT),
3168 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3169 CSKY_ISA_FLOAT_1E2),
3170 OP32 ("fnegm",
3171 OPCODE_INFO2 (0xf40010e0,
3172 (0_3, FREG, OPRND_SHIFT_0_BIT),
3173 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3174 CSKY_ISA_FLOAT_1E2),
3175 OP32 ("fmulm",
3176 OPCODE_INFO3 (0xf4001200,
3177 (0_3, FREG, OPRND_SHIFT_0_BIT),
3178 (16_19, FREG, OPRND_SHIFT_0_BIT),
3179 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3180 CSKY_ISA_FLOAT_1E2),
3181 OP32 ("fnmulm",
3182 OPCODE_INFO3 (0xf4001220,
3183 (0_3, FREG, OPRND_SHIFT_0_BIT),
3184 (16_19, FREG, OPRND_SHIFT_0_BIT),
3185 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3186 CSKY_ISA_FLOAT_1E2),
3187 OP32 ("fmacm",
3188 OPCODE_INFO3 (0xf4001280,
3189 (0_3, FREG, OPRND_SHIFT_0_BIT),
3190 (16_19, FREG, OPRND_SHIFT_0_BIT),
3191 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3192 CSKY_ISA_FLOAT_1E2),
3193 OP32 ("fmscm",
3194 OPCODE_INFO3 (0xf40012a0,
3195 (0_3, FREG, OPRND_SHIFT_0_BIT),
3196 (16_19, FREG, OPRND_SHIFT_0_BIT),
3197 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3198 CSKY_ISA_FLOAT_1E2),
3199 OP32 ("fnmacm",
3200 OPCODE_INFO3 (0xf40012c0,
3201 (0_3, FREG, OPRND_SHIFT_0_BIT),
3202 (16_19, FREG, OPRND_SHIFT_0_BIT),
3203 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3204 CSKY_ISA_FLOAT_1E2),
3205 OP32 ("fnmscm",
3206 OPCODE_INFO3 (0xf40012e0,
3207 (0_3, FREG, OPRND_SHIFT_0_BIT),
3208 (16_19, FREG, OPRND_SHIFT_0_BIT),
3209 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3210 CSKY_ISA_FLOAT_1E2),
3211 OP32 ("fstosi.rn",
3212 OPCODE_INFO2 (0xf4001800,
3213 (0_3, FREG, OPRND_SHIFT_0_BIT),
3214 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3215 CSKY_ISA_FLOAT_E1),
3216 OP32 ("fstosi.rz",
3217 OPCODE_INFO2 (0xf4001820,
3218 (0_3, FREG, OPRND_SHIFT_0_BIT),
3219 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3220 CSKY_ISA_FLOAT_E1),
3221 OP32 ("fstosi.rpi",
3222 OPCODE_INFO2 (0xf4001840,
3223 (0_3, FREG, OPRND_SHIFT_0_BIT),
3224 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3225 CSKY_ISA_FLOAT_E1),
3226 OP32 ("fstosi.rni",
3227 OPCODE_INFO2 (0xf4001860,
3228 (0_3, FREG, OPRND_SHIFT_0_BIT),
3229 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3230 CSKY_ISA_FLOAT_E1),
3231 OP32 ("fstoui.rn",
3232 OPCODE_INFO2 (0xf4001880,
3233 (0_3, FREG, OPRND_SHIFT_0_BIT),
3234 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3235 CSKY_ISA_FLOAT_E1),
3236 OP32 ("fstoui.rz",
3237 OPCODE_INFO2 (0xf40018a0,
3238 (0_3, FREG, OPRND_SHIFT_0_BIT),
3239 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3240 CSKY_ISA_FLOAT_E1),
3241 OP32 ("fstoui.rpi",
3242 OPCODE_INFO2 (0xf40018c0,
3243 (0_3, FREG, OPRND_SHIFT_0_BIT),
3244 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3245 CSKY_ISA_FLOAT_E1),
3246 OP32 ("fstoui.rni",
3247 OPCODE_INFO2 (0xf40018e0,
3248 (0_3, FREG, OPRND_SHIFT_0_BIT),
3249 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3250 CSKY_ISA_FLOAT_E1),
3251 OP32 ("fdtosi.rn",
3252 OPCODE_INFO2 (0xf4001900,
3253 (0_3, FREG, OPRND_SHIFT_0_BIT),
3254 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3255 CSKY_ISA_FLOAT_1E2),
3256 OP32 ("fdtosi.rz",
3257 OPCODE_INFO2 (0xf4001920,
3258 (0_3, FREG, OPRND_SHIFT_0_BIT),
3259 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3260 CSKY_ISA_FLOAT_1E2),
3261 OP32 ("fdtosi.rpi",
3262 OPCODE_INFO2 (0xf4001940,
3263 (0_3, FREG, OPRND_SHIFT_0_BIT),
3264 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3265 CSKY_ISA_FLOAT_1E2),
3266 OP32 ("fdtosi.rni",
3267 OPCODE_INFO2 (0xf4001960,
3268 (0_3, FREG, OPRND_SHIFT_0_BIT),
3269 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3270 CSKY_ISA_FLOAT_1E2),
3271 OP32 ("fdtoui.rn",
3272 OPCODE_INFO2 (0xf4001980,
3273 (0_3, FREG, OPRND_SHIFT_0_BIT),
3274 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3275 CSKY_ISA_FLOAT_1E2),
3276 OP32 ("fdtoui.rz",
3277 OPCODE_INFO2 (0xf40019a0,
3278 (0_3, FREG, OPRND_SHIFT_0_BIT),
3279 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3280 CSKY_ISA_FLOAT_1E2),
3281 OP32 ("fdtoui.rpi",
3282 OPCODE_INFO2 (0xf40019c0,
3283 (0_3, FREG, OPRND_SHIFT_0_BIT),
3284 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3285 CSKY_ISA_FLOAT_1E2),
3286 OP32 ("fdtoui.rni",
3287 OPCODE_INFO2 (0xf40019e0,
3288 (0_3, FREG, OPRND_SHIFT_0_BIT),
3289 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3290 CSKY_ISA_FLOAT_1E2),
3291 OP32 ("fsitos",
3292 OPCODE_INFO2 (0xf4001a00,
3293 (0_3, FREG, OPRND_SHIFT_0_BIT),
3294 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3295 CSKY_ISA_FLOAT_E1),
3296 OP32 ("fuitos",
3297 OPCODE_INFO2 (0xf4001a20,
3298 (0_3, FREG, OPRND_SHIFT_0_BIT),
3299 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3300 CSKY_ISA_FLOAT_E1),
3301 OP32 ("fsitod",
3302 OPCODE_INFO2 (0xf4001a80,
3303 (0_3, FREG, OPRND_SHIFT_0_BIT),
3304 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3305 CSKY_ISA_FLOAT_1E2),
3306 OP32 ("fuitod",
3307 OPCODE_INFO2 (0xf4001aa0,
3308 (0_3, FREG, OPRND_SHIFT_0_BIT),
3309 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3310 CSKY_ISA_FLOAT_1E2),
3311 OP32 ("fdtos",
3312 OPCODE_INFO2 (0xf4001ac0,
3313 (0_3, FREG, OPRND_SHIFT_0_BIT),
3314 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3315 CSKY_ISA_FLOAT_1E2),
3316 OP32 ("fstod",
3317 OPCODE_INFO2 (0xf4001ae0,
3318 (0_3, FREG, OPRND_SHIFT_0_BIT),
3319 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3320 CSKY_ISA_FLOAT_1E2),
3321 OP32 ("fmfvrh",
3322 OPCODE_INFO2 (0xf4001b00,
3323 (0_4, AREG, OPRND_SHIFT_0_BIT),
3324 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3325 CSKY_ISA_FLOAT_1E2),
3326 OP32 ("fmfvrl",
3327 OPCODE_INFO2 (0xf4001b20,
3328 (0_4, AREG, OPRND_SHIFT_0_BIT),
3329 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3330 CSKY_ISA_FLOAT_E1),
3331 OP32 ("fmtvrh",
3332 OPCODE_INFO2 (0xf4001b40,
3333 (0_3, FREG, OPRND_SHIFT_0_BIT),
3334 (16_20, AREG, OPRND_SHIFT_0_BIT)),
3335 CSKY_ISA_FLOAT_1E2),
3336 OP32 ("fmtvrl",
3337 OPCODE_INFO2 (0xf4001b60,
3338 (0_3, FREG, OPRND_SHIFT_0_BIT),
3339 (16_20, AREG, OPRND_SHIFT_0_BIT)),
3340 CSKY_ISA_FLOAT_E1),
3341 OP32 ("flds",
3342 SOPCODE_INFO2 (0xf4002000,
3343 (0_3, FREG, OPRND_SHIFT_0_BIT),
3344 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3345 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_2_BIT))),
3346 CSKY_ISA_FLOAT_E1),
3347 OP32 ("fldd",
3348 SOPCODE_INFO2 (0xf4002100,
3349 (0_3, FREG, OPRND_SHIFT_0_BIT),
3350 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3351 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_2_BIT))),
3352 CSKY_ISA_FLOAT_1E2),
3353 OP32 ("fldm",
3354 SOPCODE_INFO2 (0xf4002200,
3355 (0_3, FREG, OPRND_SHIFT_0_BIT),
3356 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3357 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_3_BIT))),
3358 CSKY_ISA_FLOAT_1E2),
3359 OP32 ("fsts",
3360 SOPCODE_INFO2 (0xf4002400,
3361 (0_3, FREG, OPRND_SHIFT_0_BIT),
3362 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3363 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_2_BIT))),
3364 CSKY_ISA_FLOAT_E1),
3365 OP32 ("fstd",
3366 SOPCODE_INFO2 (0xf4002500,
3367 (0_3, FREG, OPRND_SHIFT_0_BIT),
3368 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3369 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_2_BIT))),
3370 CSKY_ISA_FLOAT_1E2),
3371 OP32 ("fstm",
3372 SOPCODE_INFO2 (0xf4002600,
3373 (0_3, FREG, OPRND_SHIFT_0_BIT),
3374 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3375 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_3_BIT))),
3376 CSKY_ISA_FLOAT_1E2),
3377 OP32 ("fldrs",
3378 SOPCODE_INFO2 (0xf4002800,
3379 (0_3, FREG, OPRND_SHIFT_0_BIT),
3380 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3381 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
3382 CSKY_ISA_FLOAT_E1),
3383 OP32 ("fstrs",
3384 SOPCODE_INFO2 (0xf4002c00,
3385 (0_3, FREG, OPRND_SHIFT_0_BIT),
3386 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3387 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
3388 CSKY_ISA_FLOAT_E1),
3389 OP32 ("fldrd",
3390 SOPCODE_INFO2 (0xf4002900,
3391 (0_3, FREG, OPRND_SHIFT_0_BIT),
3392 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3393 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
3394 CSKY_ISA_FLOAT_1E2),
3395 OP32 ("fldrm",
3396 SOPCODE_INFO2 (0xf4002a00,
3397 (0_3, FREG, OPRND_SHIFT_0_BIT),
3398 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3399 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
3400 CSKY_ISA_FLOAT_1E2),
3401 OP32 ("fstrd",
3402 SOPCODE_INFO2 (0xf4002d00,
3403 (0_3, FREG, OPRND_SHIFT_0_BIT),
3404 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3405 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
3406 CSKY_ISA_FLOAT_1E2),
3407 OP32 ("fstrm",
3408 SOPCODE_INFO2 (0xf4002e00,
3409 (0_3, FREG, OPRND_SHIFT_0_BIT),
3410 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3411 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
3412 CSKY_ISA_FLOAT_1E2),
3413 OP32 ("fldms",
3414 OPCODE_INFO2 (0xf4003000,
3415 (0_3or21_24, FREGLIST_DASH, OPRND_SHIFT_0_BIT),
3416 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
3417 CSKY_ISA_FLOAT_E1),
3418 OP32 ("fldmd",
3419 OPCODE_INFO2 (0xf4003100,
3420 (0_3or21_24, FREGLIST_DASH, OPRND_SHIFT_0_BIT),
3421 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
3422 CSKY_ISA_FLOAT_1E2),
3423 OP32 ("fldmm",
3424 OPCODE_INFO2 (0xf4003200,
3425 (0_3or21_24, FREGLIST_DASH, OPRND_SHIFT_0_BIT),
3426 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
3427 CSKY_ISA_FLOAT_1E2),
3428 OP32 ("fstms",
3429 OPCODE_INFO2 (0xf4003400,
3430 (0_3or21_24, FREGLIST_DASH, OPRND_SHIFT_0_BIT),
3431 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
3432 CSKY_ISA_FLOAT_E1),
3433 OP32 ("fstmd",
3434 OPCODE_INFO2 (0xf4003500,
3435 (0_3or21_24, FREGLIST_DASH, OPRND_SHIFT_0_BIT),
3436 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
3437 CSKY_ISA_FLOAT_1E2),
3438 OP32 ("fstmm",
3439 OPCODE_INFO2 (0xf4003600,
3440 (0_3or21_24, FREGLIST_DASH, OPRND_SHIFT_0_BIT),
3441 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
3442 CSKY_ISA_FLOAT_1E2),
3443 DOP32 ("idly",
3444 OPCODE_INFO1 (0xc0001c20,
3445 (21_25, OIMM5b_IDLY, OPRND_SHIFT_0_BIT)),
3446 OPCODE_INFO0 (0xc0601c20),
3447 CSKYV2_ISA_E1),
3448
3449 #undef _RELOC32
3450 #define _RELOC32 BFD_RELOC_CKCORE_PCREL_IMM18BY2
3451 OP32 ("grs",
3452 OPCODE_INFO2 (0xcc0c0000,
3453 (21_25, AREG, OPRND_SHIFT_0_BIT),
3454 (0_17, IMM_OFF18b, OPRND_SHIFT_1_BIT)),
3455 CSKYV2_ISA_2E3),
3456 #undef _RELOC32
3457 #define _RELOC32 0
3458 DOP32 ("ixh",
3459 OPCODE_INFO3 (0xc4000820,
3460 (0_4, AREG, OPRND_SHIFT_0_BIT),
3461 (16_20, AREG, OPRND_SHIFT_0_BIT),
3462 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3463 OPCODE_INFO2 (0xc4000820,
3464 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3465 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3466 CSKYV2_ISA_1E2),
3467 DOP32 ("ixw",
3468 OPCODE_INFO3 (0xc4000840,
3469 (0_4, AREG, OPRND_SHIFT_0_BIT),
3470 (16_20, AREG, OPRND_SHIFT_0_BIT),
3471 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3472 OPCODE_INFO2 (0xc4000840,
3473 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3474 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3475 CSKYV2_ISA_1E2),
3476 OP32 ("ixd",
3477 OPCODE_INFO3 (0xc4000880,
3478 (0_4, AREG, OPRND_SHIFT_0_BIT),
3479 (16_20, AREG, OPRND_SHIFT_0_BIT),
3480 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3481 CSKYV2_ISA_2E3),
3482 DOP32 ("divu",
3483 OPCODE_INFO3 (0xc4008020,
3484 (0_4, AREG, OPRND_SHIFT_0_BIT),
3485 (16_20, AREG, OPRND_SHIFT_0_BIT),
3486 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3487 OPCODE_INFO2 (0xc4008020,
3488 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3489 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3490 CSKYV2_ISA_2E3),
3491 DOP32 ("divs",
3492 OPCODE_INFO3 (0xc4008040,
3493 (0_4, AREG, OPRND_SHIFT_0_BIT),
3494 (16_20, AREG, OPRND_SHIFT_0_BIT),
3495 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3496 OPCODE_INFO2 (0xc4008040,
3497 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3498 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3499 CSKYV2_ISA_2E3),
3500 OP32 ("pldr",
3501 SOPCODE_INFO1 (0xd8006000,
3502 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3503 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
3504 CSKY_ISA_CACHE),
3505 OP32 ("pldw",
3506 SOPCODE_INFO1 (0xdc006000,
3507 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3508 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
3509 CSKY_ISA_CACHE),
3510 OP32 ("cprgr",
3511 SOPCODE_INFO2 (0xfc000000,
3512 (16_20, AREG, OPRND_SHIFT_0_BIT),
3513 ABRACKET_OPRND ((21_25, IMM5b, OPRND_SHIFT_0_BIT),
3514 (0_11 , IMM12b, OPRND_SHIFT_0_BIT))),
3515 CSKYV2_ISA_E1),
3516 OP32 ("cpwgr",
3517 SOPCODE_INFO2 (0xfc001000,
3518 (16_20, AREG, OPRND_SHIFT_0_BIT),
3519 ABRACKET_OPRND ((21_25, IMM5b, OPRND_SHIFT_0_BIT),
3520 (0_11 , IMM12b, OPRND_SHIFT_0_BIT))),
3521 CSKYV2_ISA_E1),
3522 OP32 ("cprcr",
3523 SOPCODE_INFO2 (0xfc002000,
3524 (16_20, AREG, OPRND_SHIFT_0_BIT),
3525 ABRACKET_OPRND ((21_25, IMM5b, OPRND_SHIFT_0_BIT),
3526 (0_11 , IMM12b, OPRND_SHIFT_0_BIT))),
3527 CSKYV2_ISA_E1),
3528 OP32 ("cpwcr",
3529 SOPCODE_INFO2 (0xfc003000,
3530 (16_20, AREG, OPRND_SHIFT_0_BIT),
3531 ABRACKET_OPRND ((21_25, IMM5b, OPRND_SHIFT_0_BIT),
3532 (0_11 , IMM12b, OPRND_SHIFT_0_BIT))),
3533 CSKYV2_ISA_E1),
3534 OP32 ("cprc",
3535 SOPCODE_INFO1 (0xfc004000,
3536 ABRACKET_OPRND ((21_25, IMM5b, OPRND_SHIFT_0_BIT),
3537 (0_11, IMM12b, OPRND_SHIFT_0_BIT))),
3538 CSKYV2_ISA_E1),
3539 OP32 ("cpop",
3540 SOPCODE_INFO1 (0xfc008000,
3541 ABRACKET_OPRND ((21_25, IMM5b, OPRND_SHIFT_0_BIT),
3542 (0_14or16_20 , IMM15b, OPRND_SHIFT_0_BIT))),
3543 CSKYV2_ISA_E1),
3544
3545 OP16_OP32 ("push",
3546 OPCODE_INFO_LIST (0x14c0,
3547 (0_4, REGLIST_DASH_COMMA, OPRND_SHIFT_0_BIT)),
3548 CSKYV2_ISA_E1,
3549 OPCODE_INFO_LIST (0xebe00000,
3550 (0_8, REGLIST_DASH_COMMA, OPRND_SHIFT_0_BIT)),
3551 CSKYV2_ISA_2E3),
3552 #undef _TRANSFER
3553 #define _TRANSFER 2
3554 OP16_OP32 ("pop",
3555 OPCODE_INFO_LIST (0x1480,
3556 (0_4, REGLIST_DASH_COMMA, OPRND_SHIFT_0_BIT)),
3557 CSKYV2_ISA_E1,
3558 OPCODE_INFO_LIST (0xebc00000,
3559 (0_8, REGLIST_DASH_COMMA, OPRND_SHIFT_0_BIT)),
3560 CSKYV2_ISA_2E3),
3561 #undef _TRANSFER
3562 #define _TRANSFER 0
3563 OP16_OP32 ("movi",
3564 OPCODE_INFO2 (0x3000,
3565 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3566 (0_7, IMM8b, OPRND_SHIFT_0_BIT)),
3567 CSKYV2_ISA_E1,
3568 OPCODE_INFO2 (0xea000000,
3569 (16_20, AREG, OPRND_SHIFT_0_BIT),
3570 (0_15, IMM16b, OPRND_SHIFT_0_BIT)),
3571 CSKYV2_ISA_1E2),
3572 /* bmaski will transfer to movi when imm < 17. */
3573 OP16_OP32 ("bmaski",
3574 OPCODE_INFO2 (0x3000,
3575 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3576 (0_7, IMM8b_BMASKI, OPRND_SHIFT_0_BIT)),
3577 CSKYV2_ISA_1E2,
3578 OPCODE_INFO2 (0xc4005020,
3579 (0_4, AREG, OPRND_SHIFT_0_BIT),
3580 (21_25, OIMM5b_BMASKI, OPRND_SHIFT_0_BIT)),
3581 CSKYV2_ISA_1E2),
3582 OP16_OP32 ("cmphsi",
3583 OPCODE_INFO2 (0x3800,
3584 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3585 (0_4, OIMM5b, OPRND_SHIFT_0_BIT)),
3586 CSKYV2_ISA_E1,
3587 OPCODE_INFO2 (0xeb000000,
3588 (16_20, AREG, OPRND_SHIFT_0_BIT),
3589 (0_15, OIMM16b, OPRND_SHIFT_0_BIT)),
3590 CSKYV2_ISA_1E2),
3591 OP16_OP32 ("cmplti",
3592 OPCODE_INFO2 (0x3820,
3593 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3594 (0_4, OIMM5b, OPRND_SHIFT_0_BIT)),
3595 CSKYV2_ISA_E1,
3596 OPCODE_INFO2 (0xeb200000,
3597 (16_20, AREG, OPRND_SHIFT_0_BIT),
3598 (0_15, OIMM16b, OPRND_SHIFT_0_BIT)),
3599 CSKYV2_ISA_1E2),
3600 OP16_OP32 ("cmpnei",
3601 OPCODE_INFO2 (0x3840,
3602 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3603 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3604 CSKYV2_ISA_E1,
3605 OPCODE_INFO2 (0xeb400000,
3606 (16_20, AREG, OPRND_SHIFT_0_BIT),
3607 (0_15, IMM16b, OPRND_SHIFT_0_BIT)),
3608 CSKYV2_ISA_1E2),
3609 #undef _TRANSFER
3610 #define _TRANSFER 1
3611 OP16_OP32 ("jmpix",
3612 OPCODE_INFO2 (0x38e0,
3613 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3614 (0_1, IMM2b_JMPIX, OPRND_SHIFT_0_BIT)),
3615 CSKY_ISA_JAVA,
3616 OPCODE_INFO2 (0xe9e00000,
3617 (16_20, GREG0_7, OPRND_SHIFT_0_BIT),
3618 (0_1, IMM2b_JMPIX, OPRND_SHIFT_0_BIT)),
3619 CSKY_ISA_JAVA),
3620 #undef _TRANSFER
3621 #define _TRANSFER 0
3622 DOP16_DOP32 ("bclri",
3623 OPCODE_INFO3 (0x3880,
3624 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3625 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
3626 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3627 OPCODE_INFO2 (0x3880,
3628 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3629 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3630 CSKYV2_ISA_E1,
3631 OPCODE_INFO3 (0xc4002820,
3632 (0_4, AREG, OPRND_SHIFT_0_BIT),
3633 (16_20, AREG, OPRND_SHIFT_0_BIT),
3634 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3635 OPCODE_INFO2 (0xc4002820,
3636 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3637 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3638 CSKYV2_ISA_1E2),
3639 DOP16_DOP32 ("bseti",
3640 OPCODE_INFO3 (0x38a0,
3641 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3642 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
3643 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3644 OPCODE_INFO2 (0x38a0,
3645 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3646 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3647 CSKYV2_ISA_E1,
3648 OPCODE_INFO3 (0xc4002840,
3649 (0_4, AREG, OPRND_SHIFT_0_BIT),
3650 (16_20, AREG, OPRND_SHIFT_0_BIT),
3651 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3652 OPCODE_INFO2 (0xc4002840,
3653 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3654 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3655 CSKYV2_ISA_1E2),
3656 OP16_OP32_WITH_WORK ("btsti",
3657 OPCODE_INFO2 (0x38c0,
3658 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3659 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3660 CSKYV2_ISA_E1,
3661 OPCODE_INFO2 (0xc4002880,
3662 (16_20, AREG, OPRND_SHIFT_0_BIT),
3663 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3664 CSKYV2_ISA_1E2, v2_work_btsti),
3665 DOP16_DOP32 ("lsli",
3666 OPCODE_INFO3 (0x4000,
3667 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
3668 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3669 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3670 OPCODE_INFO2 (0x4000,
3671 (5_7or8_10, DUP_GREG0_7, OPRND_SHIFT_0_BIT),
3672 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3673 CSKYV2_ISA_E1,
3674 OPCODE_INFO3 (0xc4004820,
3675 (0_4, AREG, OPRND_SHIFT_0_BIT),
3676 (16_20, AREG, OPRND_SHIFT_0_BIT),
3677 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3678 OPCODE_INFO2 (0xc4004820,
3679 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3680 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3681 CSKYV2_ISA_1E2),
3682 DOP16_DOP32 ("lsri",
3683 OPCODE_INFO3 (0x4800,
3684 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
3685 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3686 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3687 OPCODE_INFO2 (0x4800,
3688 (5_7or8_10, DUP_GREG0_7, OPRND_SHIFT_0_BIT),
3689 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3690 CSKYV2_ISA_E1,
3691 OPCODE_INFO3 (0xc4004840,
3692 (0_4, AREG, OPRND_SHIFT_0_BIT),
3693 (16_20, AREG, OPRND_SHIFT_0_BIT),
3694 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3695 OPCODE_INFO2 (0xc4004840,
3696 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3697 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3698 CSKYV2_ISA_1E2),
3699 OP16_OP32 ("asri",
3700 OPCODE_INFO3 (0x5000,
3701 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
3702 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3703 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3704 CSKYV2_ISA_E1,
3705 OPCODE_INFO3 (0xc4004880,
3706 (0_4, AREG, OPRND_SHIFT_0_BIT),
3707 (16_20, AREG, OPRND_SHIFT_0_BIT),
3708 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3709 CSKYV2_ISA_1E2),
3710 DOP16_DOP32 ("addc",
3711 OPCODE_INFO2 (0x6001,
3712 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3713 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3714 OPCODE_INFO3 (0x6001,
3715 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3716 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT),
3717 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT)),
3718 CSKYV2_ISA_E1,
3719 OPCODE_INFO3 (0xc4000040,
3720 (0_4, AREG, OPRND_SHIFT_0_BIT),
3721 (16_20, AREG, OPRND_SHIFT_0_BIT),
3722 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3723 OPCODE_INFO2 (0xc4000040,
3724 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3725 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3726 CSKYV2_ISA_1E2),
3727 DOP16_DOP32 ("subc",
3728 OPCODE_INFO2 (0x6003,
3729 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3730 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3731 OPCODE_INFO3 (0x6003,
3732 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3733 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
3734 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3735 CSKYV2_ISA_E1,
3736 OPCODE_INFO3 (0xc4000100,
3737 (0_4, AREG, OPRND_SHIFT_0_BIT),
3738 (16_20, AREG, OPRND_SHIFT_0_BIT),
3739 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3740 OPCODE_INFO2 (0xc4000100,
3741 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3742 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3743 CSKYV2_ISA_1E2),
3744 OP16_OP32 ("cmphs",
3745 OPCODE_INFO2 (0x6400,
3746 (2_5, GREG0_15, OPRND_SHIFT_0_BIT),
3747 (6_9, GREG0_15, OPRND_SHIFT_0_BIT)),
3748 CSKYV2_ISA_E1,
3749 OPCODE_INFO2 (0xc4000420,
3750 (16_20, AREG, OPRND_SHIFT_0_BIT),
3751 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3752 CSKYV2_ISA_2E3),
3753 OP16_OP32 ("cmplt",
3754 OPCODE_INFO2 (0x6401,
3755 (2_5, GREG0_15, OPRND_SHIFT_0_BIT),
3756 (6_9, GREG0_15, OPRND_SHIFT_0_BIT)),
3757 CSKYV2_ISA_E1,
3758 OPCODE_INFO2 (0xc4000440,
3759 (16_20, AREG, OPRND_SHIFT_0_BIT),
3760 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3761 CSKYV2_ISA_2E3),
3762 OP16_OP32 ("cmpne",
3763 OPCODE_INFO2 (0x6402,
3764 (2_5, GREG0_15, OPRND_SHIFT_0_BIT),
3765 (6_9, GREG0_15, OPRND_SHIFT_0_BIT)),
3766 CSKYV2_ISA_E1,
3767 OPCODE_INFO2 (0xc4000480,
3768 (16_20, AREG, OPRND_SHIFT_0_BIT),
3769 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3770 CSKYV2_ISA_2E3),
3771 OP16_OP32 ("mvcv",
3772 OPCODE_INFO1 (0x6403,
3773 (6_9, GREG0_15, OPRND_SHIFT_0_BIT)),
3774 CSKYV2_ISA_E1,
3775 OPCODE_INFO1 (0xc4000600,
3776 (0_4, AREG, OPRND_SHIFT_0_BIT)),
3777 CSKYV2_ISA_2E3),
3778 DOP16_DOP32 ("and",
3779 OPCODE_INFO2 (0x6800,
3780 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3781 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3782 OPCODE_INFO3 (0x6800,
3783 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3784 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT),
3785 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT)),
3786 CSKYV2_ISA_E1,
3787 OPCODE_INFO3 (0xc4002020,
3788 (0_4, AREG, OPRND_SHIFT_0_BIT),
3789 (16_20, AREG, OPRND_SHIFT_0_BIT),
3790 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3791 OPCODE_INFO2 (0xc4002020,
3792 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3793 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3794 CSKYV2_ISA_1E2),
3795 DOP16_DOP32 ("andn",
3796 OPCODE_INFO2 (0x6801,
3797 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3798 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3799 OPCODE_INFO3 (0x6801,
3800 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3801 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
3802 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3803 CSKYV2_ISA_E1,
3804 OPCODE_INFO3 (0xc4002040,
3805 (0_4, AREG, OPRND_SHIFT_0_BIT),
3806 (16_20, AREG, OPRND_SHIFT_0_BIT),
3807 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3808 OPCODE_INFO2 (0xc4002040,
3809 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3810 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3811 CSKYV2_ISA_1E2),
3812 OP16_OP32 ("tst",
3813 OPCODE_INFO2 (0x6802,
3814 (2_5, GREG0_15, OPRND_SHIFT_0_BIT),
3815 (6_9, GREG0_15, OPRND_SHIFT_0_BIT)),
3816 CSKYV2_ISA_E1,
3817 OPCODE_INFO2 (0xc4002080,
3818 (16_20, AREG, OPRND_SHIFT_0_BIT),
3819 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3820 CSKYV2_ISA_2E3),
3821 OP16_OP32 ("tstnbz",
3822 OPCODE_INFO1 (0x6803,
3823 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3824 CSKYV2_ISA_E1,
3825 OPCODE_INFO1 (0xc4002100,
3826 (16_20, AREG, OPRND_SHIFT_0_BIT)),
3827 CSKYV2_ISA_2E3),
3828 DOP16_DOP32 ("or",
3829 OPCODE_INFO2 (0x6c00,
3830 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3831 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3832 OPCODE_INFO3 (0x6c00,
3833 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3834 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT),
3835 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT)),
3836 CSKYV2_ISA_E1,
3837 OPCODE_INFO3 (0xc4002420,
3838 (0_4, AREG, OPRND_SHIFT_0_BIT),
3839 (16_20, AREG, OPRND_SHIFT_0_BIT),
3840 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3841 OPCODE_INFO2 (0xc4002420,
3842 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3843 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3844 CSKYV2_ISA_1E2),
3845 DOP16_DOP32 ("xor",
3846 OPCODE_INFO2 (0x6c01,
3847 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3848 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3849 OPCODE_INFO3 (0x6c01,
3850 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3851 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT),
3852 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT)),
3853 CSKYV2_ISA_E1,
3854 OPCODE_INFO3 (0xc4002440,
3855 (0_4, AREG, OPRND_SHIFT_0_BIT),
3856 (16_20, AREG, OPRND_SHIFT_0_BIT),
3857 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3858 OPCODE_INFO2 (0xc4002440,
3859 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3860 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3861 CSKYV2_ISA_1E2),
3862 DOP16_DOP32 ("nor",
3863 OPCODE_INFO2 (0x6c02,
3864 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3865 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3866 OPCODE_INFO3 (0x6c02,
3867 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3868 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT),
3869 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT)),
3870 CSKYV2_ISA_E1,
3871 OPCODE_INFO3 (0xc4002480,
3872 (0_4, AREG, OPRND_SHIFT_0_BIT),
3873 (16_20, AREG, OPRND_SHIFT_0_BIT),
3874 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3875 OPCODE_INFO2 (0xc4002480,
3876 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3877 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3878 CSKYV2_ISA_1E2),
3879 OP16_OP32 ("mov",
3880 OPCODE_INFO2 (0x6c03,
3881 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3882 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3883 CSKYV2_ISA_E1,
3884 OPCODE_INFO2 (0xc4004820,
3885 (0_4, AREG, OPRND_SHIFT_0_BIT),
3886 (16_20, AREG, OPRND_SHIFT_0_BIT)),
3887 CSKYV2_ISA_1E2),
3888 OP16_OP32 ("nop",
3889 OPCODE_INFO0 (0x6c03),
3890 CSKYV2_ISA_E1,
3891 OPCODE_INFO0 (0xc4004820),
3892 CSKYV2_ISA_E1),
3893 DOP16_DOP32 ("lsl",
3894 OPCODE_INFO2 (0x7000,
3895 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3896 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3897 OPCODE_INFO3 (0x7000,
3898 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3899 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
3900 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3901 CSKYV2_ISA_E1,
3902 OPCODE_INFO3 (0xc4004020,
3903 (0_4, AREG, OPRND_SHIFT_0_BIT),
3904 (16_20, AREG, OPRND_SHIFT_0_BIT),
3905 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3906 OPCODE_INFO2 (0xc4004020,
3907 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3908 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3909 CSKYV2_ISA_1E2),
3910 DOP16_DOP32 ("lsr",
3911 OPCODE_INFO2 (0x7001,
3912 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3913 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3914 OPCODE_INFO3 (0x7001,
3915 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3916 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
3917 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3918 CSKYV2_ISA_E1,
3919 OPCODE_INFO3 (0xc4004040,
3920 (0_4, AREG, OPRND_SHIFT_0_BIT),
3921 (16_20, AREG, OPRND_SHIFT_0_BIT),
3922 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3923 OPCODE_INFO2 (0xc4004040,
3924 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3925 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3926 CSKYV2_ISA_1E2),
3927 DOP16_DOP32 ("asr",
3928 OPCODE_INFO2 (0x7002,
3929 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3930 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3931 OPCODE_INFO3 (0x7002,
3932 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3933 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
3934 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3935 CSKYV2_ISA_E1,
3936 OPCODE_INFO3 (0xc4004080,
3937 (0_4, AREG, OPRND_SHIFT_0_BIT),
3938 (16_20, AREG, OPRND_SHIFT_0_BIT),
3939 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3940 OPCODE_INFO2 (0xc4004080,
3941 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3942 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3943 CSKYV2_ISA_1E2),
3944 DOP16_DOP32 ("rotl",
3945 OPCODE_INFO2 (0x7003,
3946 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3947 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3948 OPCODE_INFO3 (0x7003,
3949 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3950 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
3951 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3952 CSKYV2_ISA_E1,
3953 OPCODE_INFO3 (0xc4004100,
3954 (0_4, AREG, OPRND_SHIFT_0_BIT),
3955 (16_20, AREG, OPRND_SHIFT_0_BIT),
3956 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3957 OPCODE_INFO2 (0xc4004100,
3958 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3959 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3960 CSKYV2_ISA_1E2),
3961 DOP16_DOP32 ("zextb",
3962 OPCODE_INFO2 (0x7400,
3963 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3964 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3965 OPCODE_INFO1 (0x7400,
3966 (2_5or6_9, DUP_GREG0_15, OPRND_SHIFT_0_BIT)),
3967 CSKYV2_ISA_E1,
3968 OPCODE_INFO2 (0xc40054e0,
3969 (0_4, AREG, OPRND_SHIFT_0_BIT),
3970 (16_20, AREG, OPRND_SHIFT_0_BIT)),
3971 OPCODE_INFO1 (0xc40054e0,
3972 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT)),
3973 CSKYV2_ISA_2E3),
3974 DOP16_DOP32 ("zexth",
3975 OPCODE_INFO2 (0x7401,
3976 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3977 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3978 OPCODE_INFO1 (0x7401,
3979 (2_5or6_9, DUP_GREG0_15, OPRND_SHIFT_0_BIT)),
3980 CSKYV2_ISA_E1,
3981 OPCODE_INFO2 (0xc40055e0,
3982 (0_4, AREG, OPRND_SHIFT_0_BIT),
3983 (16_20, AREG, OPRND_SHIFT_0_BIT)),
3984 OPCODE_INFO1 (0xc40055e0,
3985 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT)),
3986 CSKYV2_ISA_2E3),
3987 DOP16_DOP32 ("sextb",
3988 OPCODE_INFO2 (0x7402,
3989 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3990 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3991 OPCODE_INFO1 (0x7402,
3992 (2_5or6_9, DUP_GREG0_15, OPRND_SHIFT_0_BIT)),
3993 CSKYV2_ISA_E1,
3994 OPCODE_INFO2 (0xc40058e0,
3995 (0_4, AREG, OPRND_SHIFT_0_BIT),
3996 (16_20, AREG, OPRND_SHIFT_0_BIT)),
3997 OPCODE_INFO1 (0xc40058e0,
3998 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT)),
3999 CSKYV2_ISA_2E3),
4000 DOP16_DOP32 ("sexth",
4001 OPCODE_INFO2 (0x7403,
4002 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4003 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4004 OPCODE_INFO1 (0x7403,
4005 (2_5or6_9, DUP_GREG0_15, OPRND_SHIFT_0_BIT)),
4006 CSKYV2_ISA_E1,
4007 OPCODE_INFO2 (0xc40059e0,
4008 (0_4, AREG, OPRND_SHIFT_0_BIT),
4009 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4010 OPCODE_INFO1 (0xc40059e0,
4011 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT)),
4012 CSKYV2_ISA_2E3),
4013 OP32 ("zext",
4014 OPCODE_INFO4 (0xc4005400,
4015 (0_4, AREG, OPRND_SHIFT_0_BIT),
4016 (16_20, AREG, OPRND_SHIFT_0_BIT),
4017 (5_9, IMM5b, OPRND_SHIFT_0_BIT),
4018 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
4019 CSKYV2_ISA_2E3),
4020 OP32 ("sext",
4021 OPCODE_INFO4 (0xc4005800,
4022 (0_4, AREG, OPRND_SHIFT_0_BIT),
4023 (16_20, AREG, OPRND_SHIFT_0_BIT),
4024 (5_9, IMM5b, OPRND_SHIFT_0_BIT),
4025 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
4026 CSKYV2_ISA_2E3),
4027 #undef _TRANSFER
4028 #define _TRANSFER 2
4029 OP16_OP32 ("rts",
4030 OPCODE_INFO0 (0x783c),
4031 CSKYV2_ISA_E1,
4032 OPCODE_INFO0 (0xe8cf0000),
4033 CSKYV2_ISA_E1),
4034 #undef _TRANSFER
4035 #define _TRANSFER 1
4036 OP16_OP32 ("jmp",
4037 OPCODE_INFO1 (0x7800,
4038 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4039 CSKYV2_ISA_E1,
4040 OPCODE_INFO1 (0xe8c00000,
4041 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4042 CSKYV2_ISA_2E3),
4043 #undef _TRANSFER
4044 #define _TRANSFER 0
4045 OP16_OP32 ("revb",
4046 OPCODE_INFO2 (0x7802,
4047 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4048 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4049 CSKYV2_ISA_1E2,
4050 OPCODE_INFO2 (0xc4006080,
4051 (0_4, AREG, OPRND_SHIFT_0_BIT),
4052 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4053 CSKYV2_ISA_2E3),
4054 OP16_OP32 ("revh",
4055 OPCODE_INFO2 (0x7803,
4056 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4057 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4058 CSKYV2_ISA_1E2,
4059 OPCODE_INFO2 (0xc4006100,
4060 (0_4, AREG, OPRND_SHIFT_0_BIT),
4061 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4062 CSKYV2_ISA_2E3),
4063 OP16_OP32 ("jsr",
4064 OPCODE_INFO1 (0x7bc1,
4065 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4066 CSKYV2_ISA_E1,
4067 OPCODE_INFO1 (0xe8e00000,
4068 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4069 CSKYV2_ISA_2E3),
4070 DOP16_DOP32 ("mult",
4071 OPCODE_INFO2 (0x7c00,
4072 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4073 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4074 OPCODE_INFO3 (0x7c00,
4075 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4076 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT),
4077 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT)),
4078 CSKYV2_ISA_E1,
4079 OPCODE_INFO3 (0xc4008420,
4080 (0_4, AREG, OPRND_SHIFT_0_BIT),
4081 (16_20, AREG, OPRND_SHIFT_0_BIT),
4082 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4083 OPCODE_INFO2 (0xc4008420,
4084 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
4085 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4086 CSKYV2_ISA_1E2),
4087 OP16 ("mul",
4088 OPCODE_INFO2 (0x7c00,
4089 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4090 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4091 CSKYV2_ISA_E1),
4092 DOP16_DOP32 ("mulsh",
4093 OPCODE_INFO2 (0x7c01,
4094 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4095 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4096 OPCODE_INFO3 (0x7c01,
4097 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4098 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT),
4099 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT)),
4100 CSKYV2_ISA_2E3,
4101 OPCODE_INFO3 (0xc4009020,
4102 (0_4, AREG, OPRND_SHIFT_0_BIT),
4103 (16_20, AREG, OPRND_SHIFT_0_BIT),
4104 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4105 OPCODE_INFO2 (0xc4009020,
4106 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
4107 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4108 CSKYV2_ISA_2E3),
4109 OP16 ("muls.h",
4110 OPCODE_INFO2 (0x7c01,
4111 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4112 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4113 CSKYV2_ISA_2E3),
4114 DOP32 ("mulsw",
4115 OPCODE_INFO3 (0xc4009420,
4116 (0_4, AREG, OPRND_SHIFT_0_BIT),
4117 (16_20, AREG, OPRND_SHIFT_0_BIT),
4118 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4119 OPCODE_INFO2 (0xc4009420,
4120 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
4121 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4122 CSKY_ISA_DSP),
4123 OP16_OP32 ("ld.b",
4124 SOPCODE_INFO2 (0x8000,
4125 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4126 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4127 (0_4, IMM_LDST, OPRND_SHIFT_0_BIT))),
4128 CSKYV2_ISA_E1,
4129 SOPCODE_INFO2 (0xd8000000,
4130 (21_25, AREG, OPRND_SHIFT_0_BIT),
4131 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4132 (0_11, IMM_LDST, OPRND_SHIFT_0_BIT))),
4133 CSKYV2_ISA_E1),
4134 OP16_OP32 ("ldb",
4135 SOPCODE_INFO2 (0x8000,
4136 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4137 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4138 (0_4, IMM_LDST, OPRND_SHIFT_0_BIT))),
4139 CSKYV2_ISA_E1,
4140 SOPCODE_INFO2 (0xd8000000,
4141 (21_25, AREG, OPRND_SHIFT_0_BIT),
4142 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4143 (0_11, IMM_LDST, OPRND_SHIFT_0_BIT))),
4144 CSKYV2_ISA_E1),
4145 OP16_OP32 ("st.b",
4146 SOPCODE_INFO2 (0xa000,
4147 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4148 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4149 (0_4, IMM_LDST, OPRND_SHIFT_0_BIT))),
4150 CSKYV2_ISA_E1,
4151 SOPCODE_INFO2 (0xdc000000,
4152 (21_25, AREG, OPRND_SHIFT_0_BIT),
4153 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4154 (0_11, IMM_LDST, OPRND_SHIFT_0_BIT))),
4155 CSKYV2_ISA_E1),
4156 OP16_OP32 ("stb",
4157 SOPCODE_INFO2 (0xa000,
4158 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4159 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4160 (0_4, IMM_LDST, OPRND_SHIFT_0_BIT))),
4161 CSKYV2_ISA_E1,
4162 SOPCODE_INFO2 (0xdc000000,
4163 (21_25, AREG, OPRND_SHIFT_0_BIT),
4164 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4165 (0_11, IMM_LDST, OPRND_SHIFT_0_BIT))),
4166 CSKYV2_ISA_E1),
4167
4168 OP16_OP32 ("ld.h",
4169 SOPCODE_INFO2 (0x8800,
4170 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4171 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4172 (0_4, IMM_LDST, OPRND_SHIFT_1_BIT))),
4173 CSKYV2_ISA_E1,
4174 SOPCODE_INFO2 (0xd8001000,
4175 (21_25, AREG, OPRND_SHIFT_0_BIT),
4176 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4177 (0_11, IMM_LDST, OPRND_SHIFT_1_BIT))),
4178 CSKYV2_ISA_E1),
4179 OP16_OP32 ("ldh",
4180 SOPCODE_INFO2 (0x8800,
4181 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4182 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4183 (0_4, IMM_LDST, OPRND_SHIFT_1_BIT))),
4184 CSKYV2_ISA_E1,
4185 SOPCODE_INFO2 (0xd8001000,
4186 (21_25, AREG, OPRND_SHIFT_0_BIT),
4187 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4188 (0_11, IMM_LDST, OPRND_SHIFT_1_BIT))),
4189 CSKYV2_ISA_E1),
4190 OP16_OP32 ("st.h",
4191 SOPCODE_INFO2 (0xa800,
4192 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4193 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4194 (0_4, IMM_LDST, OPRND_SHIFT_1_BIT))),
4195 CSKYV2_ISA_E1,
4196 SOPCODE_INFO2 (0xdc001000,
4197 (21_25, AREG, OPRND_SHIFT_0_BIT),
4198 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4199 (0_11, IMM_LDST, OPRND_SHIFT_1_BIT))),
4200 CSKYV2_ISA_E1),
4201 OP16_OP32 ("sth",
4202 SOPCODE_INFO2 (0xa800,
4203 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4204 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4205 (0_4, IMM_LDST, OPRND_SHIFT_1_BIT))),
4206 CSKYV2_ISA_E1,
4207 SOPCODE_INFO2 (0xdc001000,
4208 (21_25, AREG, OPRND_SHIFT_0_BIT),
4209 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4210 (0_11, IMM_LDST, OPRND_SHIFT_1_BIT))),
4211 CSKYV2_ISA_E1),
4212 DOP16_OP32 ("ld.w",
4213 SOPCODE_INFO2 (0x9000,
4214 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4215 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4216 (0_4, IMM_LDST, OPRND_SHIFT_2_BIT))),
4217 SOPCODE_INFO2 (0x9800,
4218 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4219 BRACKET_OPRND ((NONE, REGsp, OPRND_SHIFT_0_BIT),
4220 (0_4or8_10, IMM_LDST, OPRND_SHIFT_2_BIT))),
4221 CSKYV2_ISA_E1,
4222 SOPCODE_INFO2 (0xd8002000,
4223 (21_25, AREG, OPRND_SHIFT_0_BIT),
4224 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4225 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
4226 CSKYV2_ISA_E1),
4227 DOP16_OP32 ("ldw",
4228 SOPCODE_INFO2 (0x9000,
4229 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4230 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4231 (0_4, IMM_LDST, OPRND_SHIFT_2_BIT))),
4232 SOPCODE_INFO2 (0x9800,
4233 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4234 BRACKET_OPRND ((NONE, REGsp, OPRND_SHIFT_0_BIT),
4235 (0_4or8_10, IMM_LDST, OPRND_SHIFT_2_BIT))),
4236 CSKYV2_ISA_E1,
4237 SOPCODE_INFO2 (0xd8002000,
4238 (21_25, AREG, OPRND_SHIFT_0_BIT),
4239 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4240 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
4241 CSKYV2_ISA_E1),
4242 DOP16_OP32 ("ld",
4243 SOPCODE_INFO2 (0x9000,
4244 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4245 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4246 (0_4, IMM_LDST, OPRND_SHIFT_0_BIT))),
4247 SOPCODE_INFO2 (0x9800,
4248 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4249 BRACKET_OPRND ((NONE, REGsp, OPRND_SHIFT_0_BIT),
4250 (0_4or8_10, IMM_LDST, OPRND_SHIFT_2_BIT))),
4251 CSKYV2_ISA_E1,
4252 SOPCODE_INFO2 (0xd8002000,
4253 (21_25, AREG, OPRND_SHIFT_0_BIT),
4254 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4255 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
4256 CSKYV2_ISA_E1),
4257 DOP16_OP32 ("st.w",
4258 SOPCODE_INFO2 (0xb000,
4259 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4260 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4261 (0_4, IMM_LDST, OPRND_SHIFT_2_BIT))),
4262 SOPCODE_INFO2 (0xb800,
4263 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4264 BRACKET_OPRND ((NONE, REGsp, OPRND_SHIFT_0_BIT),
4265 (0_4or8_10, IMM_LDST, OPRND_SHIFT_2_BIT))),
4266 CSKYV2_ISA_E1,
4267 SOPCODE_INFO2 (0xdc002000,
4268 (21_25, AREG, OPRND_SHIFT_0_BIT),
4269 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4270 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
4271 CSKYV2_ISA_E1),
4272 DOP16_OP32 ("stw",
4273 SOPCODE_INFO2 (0xb000,
4274 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4275 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4276 (0_4, IMM_LDST, OPRND_SHIFT_2_BIT))),
4277 SOPCODE_INFO2 (0xb800,
4278 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4279 BRACKET_OPRND ((NONE, REGsp, OPRND_SHIFT_0_BIT),
4280 (0_4or8_10, IMM_LDST, OPRND_SHIFT_2_BIT))),
4281 CSKYV2_ISA_E1,
4282 SOPCODE_INFO2 (0xdc002000,
4283 (21_25, AREG, OPRND_SHIFT_0_BIT),
4284 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4285 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
4286 CSKYV2_ISA_E1),
4287 DOP16_OP32 ("st",
4288 SOPCODE_INFO2 (0xb000,
4289 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4290 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4291 (0_4, IMM_LDST, OPRND_SHIFT_2_BIT))),
4292 SOPCODE_INFO2 (0xb800,
4293 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4294 BRACKET_OPRND ((NONE, REGsp, OPRND_SHIFT_0_BIT),
4295 (0_4or8_10, IMM_LDST, OPRND_SHIFT_2_BIT))),
4296 CSKYV2_ISA_E1,
4297 SOPCODE_INFO2 (0xdc002000,
4298 (21_25, AREG, OPRND_SHIFT_0_BIT),
4299 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4300 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
4301 CSKYV2_ISA_E1),
4302 #ifdef BUILD_AS
4303 DOP16_DOP32_WITH_WORK ("addi",
4304 OPCODE_INFO2 (0x2000,
4305 (NONE, AREG, OPRND_SHIFT_0_BIT),
4306 (NONE, IMM32b, OPRND_SHIFT_0_BIT)),
4307 OPCODE_INFO3 (0x2000,
4308 (NONE, AREG, OPRND_SHIFT_0_BIT),
4309 (NONE, AREG, OPRND_SHIFT_0_BIT),
4310 (NONE, IMM32b, OPRND_SHIFT_0_BIT)),
4311 CSKYV2_ISA_E1,
4312 OPCODE_INFO2 (0xe4000000,
4313 (NONE, AREG, OPRND_SHIFT_0_BIT),
4314 (NONE, IMM32b, OPRND_SHIFT_0_BIT)),
4315 OPCODE_INFO3 (0xe4000000,
4316 (NONE, AREG, OPRND_SHIFT_0_BIT),
4317 (NONE, AREG, OPRND_SHIFT_0_BIT),
4318 (NONE, IMM32b, OPRND_SHIFT_0_BIT)),
4319 CSKYV2_ISA_1E2,
4320 v2_work_addi),
4321 #else
4322 DOP16 ("addi",
4323 OPCODE_INFO2 (0x2000,
4324 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4325 (0_7, OIMM8b, OPRND_SHIFT_0_BIT)),
4326 OPCODE_INFO3 (0x5802,
4327 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4328 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4329 (2_4, OIMM3b, OPRND_SHIFT_0_BIT)),
4330 CSKYV2_ISA_E1),
4331 DOP16 ("addi",
4332 OPCODE_INFO3 (0x1800,
4333 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4334 (NONE, REGsp, OPRND_SHIFT_0_BIT),
4335 (0_7, IMM8b_LS2, OPRND_SHIFT_0_BIT)),
4336 OPCODE_INFO3 (0x1400,
4337 (NONE, REGsp, OPRND_SHIFT_0_BIT),
4338 (NONE, REGsp, OPRND_SHIFT_0_BIT),
4339 (0_4or8_9, IMM7b_LS2, OPRND_SHIFT_0_BIT)),
4340 CSKYV2_ISA_E1),
4341 DOP32 ("addi",
4342 OPCODE_INFO3 (0xe4000000,
4343 (21_25, AREG, OPRND_SHIFT_0_BIT),
4344 (16_20, AREG, OPRND_SHIFT_0_BIT),
4345 (0_11, OIMM12b, OPRND_SHIFT_0_BIT)),
4346 OPCODE_INFO3 (0xcc1c0000,
4347 (21_25, AREG, OPRND_SHIFT_0_BIT),
4348 (NONE, REG_r28, OPRND_SHIFT_0_BIT),
4349 (0_17, OIMM18b, OPRND_SHIFT_0_BIT)),
4350 CSKYV2_ISA_1E2),
4351 #endif
4352 #ifdef BUILD_AS
4353 DOP16_DOP32_WITH_WORK ("subi",
4354 OPCODE_INFO2 (0x2800,
4355 (NONE, AREG, OPRND_SHIFT_0_BIT),
4356 (NONE, IMM32b, OPRND_SHIFT_0_BIT)),
4357 OPCODE_INFO3 (0x2800,
4358 (NONE, AREG, OPRND_SHIFT_0_BIT),
4359 (NONE, AREG, OPRND_SHIFT_0_BIT),
4360 (NONE, IMM32b, OPRND_SHIFT_0_BIT)),
4361 CSKYV2_ISA_E1,
4362 OPCODE_INFO2 (0xe4001000,
4363 (NONE, AREG, OPRND_SHIFT_0_BIT),
4364 (NONE, IMM32b, OPRND_SHIFT_0_BIT)),
4365 OPCODE_INFO3 (0xe4001000,
4366 (NONE, AREG, OPRND_SHIFT_0_BIT),
4367 (NONE, AREG, OPRND_SHIFT_0_BIT),
4368 (NONE, IMM32b, OPRND_SHIFT_0_BIT)),
4369 CSKYV2_ISA_1E2, v2_work_subi),
4370 #else
4371 DOP16 ("subi",
4372 OPCODE_INFO2 (0x2800,
4373 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4374 (0_7, OIMM8b, OPRND_SHIFT_0_BIT)),
4375 OPCODE_INFO3 (0x5803,
4376 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4377 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4378 (2_4, OIMM3b, OPRND_SHIFT_0_BIT)),
4379 CSKYV2_ISA_E1),
4380 OP32 ("subi",
4381 OPCODE_INFO3 (0xe4001000,
4382 (21_25, AREG, OPRND_SHIFT_0_BIT),
4383 (16_20, AREG, OPRND_SHIFT_0_BIT),
4384 (0_11, OIMM12b, OPRND_SHIFT_0_BIT)),
4385 CSKYV2_ISA_1E2),
4386 OP16 ("subi",
4387 OPCODE_INFO3 (0x1420,
4388 (NONE, REGsp, OPRND_SHIFT_0_BIT),
4389 (NONE, REGsp, OPRND_SHIFT_0_BIT),
4390 (0_4or8_9, IMM7b_LS2, OPRND_SHIFT_0_BIT)),
4391 CSKYV2_ISA_E1),
4392 #endif
4393 DOP16_DOP32_WITH_WORK ("addu",
4394 OPCODE_INFO2 (0x6000,
4395 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4396 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4397 OPCODE_INFO3 (0x5800,
4398 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4399 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4400 (2_4, GREG0_7, OPRND_SHIFT_0_BIT)),
4401 CSKYV2_ISA_E1,
4402 OPCODE_INFO3 (0xc4000020,
4403 (0_4, AREG, OPRND_SHIFT_0_BIT),
4404 (16_20, AREG, OPRND_SHIFT_0_BIT),
4405 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4406 OPCODE_INFO2 (0xc4000020,
4407 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
4408 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4409 CSKYV2_ISA_E1,
4410 v2_work_add_sub),
4411 DOP16_DOP32_WITH_WORK ("add",
4412 OPCODE_INFO2 (0x6000,
4413 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4414 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4415 OPCODE_INFO3 (0x5800,
4416 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4417 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4418 (2_4, GREG0_7, OPRND_SHIFT_0_BIT)),
4419 CSKYV2_ISA_E1,
4420 OPCODE_INFO3 (0xc4000020,
4421 (0_4, AREG, OPRND_SHIFT_0_BIT),
4422 (16_20, AREG, OPRND_SHIFT_0_BIT),
4423 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4424 OPCODE_INFO2 (0xc4000020,
4425 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
4426 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4427 CSKYV2_ISA_E1,
4428 v2_work_add_sub),
4429 DOP16_DOP32_WITH_WORK ("subu",
4430 OPCODE_INFO2 (0x6002,
4431 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4432 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4433 OPCODE_INFO3 (0x5801,
4434 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4435 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4436 (2_4, GREG0_7, OPRND_SHIFT_0_BIT)),
4437 CSKYV2_ISA_E1,
4438 OPCODE_INFO3 (0xc4000080,
4439 (0_4, AREG, OPRND_SHIFT_0_BIT),
4440 (16_20, AREG, OPRND_SHIFT_0_BIT),
4441 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4442 OPCODE_INFO2 (0xc4000080,
4443 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
4444 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4445 CSKYV2_ISA_E1,
4446 v2_work_add_sub),
4447 DOP16_DOP32_WITH_WORK ("sub",
4448 OPCODE_INFO2 (0x6002,
4449 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4450 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4451 OPCODE_INFO3 (0x5801,
4452 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4453 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4454 (2_4, GREG0_7, OPRND_SHIFT_0_BIT)),
4455 CSKYV2_ISA_E1,
4456 OPCODE_INFO3 (0xc4000080,
4457 (0_4, AREG, OPRND_SHIFT_0_BIT),
4458 (16_20, AREG, OPRND_SHIFT_0_BIT),
4459 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4460 OPCODE_INFO2 (0xc4000080,
4461 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
4462 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4463 CSKYV2_ISA_E1,
4464 v2_work_add_sub),
4465 OP32_WITH_WORK ("fmovis",
4466 OPCODE_INFO2 (0xf4001c00,
4467 (0_3, FREG, OPRND_SHIFT_0_BIT),
4468 (4_7or16_24, SFLOAT, OPRND_SHIFT_2_BIT)),
4469 CSKY_ISA_FLOAT_1E3,
4470 float_work_fmovi),
4471 OP32_WITH_WORK ("fmovid",
4472 OPCODE_INFO2 (0xf4001e00,
4473 (0_3, FREG, OPRND_SHIFT_0_BIT),
4474 (4_7or16_24, DFLOAT, OPRND_SHIFT_2_BIT)),
4475 CSKY_ISA_FLOAT_3E4,
4476 float_work_fmovi),
4477 #undef _RELOC32
4478 #define _RELOC32 BFD_RELOC_CKCORE_PCREL_IMM26BY2
4479 OP32 ("bsr",
4480 OPCODE_INFO1 (0xe0000000,
4481 (0_25, OFF26b, OPRND_SHIFT_1_BIT)),
4482 CSKYV2_ISA_E1),
4483 #undef _RELOC32
4484 #define _RELOC32 BFD_RELOC_CKCORE_DOFFSET_IMM18
4485 OP32 ("lrs.b",
4486 OPCODE_INFO2 (0xcc000000,
4487 (21_25, AREG, OPRND_SHIFT_0_BIT),
4488 (0_17, LABEL_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4489 CSKYV2_ISA_2E3),
4490 OP32 ("srs.b",
4491 OPCODE_INFO2 (0xcc100000,
4492 (21_25, AREG, OPRND_SHIFT_0_BIT),
4493 (0_17, LABEL_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4494 CSKYV2_ISA_2E3),
4495 #undef _RELOC32
4496 #define _RELOC32 BFD_RELOC_CKCORE_DOFFSET_IMM18BY2
4497 OP32 ("lrs.h",
4498 OPCODE_INFO2 (0xcc040000,
4499 (21_25, AREG, OPRND_SHIFT_0_BIT),
4500 (0_17, LABEL_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4501 CSKYV2_ISA_2E3),
4502 OP32 ("srs.h",
4503 OPCODE_INFO2 (0xcc140000,
4504 (21_25, AREG, OPRND_SHIFT_0_BIT),
4505 (0_17, LABEL_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4506 CSKYV2_ISA_2E3),
4507 #undef _RELOC32
4508 #define _RELOC32 BFD_RELOC_CKCORE_PCREL_FLRW_IMM8BY4
4509 OP32 ("flrws",
4510 OPCODE_INFO2 (0xf4003800,
4511 (0_3, FREG, OPRND_SHIFT_0_BIT),
4512 (4_7or21_24, FCONSTANT, OPRND_SHIFT_2_BIT)),
4513 CSKY_ISA_FLOAT_1E3),
4514 OP32 ("flrwd",
4515 OPCODE_INFO2 (0xf4003900,
4516 (0_3, FREG, OPRND_SHIFT_0_BIT),
4517 (4_7or21_24, FCONSTANT, OPRND_SHIFT_2_BIT)),
4518 CSKY_ISA_FLOAT_3E4),
4519 #undef _RELOC32
4520 #define _RELOC32 BFD_RELOC_CKCORE_DOFFSET_IMM18BY4
4521 OP32_WITH_WORK ("lrs.w",
4522 OPCODE_INFO2 (0xcc080000,
4523 (21_25, AREG, OPRND_SHIFT_0_BIT),
4524 (0_17, LABEL_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4525 CSKYV2_ISA_2E3,
4526 v2_work_lrsrsw),
4527 OP32_WITH_WORK ("srs.w",
4528 OPCODE_INFO2 (0xcc180000,
4529 (21_25, AREG, OPRND_SHIFT_0_BIT),
4530 (0_17, LABEL_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4531 CSKYV2_ISA_2E3,
4532 v2_work_lrsrsw),
4533
4534 #undef _RELOC32
4535 #define _RELOC32 BFD_RELOC_CKCORE_PCREL_IMM16BY4
4536 OP32_WITH_WORK ("jsri",
4537 OPCODE_INFO1 (0xeae00000,
4538 (0_15, OFF16b, OPRND_SHIFT_2_BIT)),
4539 CSKYV2_ISA_2E3,
4540 v2_work_jsri),
4541 #undef _RELOC32
4542 #define _RELOC32 BFD_RELOC_CKCORE_PCREL_IMM16BY2
4543 OP32 ("bez",
4544 OPCODE_INFO2 (0xe9000000,
4545 (16_20, AREG, OPRND_SHIFT_0_BIT),
4546 (0_15, OFF16b_LSL1, OPRND_SHIFT_1_BIT)),
4547 CSKYV2_ISA_2E3),
4548 OP32 ("bnez",
4549 OPCODE_INFO2 (0xe9200000,
4550 (16_20, AREG, OPRND_SHIFT_0_BIT),
4551 (0_15, OFF16b_LSL1, OPRND_SHIFT_1_BIT)),
4552 CSKYV2_ISA_2E3),
4553 OP32 ("bhz",
4554 OPCODE_INFO2 (0xe9400000,
4555 (16_20, AREG, OPRND_SHIFT_0_BIT),
4556 (0_15, OFF16b_LSL1, OPRND_SHIFT_1_BIT)),
4557 CSKYV2_ISA_2E3),
4558 OP32 ("blsz",
4559 OPCODE_INFO2 (0xe9600000,
4560 (16_20, AREG, OPRND_SHIFT_0_BIT),
4561 (0_15, OFF16b_LSL1, OPRND_SHIFT_1_BIT)),
4562 CSKYV2_ISA_2E3),
4563 OP32 ("blz",
4564 OPCODE_INFO2 (0xe9800000,
4565 (16_20, AREG, OPRND_SHIFT_0_BIT),
4566 (0_15, OFF16b_LSL1, OPRND_SHIFT_1_BIT)),
4567 CSKYV2_ISA_2E3),
4568 OP32 ("bhsz",
4569 OPCODE_INFO2 (0xe9a00000,
4570 (16_20, AREG, OPRND_SHIFT_0_BIT),
4571 (0_15, OFF16b_LSL1, OPRND_SHIFT_1_BIT)),
4572 CSKYV2_ISA_2E3),
4573 #undef _RELAX
4574 #undef _RELOC16
4575 #undef _TRANSFER
4576 #define _TRANSFER 1
4577 #define _RELAX 1
4578 #define _RELOC16 BFD_RELOC_CKCORE_PCREL_IMM10BY2
4579 OP16_OP32 ("br",
4580 OPCODE_INFO1 (0x0400,
4581 (0_9, UNCOND10b, OPRND_SHIFT_1_BIT)),
4582 CSKYV2_ISA_E1,
4583 OPCODE_INFO1 (0xe8000000,
4584 (0_15, UNCOND16b, OPRND_SHIFT_1_BIT)),
4585 CSKYV2_ISA_E1),
4586 #undef _TRANSFER
4587 #define _TRANSFER 0
4588 OP16_OP32 ("bt",
4589 OPCODE_INFO1 (0x0800,
4590 (0_9, COND10b, OPRND_SHIFT_1_BIT)),
4591 CSKYV2_ISA_E1,
4592 OPCODE_INFO1 (0xe8600000,
4593 (0_15, COND16b, OPRND_SHIFT_1_BIT)),
4594 CSKYV2_ISA_1E2),
4595 OP16_OP32 ("bf",
4596 OPCODE_INFO1 (0x0c00,
4597 (0_9, COND10b, OPRND_SHIFT_1_BIT)),
4598 CSKYV2_ISA_E1,
4599 OPCODE_INFO1 (0xe8400000,
4600 (0_15, COND16b, OPRND_SHIFT_1_BIT)),
4601 CSKYV2_ISA_1E2),
4602 #undef _RELAX
4603 #undef _RELOC16
4604 #define _RELAX 0
4605 #define _RELOC16 0
4606 OP32 ("bnezad",
4607 OPCODE_INFO2 (0xe8200000,
4608 (16_20, AREG, OPRND_SHIFT_0_BIT),
4609 (0_15, COND16b, OPRND_SHIFT_1_BIT)),
4610 CSKYV2_ISA_3E3R2),
4611 #undef _RELOC16
4612 #undef _RELOC32
4613 #define _RELOC16 0
4614 #define _RELOC32 0
4615 #undef _TRANSFER
4616 #define _TRANSFER 1
4617 OP16_WITH_WORK ("jbr",
4618 OPCODE_INFO1 (0x0400,
4619 (0_10, UNCOND10b, OPRND_SHIFT_1_BIT)),
4620 CSKYV2_ISA_E1,
4621 v2_work_jbr),
4622 #undef _TRANSFER
4623 #define _TRANSFER 0
4624 OP16_WITH_WORK ("jbt",
4625 OPCODE_INFO1 (0x0800,
4626 (0_10, COND10b, OPRND_SHIFT_1_BIT)),
4627 CSKYV2_ISA_E1,
4628 v2_work_jbtf),
4629 OP16_WITH_WORK ("jbf",
4630 OPCODE_INFO1 (0x0c00,
4631 (0_10, COND10b, OPRND_SHIFT_1_BIT)),
4632 CSKYV2_ISA_E1,
4633 v2_work_jbtf),
4634 OP32_WITH_WORK ("jbsr",
4635 OPCODE_INFO1 (0xe0000000,
4636 (0_25, OFF26b, OPRND_SHIFT_1_BIT)),
4637 CSKYV2_ISA_E1,
4638 v2_work_jbsr),
4639 OP32_WITH_WORK ("movih",
4640 OPCODE_INFO2 (0xea200000,
4641 (16_20, AREG, OPRND_SHIFT_0_BIT),
4642 (0_15, IMM16b_MOVIH, OPRND_SHIFT_0_BIT)),
4643 CSKYV2_ISA_1E2,
4644 v2_work_movih),
4645 OP32_WITH_WORK ("ori",
4646 OPCODE_INFO3 (0xec000000,
4647 (21_25, AREG, OPRND_SHIFT_0_BIT),
4648 (16_20, AREG, OPRND_SHIFT_0_BIT),
4649 (0_15, IMM16b_ORI, OPRND_SHIFT_0_BIT)),
4650 CSKYV2_ISA_1E2,
4651 v2_work_ori),
4652 DOP32_WITH_WORK ("bgeni",
4653 OPCODE_INFO2 (0xea000000,
4654 (16_20, AREG, OPRND_SHIFT_0_BIT),
4655 (0_4, IMM4b, OPRND_SHIFT_0_BIT)),
4656 OPCODE_INFO2 (0xea200000,
4657 (16_20, AREG, OPRND_SHIFT_0_BIT),
4658 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
4659 CSKYV2_ISA_E1,
4660 v2_work_bgeni),
4661 #undef _RELOC16
4662 #undef _RELOC32
4663 #define _RELOC16 BFD_RELOC_CKCORE_PCREL_IMM7BY4
4664 #define _RELOC32 BFD_RELOC_CKCORE_PCREL_IMM16BY4
4665 DOP16_OP32_WITH_WORK ("lrw",
4666 OPCODE_INFO2 (0x1000,
4667 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4668 (0_4or8_9, CONSTANT, OPRND_SHIFT_2_BIT)),
4669 OPCODE_INFO2 (0x0000,
4670 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4671 (0_4or8_9, ELRW_CONSTANT, OPRND_SHIFT_2_BIT)),
4672 CSKYV2_ISA_E1,
4673 OPCODE_INFO2 (0xea800000,
4674 (16_20, AREG, OPRND_SHIFT_0_BIT),
4675 (0_15, CONSTANT, OPRND_SHIFT_2_BIT)),
4676 CSKYV2_ISA_E1,
4677 v2_work_lrw),
4678 #undef _RELOC16
4679 #undef _RELOC32
4680 #define _RELOC16 0
4681 #define _RELOC32 0
4682
4683 #undef _RELAX
4684 #define _RELAX 1
4685 OP32 ("jbez",
4686 OPCODE_INFO2 (0xe9000000,
4687 (16_20, AREG, OPRND_SHIFT_0_BIT),
4688 (0_15, JCOMPZ, OPRND_SHIFT_0_BIT)),
4689 CSKYV2_ISA_2E3),
4690 OP32 ("jbnez",
4691 OPCODE_INFO2 (0xe9200000,
4692 (16_20, AREG, OPRND_SHIFT_0_BIT),
4693 (0_15, JCOMPZ, OPRND_SHIFT_0_BIT)),
4694 CSKYV2_ISA_2E3),
4695 OP32 ("jbhz",
4696 OPCODE_INFO2 (0xe9400000,
4697 (16_20, AREG, OPRND_SHIFT_0_BIT),
4698 (0_15, JCOMPZ, OPRND_SHIFT_0_BIT)),
4699 CSKYV2_ISA_2E3),
4700 OP32 ("jblsz",
4701 OPCODE_INFO2 (0xe9600000,
4702 (16_20, AREG, OPRND_SHIFT_0_BIT),
4703 (0_15, JCOMPZ, OPRND_SHIFT_0_BIT)),
4704 CSKYV2_ISA_2E3),
4705 OP32 ("jblz",
4706 OPCODE_INFO2 (0xe9800000,
4707 (16_20, AREG, OPRND_SHIFT_0_BIT),
4708 (0_15, JCOMPZ, OPRND_SHIFT_0_BIT)),
4709 CSKYV2_ISA_2E3),
4710 OP32 ("jbhsz",
4711 OPCODE_INFO2 (0xe9a00000,
4712 (16_20, AREG, OPRND_SHIFT_0_BIT),
4713 (0_15, JCOMPZ, OPRND_SHIFT_0_BIT)),
4714 CSKYV2_ISA_2E3),
4715 #undef _RELAX
4716 #define _RELAX 0
4717
4718 /* CK860 instructions. */
4719 OP32("sync.is",
4720 OPCODE_INFO0(0xc2200420),
4721 CSKYV2_ISA_10E60),
4722 OP32("sync.i",
4723 OPCODE_INFO0(0xc0200420),
4724 CSKYV2_ISA_10E60),
4725 OP32("sync.s",
4726 OPCODE_INFO0(0xc2000420),
4727 CSKYV2_ISA_10E60),
4728 OP32("bar.brwarw",
4729 OPCODE_INFO0(0xc000842f),
4730 CSKYV2_ISA_10E60),
4731 OP32("bar.brwarws",
4732 OPCODE_INFO0(0xc200842f),
4733 CSKYV2_ISA_10E60),
4734 OP32("bar.brar",
4735 OPCODE_INFO0(0xc0008425),
4736 CSKYV2_ISA_10E60),
4737 OP32("bar.brars",
4738 OPCODE_INFO0(0xc2008425),
4739 CSKYV2_ISA_10E60),
4740 OP32("bar.bwaw",
4741 OPCODE_INFO0(0xc000842a),
4742 CSKYV2_ISA_10E60),
4743 OP32("bar.bwaws",
4744 OPCODE_INFO0(0xc200842a),
4745 CSKYV2_ISA_10E60),
4746 OP32("icache.iall",
4747 OPCODE_INFO0(0xc1009020),
4748 CSKYV2_ISA_10E60),
4749 OP32("icache.ialls",
4750 OPCODE_INFO0(0xc3009020),
4751 CSKYV2_ISA_10E60),
4752 OP32("icache.iva",
4753 OPCODE_INFO1(0xc0a09020,
4754 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4755 CSKYV2_ISA_10E60),
4756 OP32("dcache.iall",
4757 OPCODE_INFO0(0xc1009420),
4758 CSKYV2_ISA_10E60),
4759 OP32("dcache.iva",
4760 OPCODE_INFO1(0xc1609420,
4761 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4762 CSKYV2_ISA_10E60),
4763 OP32("dcache.isw",
4764 OPCODE_INFO1(0xc1409420,
4765 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4766 CSKYV2_ISA_10E60),
4767 OP32("dcache.call",
4768 OPCODE_INFO0(0xc0809420),
4769 CSKYV2_ISA_10E60),
4770 OP32("dcache.cva",
4771 OPCODE_INFO1(0xc0e09420,
4772 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4773 CSKYV2_ISA_10E60),
4774 OP32("dcache.cval1",
4775 OPCODE_INFO1(0xc2e09420,
4776 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4777 CSKYV2_ISA_10E60),
4778 OP32("dcache.csw",
4779 OPCODE_INFO1(0xc0c09420,
4780 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4781 CSKYV2_ISA_10E60),
4782 OP32("dcache.ciall",
4783 OPCODE_INFO0(0xc1809420),
4784 CSKYV2_ISA_10E60),
4785 OP32("dcache.civa",
4786 OPCODE_INFO1(0xc1e09420,
4787 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4788 CSKYV2_ISA_10E60),
4789 OP32("dcache.cisw",
4790 OPCODE_INFO1(0xc1c09420,
4791 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4792 CSKYV2_ISA_10E60),
4793 OP32("tlbi.vaa",
4794 OPCODE_INFO1(0xc0408820,
4795 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4796 CSKYV2_ISA_10E60),
4797 OP32("tlbi.vaas",
4798 OPCODE_INFO1(0xc2408820,
4799 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4800 CSKYV2_ISA_10E60),
4801 OP32("tlbi.asid",
4802 OPCODE_INFO1(0xc0208820,
4803 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4804 CSKYV2_ISA_10E60),
4805 OP32("tlbi.asids",
4806 OPCODE_INFO1(0xc2208820,
4807 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4808 CSKYV2_ISA_10E60),
4809 OP32("tlbi.va",
4810 OPCODE_INFO1(0xc0608820,
4811 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4812 CSKYV2_ISA_10E60),
4813 OP32("tlbi.vas",
4814 OPCODE_INFO1(0xc2608820,
4815 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4816 CSKYV2_ISA_10E60),
4817 OP32("tlbi.all",
4818 OPCODE_INFO0(0xc0008820),
4819 CSKYV2_ISA_10E60),
4820 OP32("tlbi.alls",
4821 OPCODE_INFO0(0xc2008820),
4822 CSKYV2_ISA_10E60),
4823 DOP32("sync",
4824 OPCODE_INFO0(0xc0000420),
4825 OPCODE_INFO1(0xc0000420,
4826 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
4827 CSKYV2_ISA_E1),
4828
4829 /* The followings are enhance DSP instructions. */
4830 DOP32_WITH_WORK ("bloop",
4831 OPCODE_INFO3 (0xe9c00000,
4832 (16_20, AREG, OPRND_SHIFT_0_BIT),
4833 (0_11, BLOOP_OFF12b, OPRND_SHIFT_1_BIT),
4834 (12_15, BLOOP_OFF4b, OPRND_SHIFT_1_BIT)),
4835 OPCODE_INFO2 (0xe9c00000,
4836 (16_20, AREG, OPRND_SHIFT_0_BIT),
4837 (0_11, BLOOP_OFF12b, OPRND_SHIFT_1_BIT)),
4838 CSKY_ISA_DSP_ENHANCE,
4839 dsp_work_bloop),
4840 /* The followings are ld/st instructions. */
4841 OP32 ("ldbi.b",
4842 OPCODE_INFO2 (0xd0008000,
4843 (0_4, AREG, OPRND_SHIFT_0_BIT),
4844 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4845 CSKY_ISA_DSP_ENHANCE),
4846 OP32 ("ldbi.h",
4847 OPCODE_INFO2 (0xd0008400,
4848 (0_4, AREG, OPRND_SHIFT_0_BIT),
4849 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4850 CSKY_ISA_DSP_ENHANCE),
4851 OP32 ("ldbi.w",
4852 OPCODE_INFO2 (0xd0008800,
4853 (0_4, AREG, OPRND_SHIFT_0_BIT),
4854 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4855 CSKY_ISA_DSP_ENHANCE),
4856 OP32 ("pldbi.d",
4857 OPCODE_INFO2 (0xd0008c00,
4858 (0_4, AREG, OPRND_SHIFT_0_BIT),
4859 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4860 CSKY_ISA_DSP_ENHANCE),
4861 OP32 ("ldbi.hs",
4862 OPCODE_INFO2 (0xd0009000,
4863 (0_4, AREG, OPRND_SHIFT_0_BIT),
4864 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4865 CSKY_ISA_DSP_ENHANCE),
4866 OP32 ("ldbi.bs",
4867 OPCODE_INFO2 (0xd0009400,
4868 (0_4, AREG, OPRND_SHIFT_0_BIT),
4869 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4870 CSKY_ISA_DSP_ENHANCE),
4871 OP32 ("stbi.b",
4872 OPCODE_INFO2 (0xd4008000,
4873 (0_4, AREG, OPRND_SHIFT_0_BIT),
4874 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4875 CSKY_ISA_DSP_ENHANCE),
4876 OP32 ("stbi.h",
4877 OPCODE_INFO2 (0xd4008400,
4878 (0_4, AREG, OPRND_SHIFT_0_BIT),
4879 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4880 CSKY_ISA_DSP_ENHANCE),
4881 OP32 ("stbi.w",
4882 OPCODE_INFO2 (0xd4008800,
4883 (0_4, AREG, OPRND_SHIFT_0_BIT),
4884 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4885 CSKY_ISA_DSP_ENHANCE),
4886 OP32 ("ldbir.b",
4887 OPCODE_INFO3 (0xd000a000,
4888 (0_4, AREG, OPRND_SHIFT_0_BIT),
4889 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT),
4890 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4891 CSKY_ISA_DSP_ENHANCE),
4892 OP32 ("ldbir.h",
4893 OPCODE_INFO3 (0xd000a400,
4894 (0_4, AREG, OPRND_SHIFT_0_BIT),
4895 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT),
4896 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4897 CSKY_ISA_DSP_ENHANCE),
4898 OP32 ("ldbir.w",
4899 OPCODE_INFO3 (0xd000a800,
4900 (0_4, AREG, OPRND_SHIFT_0_BIT),
4901 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT),
4902 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4903 CSKY_ISA_DSP_ENHANCE),
4904 OP32 ("pldbir.d",
4905 OPCODE_INFO3 (0xd000ac00,
4906 (0_4, AREG, OPRND_SHIFT_0_BIT),
4907 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT),
4908 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4909 CSKY_ISA_DSP_ENHANCE),
4910 OP32 ("ldbir.bs",
4911 OPCODE_INFO3 (0xd000b000,
4912 (0_4, AREG, OPRND_SHIFT_0_BIT),
4913 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT),
4914 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4915 CSKY_ISA_DSP_ENHANCE),
4916 OP32 ("ldbir.hs",
4917 OPCODE_INFO3 (0xd000b400,
4918 (0_4, AREG, OPRND_SHIFT_0_BIT),
4919 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT),
4920 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4921 CSKY_ISA_DSP_ENHANCE),
4922 OP32 ("stbir.b",
4923 OPCODE_INFO3 (0xd400a000,
4924 (0_4, AREG, OPRND_SHIFT_0_BIT),
4925 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT),
4926 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4927 CSKY_ISA_DSP_ENHANCE),
4928 OP32 ("stbir.h",
4929 OPCODE_INFO3 (0xd400a400,
4930 (0_4, AREG, OPRND_SHIFT_0_BIT),
4931 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT),
4932 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4933 CSKY_ISA_DSP_ENHANCE),
4934 OP32 ("stbir.w",
4935 OPCODE_INFO3 (0xd400a800,
4936 (0_4, AREG, OPRND_SHIFT_0_BIT),
4937 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT),
4938 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4939 CSKY_ISA_DSP_ENHANCE),
4940 /* The followings are add/sub instructions. */
4941 OP32 ("padd.8",
4942 OPCODE_INFO3 (0xf800c040,
4943 (0_4, AREG, OPRND_SHIFT_0_BIT),
4944 (16_20, AREG, OPRND_SHIFT_0_BIT),
4945 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4946 CSKY_ISA_DSP_ENHANCE),
4947 OP32 ("padd.16",
4948 OPCODE_INFO3 (0xf800c000,
4949 (0_4, AREG, OPRND_SHIFT_0_BIT),
4950 (16_20, AREG, OPRND_SHIFT_0_BIT),
4951 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4952 CSKY_ISA_DSP_ENHANCE),
4953 OP32 ("padd.u8.s",
4954 OPCODE_INFO3 (0xf800c140,
4955 (0_4, AREG, OPRND_SHIFT_0_BIT),
4956 (16_20, AREG, OPRND_SHIFT_0_BIT),
4957 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4958 CSKY_ISA_DSP_ENHANCE),
4959 OP32 ("padd.s8.s",
4960 OPCODE_INFO3 (0xf800c1c0,
4961 (0_4, AREG, OPRND_SHIFT_0_BIT),
4962 (16_20, AREG, OPRND_SHIFT_0_BIT),
4963 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4964 CSKY_ISA_DSP_ENHANCE),
4965 OP32 ("padd.u16.s",
4966 OPCODE_INFO3 (0xf800c100,
4967 (0_4, AREG, OPRND_SHIFT_0_BIT),
4968 (16_20, AREG, OPRND_SHIFT_0_BIT),
4969 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4970 CSKY_ISA_DSP_ENHANCE),
4971 OP32 ("padd.s16.s",
4972 OPCODE_INFO3 (0xf800c180,
4973 (0_4, AREG, OPRND_SHIFT_0_BIT),
4974 (16_20, AREG, OPRND_SHIFT_0_BIT),
4975 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4976 CSKY_ISA_DSP_ENHANCE),
4977 OP32 ("add.u32.s",
4978 OPCODE_INFO3 (0xf800c120,
4979 (0_4, AREG, OPRND_SHIFT_0_BIT),
4980 (16_20, AREG, OPRND_SHIFT_0_BIT),
4981 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4982 CSKY_ISA_DSP_ENHANCE),
4983 OP32 ("add.s32.s",
4984 OPCODE_INFO3 (0xf800c1a0,
4985 (0_4, AREG, OPRND_SHIFT_0_BIT),
4986 (16_20, AREG, OPRND_SHIFT_0_BIT),
4987 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4988 CSKY_ISA_DSP_ENHANCE),
4989 OP32 ("psub.8",
4990 OPCODE_INFO3 (0xf800c440,
4991 (0_4, AREG, OPRND_SHIFT_0_BIT),
4992 (16_20, AREG, OPRND_SHIFT_0_BIT),
4993 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4994 CSKY_ISA_DSP_ENHANCE),
4995 OP32 ("psub.16",
4996 OPCODE_INFO3 (0xf800c400,
4997 (0_4, AREG, OPRND_SHIFT_0_BIT),
4998 (16_20, AREG, OPRND_SHIFT_0_BIT),
4999 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5000 CSKY_ISA_DSP_ENHANCE),
5001 OP32 ("psub.u8.s",
5002 OPCODE_INFO3 (0xf800c540,
5003 (0_4, AREG, OPRND_SHIFT_0_BIT),
5004 (16_20, AREG, OPRND_SHIFT_0_BIT),
5005 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5006 CSKY_ISA_DSP_ENHANCE),
5007 OP32 ("psub.s8.s",
5008 OPCODE_INFO3 (0xf800c5c0,
5009 (0_4, AREG, OPRND_SHIFT_0_BIT),
5010 (16_20, AREG, OPRND_SHIFT_0_BIT),
5011 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5012 CSKY_ISA_DSP_ENHANCE),
5013 OP32 ("psub.u16.s",
5014 OPCODE_INFO3 (0xf800c500,
5015 (0_4, AREG, OPRND_SHIFT_0_BIT),
5016 (16_20, AREG, OPRND_SHIFT_0_BIT),
5017 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5018 CSKY_ISA_DSP_ENHANCE),
5019 OP32 ("psub.s16.s",
5020 OPCODE_INFO3 (0xf800c580,
5021 (0_4, AREG, OPRND_SHIFT_0_BIT),
5022 (16_20, AREG, OPRND_SHIFT_0_BIT),
5023 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5024 CSKY_ISA_DSP_ENHANCE),
5025 OP32 ("sub.u32.s",
5026 OPCODE_INFO3 (0xf800c520,
5027 (0_4, AREG, OPRND_SHIFT_0_BIT),
5028 (16_20, AREG, OPRND_SHIFT_0_BIT),
5029 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5030 CSKY_ISA_DSP_ENHANCE),
5031 OP32 ("sub.s32.s",
5032 OPCODE_INFO3 (0xf800c5a0,
5033 (0_4, AREG, OPRND_SHIFT_0_BIT),
5034 (16_20, AREG, OPRND_SHIFT_0_BIT),
5035 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5036 CSKY_ISA_DSP_ENHANCE),
5037 OP32 ("paddh.u8",
5038 OPCODE_INFO3 (0xf800c240,
5039 (0_4, AREG, OPRND_SHIFT_0_BIT),
5040 (16_20, AREG, OPRND_SHIFT_0_BIT),
5041 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5042 CSKY_ISA_DSP_ENHANCE),
5043 OP32 ("paddh.s8",
5044 OPCODE_INFO3 (0xf800c2c0,
5045 (0_4, AREG, OPRND_SHIFT_0_BIT),
5046 (16_20, AREG, OPRND_SHIFT_0_BIT),
5047 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5048 CSKY_ISA_DSP_ENHANCE),
5049 OP32 ("paddh.u16",
5050 OPCODE_INFO3 (0xf800c200,
5051 (0_4, AREG, OPRND_SHIFT_0_BIT),
5052 (16_20, AREG, OPRND_SHIFT_0_BIT),
5053 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5054 CSKY_ISA_DSP_ENHANCE),
5055 OP32 ("paddh.s16",
5056 OPCODE_INFO3 (0xf800c280,
5057 (0_4, AREG, OPRND_SHIFT_0_BIT),
5058 (16_20, AREG, OPRND_SHIFT_0_BIT),
5059 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5060 CSKY_ISA_DSP_ENHANCE),
5061 OP32 ("addh.u32",
5062 OPCODE_INFO3 (0xf800c220,
5063 (0_4, AREG, OPRND_SHIFT_0_BIT),
5064 (16_20, AREG, OPRND_SHIFT_0_BIT),
5065 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5066 CSKY_ISA_DSP_ENHANCE),
5067 OP32 ("addh.s32",
5068 OPCODE_INFO3 (0xf800c2a0,
5069 (0_4, AREG, OPRND_SHIFT_0_BIT),
5070 (16_20, AREG, OPRND_SHIFT_0_BIT),
5071 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5072 CSKY_ISA_DSP_ENHANCE),
5073 OP32 ("psubh.u8",
5074 OPCODE_INFO3 (0xf800c640,
5075 (0_4, AREG, OPRND_SHIFT_0_BIT),
5076 (16_20, AREG, OPRND_SHIFT_0_BIT),
5077 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5078 CSKY_ISA_DSP_ENHANCE),
5079 OP32 ("psubh.s8",
5080 OPCODE_INFO3 (0xf800c6c0,
5081 (0_4, AREG, OPRND_SHIFT_0_BIT),
5082 (16_20, AREG, OPRND_SHIFT_0_BIT),
5083 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5084 CSKY_ISA_DSP_ENHANCE),
5085 OP32 ("psubh.u16",
5086 OPCODE_INFO3 (0xf800c600,
5087 (0_4, AREG, OPRND_SHIFT_0_BIT),
5088 (16_20, AREG, OPRND_SHIFT_0_BIT),
5089 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5090 CSKY_ISA_DSP_ENHANCE),
5091 OP32 ("psubh.s16",
5092 OPCODE_INFO3 (0xf800c680,
5093 (0_4, AREG, OPRND_SHIFT_0_BIT),
5094 (16_20, AREG, OPRND_SHIFT_0_BIT),
5095 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5096 CSKY_ISA_DSP_ENHANCE),
5097 OP32 ("subh.u32",
5098 OPCODE_INFO3 (0xf800c620,
5099 (0_4, AREG, OPRND_SHIFT_0_BIT),
5100 (16_20, AREG, OPRND_SHIFT_0_BIT),
5101 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5102 CSKY_ISA_DSP_ENHANCE),
5103 OP32 ("subh.s32",
5104 OPCODE_INFO3 (0xf800c6a0,
5105 (0_4, AREG, OPRND_SHIFT_0_BIT),
5106 (16_20, AREG, OPRND_SHIFT_0_BIT),
5107 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5108 CSKY_ISA_DSP_ENHANCE),
5109 OP32 ("add.64",
5110 OPCODE_INFO3 (0xf800c060,
5111 (0_4, AREG, OPRND_SHIFT_0_BIT),
5112 (16_20, AREG, OPRND_SHIFT_0_BIT),
5113 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5114 CSKY_ISA_DSP_ENHANCE),
5115 OP32 ("sub.64",
5116 OPCODE_INFO3 (0xf800c460,
5117 (0_4, AREG, OPRND_SHIFT_0_BIT),
5118 (16_20, AREG, OPRND_SHIFT_0_BIT),
5119 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5120 CSKY_ISA_DSP_ENHANCE),
5121 OP32 ("add.u64.s",
5122 OPCODE_INFO3 (0xf800c160,
5123 (0_4, AREG, OPRND_SHIFT_0_BIT),
5124 (16_20, AREG, OPRND_SHIFT_0_BIT),
5125 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5126 CSKY_ISA_DSP_ENHANCE),
5127 OP32 ("add.s64.s",
5128 OPCODE_INFO3 (0xf800c1e0,
5129 (0_4, AREG, OPRND_SHIFT_0_BIT),
5130 (16_20, AREG, OPRND_SHIFT_0_BIT),
5131 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5132 CSKY_ISA_DSP_ENHANCE),
5133 OP32 ("sub.u64.s",
5134 OPCODE_INFO3 (0xf800c560,
5135 (0_4, AREG, OPRND_SHIFT_0_BIT),
5136 (16_20, AREG, OPRND_SHIFT_0_BIT),
5137 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5138 CSKY_ISA_DSP_ENHANCE),
5139 OP32 ("sub.s64.s",
5140 OPCODE_INFO3 (0xf800c5e0,
5141 (0_4, AREG, OPRND_SHIFT_0_BIT),
5142 (16_20, AREG, OPRND_SHIFT_0_BIT),
5143 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5144 CSKY_ISA_DSP_ENHANCE),
5145 /* The following are comparison instructions. */
5146 OP32 ("pasx.16",
5147 OPCODE_INFO3 (0xf800c860,
5148 (0_4, AREG, OPRND_SHIFT_0_BIT),
5149 (16_20, AREG, OPRND_SHIFT_0_BIT),
5150 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5151 CSKY_ISA_DSP_ENHANCE),
5152 OP32 ("psax.16",
5153 OPCODE_INFO3 (0xf800cc60,
5154 (0_4, AREG, OPRND_SHIFT_0_BIT),
5155 (16_20, AREG, OPRND_SHIFT_0_BIT),
5156 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5157 CSKY_ISA_DSP_ENHANCE),
5158 OP32 ("pasx.u16.s",
5159 OPCODE_INFO3 (0xf800c960,
5160 (0_4, AREG, OPRND_SHIFT_0_BIT),
5161 (16_20, AREG, OPRND_SHIFT_0_BIT),
5162 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5163 CSKY_ISA_DSP_ENHANCE),
5164 OP32 ("pasx.s16.s",
5165 OPCODE_INFO3 (0xf800c9e0,
5166 (0_4, AREG, OPRND_SHIFT_0_BIT),
5167 (16_20, AREG, OPRND_SHIFT_0_BIT),
5168 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5169 CSKY_ISA_DSP_ENHANCE),
5170 OP32 ("psax.u16.s",
5171 OPCODE_INFO3 (0xf800cd60,
5172 (0_4, AREG, OPRND_SHIFT_0_BIT),
5173 (16_20, AREG, OPRND_SHIFT_0_BIT),
5174 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5175 CSKY_ISA_DSP_ENHANCE),
5176 OP32 ("psax.s16.s",
5177 OPCODE_INFO3 (0xf800cde0,
5178 (0_4, AREG, OPRND_SHIFT_0_BIT),
5179 (16_20, AREG, OPRND_SHIFT_0_BIT),
5180 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5181 CSKY_ISA_DSP_ENHANCE),
5182 OP32 ("pasxh.u16",
5183 OPCODE_INFO3 (0xf800ca60,
5184 (0_4, AREG, OPRND_SHIFT_0_BIT),
5185 (16_20, AREG, OPRND_SHIFT_0_BIT),
5186 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5187 CSKY_ISA_DSP_ENHANCE),
5188 OP32 ("pasxh.s16",
5189 OPCODE_INFO3 (0xf800cae0,
5190 (0_4, AREG, OPRND_SHIFT_0_BIT),
5191 (16_20, AREG, OPRND_SHIFT_0_BIT),
5192 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5193 CSKY_ISA_DSP_ENHANCE),
5194 OP32 ("psaxh.u16",
5195 OPCODE_INFO3 (0xf800ce60,
5196 (0_4, AREG, OPRND_SHIFT_0_BIT),
5197 (16_20, AREG, OPRND_SHIFT_0_BIT),
5198 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5199 CSKY_ISA_DSP_ENHANCE),
5200 OP32 ("psaxh.s16",
5201 OPCODE_INFO3 (0xf800cee0,
5202 (0_4, AREG, OPRND_SHIFT_0_BIT),
5203 (16_20, AREG, OPRND_SHIFT_0_BIT),
5204 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5205 CSKY_ISA_DSP_ENHANCE),
5206 OP32 ("pcmpne.8",
5207 OPCODE_INFO3 (0xf800c840,
5208 (0_4, AREG, OPRND_SHIFT_0_BIT),
5209 (16_20, AREG, OPRND_SHIFT_0_BIT),
5210 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5211 CSKY_ISA_DSP_ENHANCE),
5212 OP32 ("pcmpne.16",
5213 OPCODE_INFO3 (0xf800c800,
5214 (0_4, AREG, OPRND_SHIFT_0_BIT),
5215 (16_20, AREG, OPRND_SHIFT_0_BIT),
5216 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5217 CSKY_ISA_DSP_ENHANCE),
5218 OP32 ("pcmphs.u8",
5219 OPCODE_INFO3 (0xf800c940,
5220 (0_4, AREG, OPRND_SHIFT_0_BIT),
5221 (16_20, AREG, OPRND_SHIFT_0_BIT),
5222 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5223 CSKY_ISA_DSP_ENHANCE),
5224 OP32 ("pcmphs.s8",
5225 OPCODE_INFO3 (0xf800c9c0,
5226 (0_4, AREG, OPRND_SHIFT_0_BIT),
5227 (16_20, AREG, OPRND_SHIFT_0_BIT),
5228 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5229 CSKY_ISA_DSP_ENHANCE),
5230 OP32 ("pcmphs.u16",
5231 OPCODE_INFO3 (0xf800c900,
5232 (0_4, AREG, OPRND_SHIFT_0_BIT),
5233 (16_20, AREG, OPRND_SHIFT_0_BIT),
5234 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5235 CSKY_ISA_DSP_ENHANCE),
5236 OP32 ("pcmphs.s16",
5237 OPCODE_INFO3 (0xf800c980,
5238 (0_4, AREG, OPRND_SHIFT_0_BIT),
5239 (16_20, AREG, OPRND_SHIFT_0_BIT),
5240 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5241 CSKY_ISA_DSP_ENHANCE),
5242 OP32 ("pcmplt.u8",
5243 OPCODE_INFO3 (0xf800ca40,
5244 (0_4, AREG, OPRND_SHIFT_0_BIT),
5245 (16_20, AREG, OPRND_SHIFT_0_BIT),
5246 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5247 CSKY_ISA_DSP_ENHANCE),
5248 OP32 ("pcmplt.s8",
5249 OPCODE_INFO3 (0xf800cac0,
5250 (0_4, AREG, OPRND_SHIFT_0_BIT),
5251 (16_20, AREG, OPRND_SHIFT_0_BIT),
5252 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5253 CSKY_ISA_DSP_ENHANCE),
5254 OP32 ("pcmplt.u16",
5255 OPCODE_INFO3 (0xf800ca00,
5256 (0_4, AREG, OPRND_SHIFT_0_BIT),
5257 (16_20, AREG, OPRND_SHIFT_0_BIT),
5258 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5259 CSKY_ISA_DSP_ENHANCE),
5260 OP32 ("pcmplt.s16",
5261 OPCODE_INFO3 (0xf800ca80,
5262 (0_4, AREG, OPRND_SHIFT_0_BIT),
5263 (16_20, AREG, OPRND_SHIFT_0_BIT),
5264 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5265 CSKY_ISA_DSP_ENHANCE),
5266 OP32 ("pmax.u8",
5267 OPCODE_INFO3 (0xf800cc40,
5268 (0_4, AREG, OPRND_SHIFT_0_BIT),
5269 (16_20, AREG, OPRND_SHIFT_0_BIT),
5270 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5271 CSKY_ISA_DSP_ENHANCE),
5272 OP32 ("pmax.s8",
5273 OPCODE_INFO3 (0xf800ccc0,
5274 (0_4, AREG, OPRND_SHIFT_0_BIT),
5275 (16_20, AREG, OPRND_SHIFT_0_BIT),
5276 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5277 CSKY_ISA_DSP_ENHANCE),
5278 OP32 ("pmax.u16",
5279 OPCODE_INFO3 (0xf800cc00,
5280 (0_4, AREG, OPRND_SHIFT_0_BIT),
5281 (16_20, AREG, OPRND_SHIFT_0_BIT),
5282 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5283 CSKY_ISA_DSP_ENHANCE),
5284 OP32 ("pmax.s16",
5285 OPCODE_INFO3 (0xf800cc80,
5286 (0_4, AREG, OPRND_SHIFT_0_BIT),
5287 (16_20, AREG, OPRND_SHIFT_0_BIT),
5288 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5289 CSKY_ISA_DSP_ENHANCE),
5290 OP32 ("max.u32",
5291 OPCODE_INFO3 (0xf800cc20,
5292 (0_4, AREG, OPRND_SHIFT_0_BIT),
5293 (16_20, AREG, OPRND_SHIFT_0_BIT),
5294 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5295 CSKY_ISA_DSP_ENHANCE),
5296 OP32 ("max.s32",
5297 OPCODE_INFO3 (0xf800cca0,
5298 (0_4, AREG, OPRND_SHIFT_0_BIT),
5299 (16_20, AREG, OPRND_SHIFT_0_BIT),
5300 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5301 CSKY_ISA_DSP_ENHANCE),
5302 OP32 ("pmin.u8",
5303 OPCODE_INFO3 (0xf800cd40,
5304 (0_4, AREG, OPRND_SHIFT_0_BIT),
5305 (16_20, AREG, OPRND_SHIFT_0_BIT),
5306 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5307 CSKY_ISA_DSP_ENHANCE),
5308 OP32 ("pmin.s8",
5309 OPCODE_INFO3 (0xf800cdc0,
5310 (0_4, AREG, OPRND_SHIFT_0_BIT),
5311 (16_20, AREG, OPRND_SHIFT_0_BIT),
5312 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5313 CSKY_ISA_DSP_ENHANCE),
5314 OP32 ("pmin.u16",
5315 OPCODE_INFO3 (0xf800cd00,
5316 (0_4, AREG, OPRND_SHIFT_0_BIT),
5317 (16_20, AREG, OPRND_SHIFT_0_BIT),
5318 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5319 CSKY_ISA_DSP_ENHANCE),
5320 OP32 ("pmin.s16",
5321 OPCODE_INFO3 (0xf800cd80,
5322 (0_4, AREG, OPRND_SHIFT_0_BIT),
5323 (16_20, AREG, OPRND_SHIFT_0_BIT),
5324 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5325 CSKY_ISA_DSP_ENHANCE),
5326 OP32 ("min.u32",
5327 OPCODE_INFO3 (0xf800cd20,
5328 (0_4, AREG, OPRND_SHIFT_0_BIT),
5329 (16_20, AREG, OPRND_SHIFT_0_BIT),
5330 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5331 CSKY_ISA_DSP_ENHANCE),
5332 OP32 ("min.s32",
5333 OPCODE_INFO3 (0xf800cda0,
5334 (0_4, AREG, OPRND_SHIFT_0_BIT),
5335 (16_20, AREG, OPRND_SHIFT_0_BIT),
5336 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5337 CSKY_ISA_DSP_ENHANCE),
5338 OP32 ("sel",
5339 OPCODE_INFO4 (0xf8009000,
5340 (0_4, AREG, OPRND_SHIFT_0_BIT),
5341 (16_20, AREG, OPRND_SHIFT_0_BIT),
5342 (21_25, AREG, OPRND_SHIFT_0_BIT),
5343 (5_9, AREG, OPRND_SHIFT_0_BIT)),
5344 CSKY_ISA_DSP_ENHANCE),
5345 /* The followings are miscs. */
5346 OP32 ("psabsa.u8",
5347 OPCODE_INFO3 (0xf800e040,
5348 (0_4, AREG, OPRND_SHIFT_0_BIT),
5349 (16_20, AREG, OPRND_SHIFT_0_BIT),
5350 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5351 CSKY_ISA_DSP_ENHANCE),
5352 OP32 ("psabsaa.u8",
5353 OPCODE_INFO3 (0xf800e140,
5354 (0_4, AREG, OPRND_SHIFT_0_BIT),
5355 (16_20, AREG, OPRND_SHIFT_0_BIT),
5356 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5357 CSKY_ISA_DSP_ENHANCE),
5358 OP32 ("divul",
5359 OPCODE_INFO3 (0xf800e260,
5360 (0_4, AREG, OPRND_SHIFT_0_BIT),
5361 (16_20, AREG, OPRND_SHIFT_0_BIT),
5362 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5363 CSKYV2_ISA_3E3R3),
5364 OP32 ("divsl",
5365 OPCODE_INFO3 (0xf800e2e0,
5366 (0_4, AREG, OPRND_SHIFT_0_BIT),
5367 (16_20, AREG, OPRND_SHIFT_0_BIT),
5368 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5369 CSKYV2_ISA_3E3R3),
5370 OP32 ("mulaca.s8",
5371 OPCODE_INFO3 (0xf800e4c0,
5372 (0_4, AREG, OPRND_SHIFT_0_BIT),
5373 (16_20, AREG, OPRND_SHIFT_0_BIT),
5374 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5375 CSKY_ISA_DSP_ENHANCE),
5376 /* The followings are shift instructions. */
5377 OP32 ("asri.s32.r",
5378 OPCODE_INFO3 (0xf800d1a0,
5379 (0_4, AREG, OPRND_SHIFT_0_BIT),
5380 (16_20, AREG, OPRND_SHIFT_0_BIT),
5381 (21_25, OIMM5b, OPRND_SHIFT_0_BIT)),
5382 CSKY_ISA_DSP_ENHANCE),
5383 OP32 ("asr.s32.r",
5384 OPCODE_INFO3 (0xf800d1e0,
5385 (0_4, AREG, OPRND_SHIFT_0_BIT),
5386 (16_20, AREG, OPRND_SHIFT_0_BIT),
5387 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5388 CSKY_ISA_DSP_ENHANCE),
5389 OP32 ("lsri.u32.r",
5390 OPCODE_INFO3 (0xf800d320,
5391 (0_4, AREG, OPRND_SHIFT_0_BIT),
5392 (16_20, AREG, OPRND_SHIFT_0_BIT),
5393 (21_25, OIMM5b, OPRND_SHIFT_0_BIT)),
5394 CSKY_ISA_DSP_ENHANCE),
5395 OP32 ("lsr.u32.r",
5396 OPCODE_INFO3 (0xf800d360,
5397 (0_4, AREG, OPRND_SHIFT_0_BIT),
5398 (16_20, AREG, OPRND_SHIFT_0_BIT),
5399 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5400 CSKY_ISA_DSP_ENHANCE),
5401 OP32 ("lsli.u32.s",
5402 OPCODE_INFO3 (0xf800d520,
5403 (0_4, AREG, OPRND_SHIFT_0_BIT),
5404 (16_20, AREG, OPRND_SHIFT_0_BIT),
5405 (21_25, OIMM5b, OPRND_SHIFT_0_BIT)),
5406 CSKY_ISA_DSP_ENHANCE),
5407 OP32 ("lsli.s32.s",
5408 OPCODE_INFO3 (0xf800d5a0,
5409 (0_4, AREG, OPRND_SHIFT_0_BIT),
5410 (16_20, AREG, OPRND_SHIFT_0_BIT),
5411 (21_25, OIMM5b, OPRND_SHIFT_0_BIT)),
5412 CSKY_ISA_DSP_ENHANCE),
5413 OP32 ("lsl.u32.s",
5414 OPCODE_INFO3 (0xf800d560,
5415 (0_4, AREG, OPRND_SHIFT_0_BIT),
5416 (16_20, AREG, OPRND_SHIFT_0_BIT),
5417 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5418 CSKY_ISA_DSP_ENHANCE),
5419 OP32 ("lsl.s32.s",
5420 OPCODE_INFO3 (0xf800d5e0,
5421 (0_4, AREG, OPRND_SHIFT_0_BIT),
5422 (16_20, AREG, OPRND_SHIFT_0_BIT),
5423 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5424 CSKY_ISA_DSP_ENHANCE),
5425 OP32 ("pasri.s16",
5426 OPCODE_INFO3 (0xf800d080,
5427 (0_4, AREG, OPRND_SHIFT_0_BIT),
5428 (16_20, AREG, OPRND_SHIFT_0_BIT),
5429 (21_25, OIMM4b, OPRND_SHIFT_0_BIT)),
5430 CSKY_ISA_DSP_ENHANCE),
5431 OP32 ("pasr.s16",
5432 OPCODE_INFO3 (0xf800d0c0,
5433 (0_4, AREG, OPRND_SHIFT_0_BIT),
5434 (16_20, AREG, OPRND_SHIFT_0_BIT),
5435 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5436 CSKY_ISA_DSP_ENHANCE),
5437 OP32 ("pasri.s16.r",
5438 OPCODE_INFO3 (0xf800d180,
5439 (0_4, AREG, OPRND_SHIFT_0_BIT),
5440 (16_20, AREG, OPRND_SHIFT_0_BIT),
5441 (21_25, OIMM4b, OPRND_SHIFT_0_BIT)),
5442 CSKY_ISA_DSP_ENHANCE),
5443 OP32 ("pasr.s16.r",
5444 OPCODE_INFO3 (0xf800d1c0,
5445 (0_4, AREG, OPRND_SHIFT_0_BIT),
5446 (16_20, AREG, OPRND_SHIFT_0_BIT),
5447 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5448 CSKY_ISA_DSP_ENHANCE),
5449 OP32 ("plsri.u16",
5450 OPCODE_INFO3 (0xf800d200,
5451 (0_4, AREG, OPRND_SHIFT_0_BIT),
5452 (16_20, AREG, OPRND_SHIFT_0_BIT),
5453 (21_25, OIMM4b, OPRND_SHIFT_0_BIT)),
5454 CSKY_ISA_DSP_ENHANCE),
5455 OP32 ("plsr.u16",
5456 OPCODE_INFO3 (0xf800d240,
5457 (0_4, AREG, OPRND_SHIFT_0_BIT),
5458 (16_20, AREG, OPRND_SHIFT_0_BIT),
5459 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5460 CSKY_ISA_DSP_ENHANCE),
5461 OP32 ("plsri.u16.r",
5462 OPCODE_INFO3 (0xf800d300,
5463 (0_4, AREG, OPRND_SHIFT_0_BIT),
5464 (16_20, AREG, OPRND_SHIFT_0_BIT),
5465 (21_25, OIMM4b, OPRND_SHIFT_0_BIT)),
5466 CSKY_ISA_DSP_ENHANCE),
5467 OP32 ("plsr.u16.r",
5468 OPCODE_INFO3 (0xf800d340,
5469 (0_4, AREG, OPRND_SHIFT_0_BIT),
5470 (16_20, AREG, OPRND_SHIFT_0_BIT),
5471 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5472 CSKY_ISA_DSP_ENHANCE),
5473 OP32 ("plsli.16",
5474 OPCODE_INFO3 (0xf800d400,
5475 (0_4, AREG, OPRND_SHIFT_0_BIT),
5476 (16_20, AREG, OPRND_SHIFT_0_BIT),
5477 (21_25, OIMM4b, OPRND_SHIFT_0_BIT)),
5478 CSKY_ISA_DSP_ENHANCE),
5479 OP32 ("plsl.u16",
5480 OPCODE_INFO3 (0xf800d440,
5481 (0_4, AREG, OPRND_SHIFT_0_BIT),
5482 (16_20, AREG, OPRND_SHIFT_0_BIT),
5483 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5484 CSKY_ISA_DSP_ENHANCE),
5485 OP32 ("plsli.u16.s",
5486 OPCODE_INFO3 (0xf800d500,
5487 (0_4, AREG, OPRND_SHIFT_0_BIT),
5488 (16_20, AREG, OPRND_SHIFT_0_BIT),
5489 (21_25, OIMM4b, OPRND_SHIFT_0_BIT)),
5490 CSKY_ISA_DSP_ENHANCE),
5491 OP32 ("plsli.s16.s",
5492 OPCODE_INFO3 (0xf800d580,
5493 (0_4, AREG, OPRND_SHIFT_0_BIT),
5494 (16_20, AREG, OPRND_SHIFT_0_BIT),
5495 (21_25, OIMM4b, OPRND_SHIFT_0_BIT)),
5496 CSKY_ISA_DSP_ENHANCE),
5497 OP32 ("plsl.u16.s",
5498 OPCODE_INFO3 (0xf800d540,
5499 (0_4, AREG, OPRND_SHIFT_0_BIT),
5500 (16_20, AREG, OPRND_SHIFT_0_BIT),
5501 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5502 CSKY_ISA_DSP_ENHANCE),
5503 OP32 ("plsl.s16.s",
5504 OPCODE_INFO3 (0xf800d5c0,
5505 (0_4, AREG, OPRND_SHIFT_0_BIT),
5506 (16_20, AREG, OPRND_SHIFT_0_BIT),
5507 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5508 CSKY_ISA_DSP_ENHANCE),
5509 /* The following are package & unpackage instructions. */
5510 OP32 ("pkg",
5511 OPCODE_INFO5 (0xf800a000,
5512 (0_4, AREG, OPRND_SHIFT_0_BIT),
5513 (16_20, AREG, OPRND_SHIFT_0_BIT),
5514 (5_8, IMM4b, OPRND_SHIFT_0_BIT),
5515 (21_25, AREG, OPRND_SHIFT_0_BIT),
5516 (9_12, OIMM4b, OPRND_SHIFT_0_BIT)),
5517 CSKY_ISA_DSP_ENHANCE),
5518 OP32 ("dexti",
5519 OPCODE_INFO4 (0xf8009800,
5520 (0_4, AREG, OPRND_SHIFT_0_BIT),
5521 (16_20, AREG, OPRND_SHIFT_0_BIT),
5522 (21_25, AREG, OPRND_SHIFT_0_BIT),
5523 (5_9, IMM5b, OPRND_SHIFT_0_BIT)),
5524 CSKY_ISA_DSP_ENHANCE),
5525 OP32 ("dext",
5526 OPCODE_INFO4 (0xf8009c00,
5527 (0_4, AREG, OPRND_SHIFT_0_BIT),
5528 (16_20, AREG, OPRND_SHIFT_0_BIT),
5529 (21_25, AREG, OPRND_SHIFT_0_BIT),
5530 (5_9, AREG, OPRND_SHIFT_0_BIT)),
5531 CSKY_ISA_DSP_ENHANCE),
5532 OP32 ("pkgll",
5533 OPCODE_INFO3 (0xf800d840,
5534 (0_4, AREG, OPRND_SHIFT_0_BIT),
5535 (16_20, AREG, OPRND_SHIFT_0_BIT),
5536 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5537 CSKY_ISA_DSP_ENHANCE),
5538 OP32 ("pkghh",
5539 OPCODE_INFO3 (0xf800d860,
5540 (0_4, AREG, OPRND_SHIFT_0_BIT),
5541 (16_20, AREG, OPRND_SHIFT_0_BIT),
5542 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5543 CSKY_ISA_DSP_ENHANCE),
5544 OP32 ("pext.u8.e",
5545 OPCODE_INFO2 (0xf800d900,
5546 (0_4, AREG, OPRND_SHIFT_0_BIT),
5547 (16_20, AREG, OPRND_SHIFT_0_BIT)),
5548 CSKY_ISA_DSP_ENHANCE),
5549 OP32 ("pext.s8.e",
5550 OPCODE_INFO2 (0xf800d980,
5551 (0_4, AREG, OPRND_SHIFT_0_BIT),
5552 (16_20, AREG, OPRND_SHIFT_0_BIT)),
5553 CSKY_ISA_DSP_ENHANCE),
5554 OP32 ("pextx.u8.e",
5555 OPCODE_INFO2 (0xf800d920,
5556 (0_4, AREG, OPRND_SHIFT_0_BIT),
5557 (16_20, AREG, OPRND_SHIFT_0_BIT)),
5558 CSKY_ISA_DSP_ENHANCE),
5559 OP32 ("pextx.s8.e",
5560 OPCODE_INFO2 (0xf800d9a0,
5561 (0_4, AREG, OPRND_SHIFT_0_BIT),
5562 (16_20, AREG, OPRND_SHIFT_0_BIT)),
5563 CSKY_ISA_DSP_ENHANCE),
5564 OP32 ("narl",
5565 OPCODE_INFO3 (0xf800da00,
5566 (0_4, AREG, OPRND_SHIFT_0_BIT),
5567 (16_20, AREG, OPRND_SHIFT_0_BIT),
5568 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5569 CSKY_ISA_DSP_ENHANCE),
5570 OP32 ("narh",
5571 OPCODE_INFO3 (0xf800da20,
5572 (0_4, AREG, OPRND_SHIFT_0_BIT),
5573 (16_20, AREG, OPRND_SHIFT_0_BIT),
5574 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5575 CSKY_ISA_DSP_ENHANCE),
5576 OP32 ("narlx",
5577 OPCODE_INFO3 (0xf800da40,
5578 (0_4, AREG, OPRND_SHIFT_0_BIT),
5579 (16_20, AREG, OPRND_SHIFT_0_BIT),
5580 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5581 CSKY_ISA_DSP_ENHANCE),
5582 OP32 ("narhx",
5583 OPCODE_INFO3 (0xf800da60,
5584 (0_4, AREG, OPRND_SHIFT_0_BIT),
5585 (16_20, AREG, OPRND_SHIFT_0_BIT),
5586 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5587 CSKY_ISA_DSP_ENHANCE),
5588 OP32 ("clipi.u32",
5589 OPCODE_INFO3 (0xf800db00,
5590 (0_4, AREG, OPRND_SHIFT_0_BIT),
5591 (16_20, AREG, OPRND_SHIFT_0_BIT),
5592 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
5593 CSKY_ISA_DSP_ENHANCE),
5594 OP32 ("clipi.s32",
5595 OPCODE_INFO3 (0xf800db80,
5596 (0_4, AREG, OPRND_SHIFT_0_BIT),
5597 (16_20, AREG, OPRND_SHIFT_0_BIT),
5598 (21_25, OIMM5b, OPRND_SHIFT_0_BIT)),
5599 CSKY_ISA_DSP_ENHANCE),
5600 OP32 ("clip.u32",
5601 OPCODE_INFO3 (0xf800db20,
5602 (0_4, AREG, OPRND_SHIFT_0_BIT),
5603 (16_20, AREG, OPRND_SHIFT_0_BIT),
5604 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5605 CSKY_ISA_DSP_ENHANCE),
5606 OP32 ("clip.s32",
5607 OPCODE_INFO3 (0xf800dba0,
5608 (0_4, AREG, OPRND_SHIFT_0_BIT),
5609 (16_20, AREG, OPRND_SHIFT_0_BIT),
5610 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5611 CSKY_ISA_DSP_ENHANCE),
5612 OP32 ("pclipi.u16",
5613 OPCODE_INFO3 (0xf800db40,
5614 (0_4, AREG, OPRND_SHIFT_0_BIT),
5615 (16_20, AREG, OPRND_SHIFT_0_BIT),
5616 (21_25, IMM4b, OPRND_SHIFT_0_BIT)),
5617 CSKY_ISA_DSP_ENHANCE),
5618 OP32 ("pclipi.s16",
5619 OPCODE_INFO3 (0xf800dbc0,
5620 (0_4, AREG, OPRND_SHIFT_0_BIT),
5621 (16_20, AREG, OPRND_SHIFT_0_BIT),
5622 (21_25, OIMM4b, OPRND_SHIFT_0_BIT)),
5623 CSKY_ISA_DSP_ENHANCE),
5624 OP32 ("pclip.u16",
5625 OPCODE_INFO3 (0xf800db60,
5626 (0_4, AREG, OPRND_SHIFT_0_BIT),
5627 (16_20, AREG, OPRND_SHIFT_0_BIT),
5628 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5629 CSKY_ISA_DSP_ENHANCE),
5630 OP32 ("pclip.s16",
5631 OPCODE_INFO3 (0xf800dbe0,
5632 (0_4, AREG, OPRND_SHIFT_0_BIT),
5633 (16_20, AREG, OPRND_SHIFT_0_BIT),
5634 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5635 CSKY_ISA_DSP_ENHANCE),
5636 OP32 ("pabs.s8.s",
5637 OPCODE_INFO2 (0xf800dc80,
5638 (0_4, AREG, OPRND_SHIFT_0_BIT),
5639 (16_20, AREG, OPRND_SHIFT_0_BIT)),
5640 CSKY_ISA_DSP_ENHANCE),
5641 OP32 ("pabs.s16.s",
5642 OPCODE_INFO2 (0xf800dca0,
5643 (0_4, AREG, OPRND_SHIFT_0_BIT),
5644 (16_20, AREG, OPRND_SHIFT_0_BIT)),
5645 CSKY_ISA_DSP_ENHANCE),
5646 OP32 ("abs.s32.s",
5647 OPCODE_INFO2 (0xf800dcc0,
5648 (0_4, AREG, OPRND_SHIFT_0_BIT),
5649 (16_20, AREG, OPRND_SHIFT_0_BIT)),
5650 CSKY_ISA_DSP_ENHANCE),
5651 OP32 ("pneg.s8.s",
5652 OPCODE_INFO2 (0xf800dd80,
5653 (0_4, AREG, OPRND_SHIFT_0_BIT),
5654 (16_20, AREG, OPRND_SHIFT_0_BIT)),
5655 CSKY_ISA_DSP_ENHANCE),
5656 OP32 ("pneg.s16.s",
5657 OPCODE_INFO2 (0xf800dda0,
5658 (0_4, AREG, OPRND_SHIFT_0_BIT),
5659 (16_20, AREG, OPRND_SHIFT_0_BIT)),
5660 CSKY_ISA_DSP_ENHANCE),
5661 OP32 ("neg.s32.s",
5662 OPCODE_INFO2 (0xf800ddc0,
5663 (0_4, AREG, OPRND_SHIFT_0_BIT),
5664 (16_20, AREG, OPRND_SHIFT_0_BIT)),
5665 CSKY_ISA_DSP_ENHANCE),
5666 OP32 ("dup.8",
5667 OPCODE_INFO3 (0xf800de00,
5668 (0_4, AREG, OPRND_SHIFT_0_BIT),
5669 (16_20, AREG, OPRND_SHIFT_0_BIT),
5670 (5_6, IMM2b, OPRND_SHIFT_0_BIT)),
5671 CSKY_ISA_DSP_ENHANCE),
5672 OP32 ("dup.16",
5673 OPCODE_INFO3 (0xf800df00,
5674 (0_4, AREG, OPRND_SHIFT_0_BIT),
5675 (16_20, AREG, OPRND_SHIFT_0_BIT),
5676 (5_6, IMM1b, OPRND_SHIFT_0_BIT)),
5677 CSKY_ISA_DSP_ENHANCE),
5678 /* The followings are multiplication instructions. */
5679 OP32 ("mul.u32",
5680 OPCODE_INFO3 (0xf8008000,
5681 (0_4, AREG, OPRND_SHIFT_0_BIT),
5682 (16_20, AREG, OPRND_SHIFT_0_BIT),
5683 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5684 CSKYV2_ISA_3E3R1),
5685 OP32 ("mul.s32",
5686 OPCODE_INFO3 (0xf8008200,
5687 (0_4, AREG, OPRND_SHIFT_0_BIT),
5688 (16_20, AREG, OPRND_SHIFT_0_BIT),
5689 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5690 CSKYV2_ISA_3E3R1),
5691 OP32 ("mula.u32",
5692 OPCODE_INFO3 (0xf8008080,
5693 (0_4, AREG, OPRND_SHIFT_0_BIT),
5694 (16_20, AREG, OPRND_SHIFT_0_BIT),
5695 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5696 CSKYV2_ISA_3E3R1),
5697 OP32 ("mula.s32",
5698 OPCODE_INFO3 (0xf8008280,
5699 (0_4, AREG, OPRND_SHIFT_0_BIT),
5700 (16_20, AREG, OPRND_SHIFT_0_BIT),
5701 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5702 CSKYV2_ISA_3E3R1),
5703 OP32 ("mula.32.l",
5704 OPCODE_INFO3 (0xf8008440,
5705 (0_4, AREG, OPRND_SHIFT_0_BIT),
5706 (16_20, AREG, OPRND_SHIFT_0_BIT),
5707 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5708 CSKYV2_ISA_3E3R1),
5709 OP32 ("mulall.s16.s",
5710 OPCODE_INFO3 (0xf80081a0,
5711 (0_4, AREG, OPRND_SHIFT_0_BIT),
5712 (16_20, AREG, OPRND_SHIFT_0_BIT),
5713 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5714 CSKYV2_ISA_3E3R1),
5715 OP32 ("muls.u32",
5716 OPCODE_INFO3 (0xf80080c0,
5717 (0_4, AREG, OPRND_SHIFT_0_BIT),
5718 (16_20, AREG, OPRND_SHIFT_0_BIT),
5719 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5720 CSKY_ISA_DSP_ENHANCE),
5721 OP32 ("muls.s32",
5722 OPCODE_INFO3 (0xf80082c0,
5723 (0_4, AREG, OPRND_SHIFT_0_BIT),
5724 (16_20, AREG, OPRND_SHIFT_0_BIT),
5725 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5726 CSKY_ISA_DSP_ENHANCE),
5727 OP32 ("mula.u32.s",
5728 OPCODE_INFO3 (0xf8008180,
5729 (0_4, AREG, OPRND_SHIFT_0_BIT),
5730 (16_20, AREG, OPRND_SHIFT_0_BIT),
5731 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5732 CSKY_ISA_DSP_ENHANCE),
5733 OP32 ("mula.s32.s",
5734 OPCODE_INFO3 (0xf8008380,
5735 (0_4, AREG, OPRND_SHIFT_0_BIT),
5736 (16_20, AREG, OPRND_SHIFT_0_BIT),
5737 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5738 CSKY_ISA_DSP_ENHANCE),
5739 OP32 ("muls.u32.s",
5740 OPCODE_INFO3 (0xf80081c0,
5741 (0_4, AREG, OPRND_SHIFT_0_BIT),
5742 (16_20, AREG, OPRND_SHIFT_0_BIT),
5743 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5744 CSKY_ISA_DSP_ENHANCE),
5745 OP32 ("muls.s32.s",
5746 OPCODE_INFO3 (0xf80083c0,
5747 (0_4, AREG, OPRND_SHIFT_0_BIT),
5748 (16_20, AREG, OPRND_SHIFT_0_BIT),
5749 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5750 CSKY_ISA_DSP_ENHANCE),
5751 OP32 ("mul.s32.h",
5752 OPCODE_INFO3 (0xf8008400,
5753 (0_4, AREG, OPRND_SHIFT_0_BIT),
5754 (16_20, AREG, OPRND_SHIFT_0_BIT),
5755 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5756 CSKY_ISA_DSP_ENHANCE),
5757 OP32 ("mul.s32.rh",
5758 OPCODE_INFO3 (0xf8008600,
5759 (0_4, AREG, OPRND_SHIFT_0_BIT),
5760 (16_20, AREG, OPRND_SHIFT_0_BIT),
5761 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5762 CSKY_ISA_DSP_ENHANCE),
5763 OP32 ("rmul.s32.h",
5764 OPCODE_INFO3 (0xf8008500,
5765 (0_4, AREG, OPRND_SHIFT_0_BIT),
5766 (16_20, AREG, OPRND_SHIFT_0_BIT),
5767 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5768 CSKY_ISA_DSP_ENHANCE),
5769 OP32 ("rmul.s32.rh",
5770 OPCODE_INFO3 (0xf8008700,
5771 (0_4, AREG, OPRND_SHIFT_0_BIT),
5772 (16_20, AREG, OPRND_SHIFT_0_BIT),
5773 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5774 CSKY_ISA_DSP_ENHANCE),
5775 OP32 ("mula.s32.hs",
5776 OPCODE_INFO3 (0xf8008580,
5777 (0_4, AREG, OPRND_SHIFT_0_BIT),
5778 (16_20, AREG, OPRND_SHIFT_0_BIT),
5779 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5780 CSKY_ISA_DSP_ENHANCE),
5781 OP32 ("muls.s32.hs",
5782 OPCODE_INFO3 (0xf80085c0,
5783 (0_4, AREG, OPRND_SHIFT_0_BIT),
5784 (16_20, AREG, OPRND_SHIFT_0_BIT),
5785 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5786 CSKY_ISA_DSP_ENHANCE),
5787 OP32 ("mula.s32.rhs",
5788 OPCODE_INFO3 (0xf8008780,
5789 (0_4, AREG, OPRND_SHIFT_0_BIT),
5790 (16_20, AREG, OPRND_SHIFT_0_BIT),
5791 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5792 CSKY_ISA_DSP_ENHANCE),
5793 OP32 ("muls.s32.rhs",
5794 OPCODE_INFO3 (0xf80087c0,
5795 (0_4, AREG, OPRND_SHIFT_0_BIT),
5796 (16_20, AREG, OPRND_SHIFT_0_BIT),
5797 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5798 CSKY_ISA_DSP_ENHANCE),
5799 OP32 ("mulxl.s32",
5800 OPCODE_INFO3 (0xf8008800,
5801 (0_4, AREG, OPRND_SHIFT_0_BIT),
5802 (16_20, AREG, OPRND_SHIFT_0_BIT),
5803 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5804 CSKY_ISA_DSP_ENHANCE),
5805 OP32 ("mulxl.s32.r",
5806 OPCODE_INFO3 (0xf8008a00,
5807 (0_4, AREG, OPRND_SHIFT_0_BIT),
5808 (16_20, AREG, OPRND_SHIFT_0_BIT),
5809 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5810 CSKY_ISA_DSP_ENHANCE),
5811 OP32 ("mulxh.s32",
5812 OPCODE_INFO3 (0xf8008c00,
5813 (0_4, AREG, OPRND_SHIFT_0_BIT),
5814 (16_20, AREG, OPRND_SHIFT_0_BIT),
5815 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5816 CSKY_ISA_DSP_ENHANCE),
5817 OP32 ("mulxh.s32.r",
5818 OPCODE_INFO3 (0xf8008e00,
5819 (0_4, AREG, OPRND_SHIFT_0_BIT),
5820 (16_20, AREG, OPRND_SHIFT_0_BIT),
5821 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5822 CSKY_ISA_DSP_ENHANCE),
5823 OP32 ("rmulxl.s32",
5824 OPCODE_INFO3 (0xf8008900,
5825 (0_4, AREG, OPRND_SHIFT_0_BIT),
5826 (16_20, AREG, OPRND_SHIFT_0_BIT),
5827 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5828 CSKY_ISA_DSP_ENHANCE),
5829 OP32 ("rmulxl.s32.r",
5830 OPCODE_INFO3 (0xf8008b00,
5831 (0_4, AREG, OPRND_SHIFT_0_BIT),
5832 (16_20, AREG, OPRND_SHIFT_0_BIT),
5833 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5834 CSKY_ISA_DSP_ENHANCE),
5835 OP32 ("rmulxh.s32",
5836 OPCODE_INFO3 (0xf8008d00,
5837 (0_4, AREG, OPRND_SHIFT_0_BIT),
5838 (16_20, AREG, OPRND_SHIFT_0_BIT),
5839 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5840 CSKY_ISA_DSP_ENHANCE),
5841 OP32 ("rmulxh.s32.r",
5842 OPCODE_INFO3 (0xf8008f00,
5843 (0_4, AREG, OPRND_SHIFT_0_BIT),
5844 (16_20, AREG, OPRND_SHIFT_0_BIT),
5845 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5846 CSKY_ISA_DSP_ENHANCE),
5847 OP32 ("mulaxl.s32.s",
5848 OPCODE_INFO3 (0xf8008980,
5849 (0_4, AREG, OPRND_SHIFT_0_BIT),
5850 (16_20, AREG, OPRND_SHIFT_0_BIT),
5851 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5852 CSKY_ISA_DSP_ENHANCE),
5853 OP32 ("mulaxl.s32.rs",
5854 OPCODE_INFO3 (0xf8008b80,
5855 (0_4, AREG, OPRND_SHIFT_0_BIT),
5856 (16_20, AREG, OPRND_SHIFT_0_BIT),
5857 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5858 CSKY_ISA_DSP_ENHANCE),
5859 OP32 ("mulaxh.s32.s",
5860 OPCODE_INFO3 (0xf8008d80,
5861 (0_4, AREG, OPRND_SHIFT_0_BIT),
5862 (16_20, AREG, OPRND_SHIFT_0_BIT),
5863 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5864 CSKY_ISA_DSP_ENHANCE),
5865 OP32 ("mulaxh.s32.rs",
5866 OPCODE_INFO3 (0xf8008f80,
5867 (0_4, AREG, OPRND_SHIFT_0_BIT),
5868 (16_20, AREG, OPRND_SHIFT_0_BIT),
5869 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5870 CSKY_ISA_DSP_ENHANCE),
5871 OP32 ("mulll.s16",
5872 OPCODE_INFO3 (0xf8008020,
5873 (0_4, AREG, OPRND_SHIFT_0_BIT),
5874 (16_20, AREG, OPRND_SHIFT_0_BIT),
5875 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5876 CSKY_ISA_DSP_ENHANCE),
5877 OP32 ("mulhh.s16",
5878 OPCODE_INFO3 (0xf8008260,
5879 (0_4, AREG, OPRND_SHIFT_0_BIT),
5880 (16_20, AREG, OPRND_SHIFT_0_BIT),
5881 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5882 CSKY_ISA_DSP_ENHANCE),
5883 OP32 ("mulhl.s16",
5884 OPCODE_INFO3 (0xf8008220,
5885 (0_4, AREG, OPRND_SHIFT_0_BIT),
5886 (16_20, AREG, OPRND_SHIFT_0_BIT),
5887 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5888 CSKY_ISA_DSP_ENHANCE),
5889 OP32 ("rmulll.s16",
5890 OPCODE_INFO3 (0xf8008120,
5891 (0_4, AREG, OPRND_SHIFT_0_BIT),
5892 (16_20, AREG, OPRND_SHIFT_0_BIT),
5893 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5894 CSKY_ISA_DSP_ENHANCE),
5895 OP32 ("rmulhh.s16",
5896 OPCODE_INFO3 (0xf8008360,
5897 (0_4, AREG, OPRND_SHIFT_0_BIT),
5898 (16_20, AREG, OPRND_SHIFT_0_BIT),
5899 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5900 CSKY_ISA_DSP_ENHANCE),
5901 OP32 ("rmulhl.s16",
5902 OPCODE_INFO3 (0xf8008320,
5903 (0_4, AREG, OPRND_SHIFT_0_BIT),
5904 (16_20, AREG, OPRND_SHIFT_0_BIT),
5905 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5906 CSKY_ISA_DSP_ENHANCE),
5907 OP32 ("mulahh.s16.s",
5908 OPCODE_INFO3 (0xf80083e0,
5909 (0_4, AREG, OPRND_SHIFT_0_BIT),
5910 (16_20, AREG, OPRND_SHIFT_0_BIT),
5911 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5912 CSKY_ISA_DSP_ENHANCE),
5913 OP32 ("mulahl.s16.s",
5914 OPCODE_INFO3 (0xf80083a0,
5915 (0_4, AREG, OPRND_SHIFT_0_BIT),
5916 (16_20, AREG, OPRND_SHIFT_0_BIT),
5917 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5918 CSKY_ISA_DSP_ENHANCE),
5919 OP32 ("mulall.s16.e",
5920 OPCODE_INFO3 (0xf80080a0,
5921 (0_4, AREG, OPRND_SHIFT_0_BIT),
5922 (16_20, AREG, OPRND_SHIFT_0_BIT),
5923 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5924 CSKY_ISA_DSP_ENHANCE),
5925 OP32 ("mulahh.s16.e",
5926 OPCODE_INFO3 (0xf80082e0,
5927 (0_4, AREG, OPRND_SHIFT_0_BIT),
5928 (16_20, AREG, OPRND_SHIFT_0_BIT),
5929 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5930 CSKY_ISA_DSP_ENHANCE),
5931 OP32 ("mulahl.s16.e",
5932 OPCODE_INFO3 (0xf80080e0,
5933 (0_4, AREG, OPRND_SHIFT_0_BIT),
5934 (16_20, AREG, OPRND_SHIFT_0_BIT),
5935 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5936 CSKY_ISA_DSP_ENHANCE),
5937 OP32 ("pmul.u16",
5938 OPCODE_INFO3 (0xf80084a0,
5939 (0_4, AREG, OPRND_SHIFT_0_BIT),
5940 (16_20, AREG, OPRND_SHIFT_0_BIT),
5941 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5942 CSKY_ISA_DSP_ENHANCE),
5943 OP32 ("pmulx.u16",
5944 OPCODE_INFO3 (0xf80084e0,
5945 (0_4, AREG, OPRND_SHIFT_0_BIT),
5946 (16_20, AREG, OPRND_SHIFT_0_BIT),
5947 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5948 CSKY_ISA_DSP_ENHANCE),
5949 OP32 ("pmul.s16",
5950 OPCODE_INFO3 (0xf8008420,
5951 (0_4, AREG, OPRND_SHIFT_0_BIT),
5952 (16_20, AREG, OPRND_SHIFT_0_BIT),
5953 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5954 CSKY_ISA_DSP_ENHANCE),
5955 OP32 ("pmulx.s16",
5956 OPCODE_INFO3 (0xf8008460,
5957 (0_4, AREG, OPRND_SHIFT_0_BIT),
5958 (16_20, AREG, OPRND_SHIFT_0_BIT),
5959 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5960 CSKY_ISA_DSP_ENHANCE),
5961 OP32 ("prmul.s16",
5962 OPCODE_INFO3 (0xf8008520,
5963 (0_4, AREG, OPRND_SHIFT_0_BIT),
5964 (16_20, AREG, OPRND_SHIFT_0_BIT),
5965 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5966 CSKY_ISA_DSP_ENHANCE),
5967 OP32 ("prmulx.s16",
5968 OPCODE_INFO3 (0xf8008560,
5969 (0_4, AREG, OPRND_SHIFT_0_BIT),
5970 (16_20, AREG, OPRND_SHIFT_0_BIT),
5971 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5972 CSKY_ISA_DSP_ENHANCE),
5973 OP32 ("prmul.s16.h",
5974 OPCODE_INFO3 (0xf80085a0,
5975 (0_4, AREG, OPRND_SHIFT_0_BIT),
5976 (16_20, AREG, OPRND_SHIFT_0_BIT),
5977 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5978 CSKY_ISA_DSP_ENHANCE),
5979 OP32 ("prmul.s16.rh",
5980 OPCODE_INFO3 (0xf80087a0,
5981 (0_4, AREG, OPRND_SHIFT_0_BIT),
5982 (16_20, AREG, OPRND_SHIFT_0_BIT),
5983 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5984 CSKY_ISA_DSP_ENHANCE),
5985 OP32 ("prmulx.s16.h",
5986 OPCODE_INFO3 (0xf80085e0,
5987 (0_4, AREG, OPRND_SHIFT_0_BIT),
5988 (16_20, AREG, OPRND_SHIFT_0_BIT),
5989 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5990 CSKY_ISA_DSP_ENHANCE),
5991 OP32 ("prmulx.s16.rh",
5992 OPCODE_INFO3 (0xf80087e0,
5993 (0_4, AREG, OPRND_SHIFT_0_BIT),
5994 (16_20, AREG, OPRND_SHIFT_0_BIT),
5995 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5996 CSKY_ISA_DSP_ENHANCE),
5997 OP32 ("mulca.s16.s",
5998 OPCODE_INFO3 (0xf8008920,
5999 (0_4, AREG, OPRND_SHIFT_0_BIT),
6000 (16_20, AREG, OPRND_SHIFT_0_BIT),
6001 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6002 CSKY_ISA_DSP_ENHANCE),
6003 OP32 ("mulcax.s16.s",
6004 OPCODE_INFO3 (0xf8008960,
6005 (0_4, AREG, OPRND_SHIFT_0_BIT),
6006 (16_20, AREG, OPRND_SHIFT_0_BIT),
6007 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6008 CSKY_ISA_DSP_ENHANCE),
6009 OP32 ("mulcs.s16",
6010 OPCODE_INFO3 (0xf8008a20,
6011 (0_4, AREG, OPRND_SHIFT_0_BIT),
6012 (16_20, AREG, OPRND_SHIFT_0_BIT),
6013 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6014 CSKY_ISA_DSP_ENHANCE),
6015 OP32 ("mulcsr.s16",
6016 OPCODE_INFO3 (0xf8008a60,
6017 (0_4, AREG, OPRND_SHIFT_0_BIT),
6018 (16_20, AREG, OPRND_SHIFT_0_BIT),
6019 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6020 CSKY_ISA_DSP_ENHANCE),
6021 OP32 ("mulcsx.s16",
6022 OPCODE_INFO3 (0xf8008c20,
6023 (0_4, AREG, OPRND_SHIFT_0_BIT),
6024 (16_20, AREG, OPRND_SHIFT_0_BIT),
6025 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6026 CSKY_ISA_DSP_ENHANCE),
6027 OP32 ("mulaca.s16.s",
6028 OPCODE_INFO3 (0xf80089a0,
6029 (0_4, AREG, OPRND_SHIFT_0_BIT),
6030 (16_20, AREG, OPRND_SHIFT_0_BIT),
6031 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6032 CSKY_ISA_DSP_ENHANCE),
6033 OP32 ("mulacax.s16.s",
6034 OPCODE_INFO3 (0xf80089e0,
6035 (0_4, AREG, OPRND_SHIFT_0_BIT),
6036 (16_20, AREG, OPRND_SHIFT_0_BIT),
6037 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6038 CSKY_ISA_DSP_ENHANCE),
6039 OP32 ("mulacs.s16.s",
6040 OPCODE_INFO3 (0xf8008ba0,
6041 (0_4, AREG, OPRND_SHIFT_0_BIT),
6042 (16_20, AREG, OPRND_SHIFT_0_BIT),
6043 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6044 CSKY_ISA_DSP_ENHANCE),
6045 OP32 ("mulacsr.s16.s",
6046 OPCODE_INFO3 (0xf8008be0,
6047 (0_4, AREG, OPRND_SHIFT_0_BIT),
6048 (16_20, AREG, OPRND_SHIFT_0_BIT),
6049 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6050 CSKY_ISA_DSP_ENHANCE),
6051 OP32 ("mulacsx.s16.s",
6052 OPCODE_INFO3 (0xf8008da0,
6053 (0_4, AREG, OPRND_SHIFT_0_BIT),
6054 (16_20, AREG, OPRND_SHIFT_0_BIT),
6055 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6056 CSKY_ISA_DSP_ENHANCE),
6057 OP32 ("mulsca.s16.s",
6058 OPCODE_INFO3 (0xf8008de0,
6059 (0_4, AREG, OPRND_SHIFT_0_BIT),
6060 (16_20, AREG, OPRND_SHIFT_0_BIT),
6061 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6062 CSKY_ISA_DSP_ENHANCE),
6063 OP32 ("mulscax.s16.s",
6064 OPCODE_INFO3 (0xf8008fa0,
6065 (0_4, AREG, OPRND_SHIFT_0_BIT),
6066 (16_20, AREG, OPRND_SHIFT_0_BIT),
6067 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6068 CSKY_ISA_DSP_ENHANCE),
6069 OP32 ("mulaca.s16.e",
6070 OPCODE_INFO3 (0xf80088a0,
6071 (0_4, AREG, OPRND_SHIFT_0_BIT),
6072 (16_20, AREG, OPRND_SHIFT_0_BIT),
6073 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6074 CSKY_ISA_DSP_ENHANCE),
6075 OP32 ("mulacax.s16.e",
6076 OPCODE_INFO3 (0xf80088e0,
6077 (0_4, AREG, OPRND_SHIFT_0_BIT),
6078 (16_20, AREG, OPRND_SHIFT_0_BIT),
6079 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6080 CSKY_ISA_DSP_ENHANCE),
6081 OP32 ("mulacs.s16.e",
6082 OPCODE_INFO3 (0xf8008aa0,
6083 (0_4, AREG, OPRND_SHIFT_0_BIT),
6084 (16_20, AREG, OPRND_SHIFT_0_BIT),
6085 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6086 CSKY_ISA_DSP_ENHANCE),
6087 OP32 ("mulacsr.s16.e",
6088 OPCODE_INFO3 (0xf8008ae0,
6089 (0_4, AREG, OPRND_SHIFT_0_BIT),
6090 (16_20, AREG, OPRND_SHIFT_0_BIT),
6091 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6092 CSKY_ISA_DSP_ENHANCE),
6093 OP32 ("mulacsx.s16.e",
6094 OPCODE_INFO3 (0xf8008ca0,
6095 (0_4, AREG, OPRND_SHIFT_0_BIT),
6096 (16_20, AREG, OPRND_SHIFT_0_BIT),
6097 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6098 CSKY_ISA_DSP_ENHANCE),
6099 OP32 ("mulsca.s16.e",
6100 OPCODE_INFO3 (0xf8008ce0,
6101 (0_4, AREG, OPRND_SHIFT_0_BIT),
6102 (16_20, AREG, OPRND_SHIFT_0_BIT),
6103 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6104 CSKY_ISA_DSP_ENHANCE),
6105 OP32 ("mulscax.s16.e",
6106 OPCODE_INFO3 (0xf8008ea0,
6107 (0_4, AREG, OPRND_SHIFT_0_BIT),
6108 (16_20, AREG, OPRND_SHIFT_0_BIT),
6109 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6110 CSKY_ISA_DSP_ENHANCE),
6111
6112 /* The followings are vdsp instructions for ck810. */
6113 OP32 ("vdup.8",
6114 OPCODE_INFO2 (0xf8000e80,
6115 (0_3, FREG, OPRND_SHIFT_0_BIT),
6116 (16_19or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT)),
6117 CSKY_ISA_VDSP),
6118 OP32 ("vdup.16",
6119 OPCODE_INFO2 (0xf8100e80,
6120 (0_3, FREG, OPRND_SHIFT_0_BIT),
6121 (16_19or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT)),
6122 CSKY_ISA_VDSP),
6123 OP32 ("vdup.32",
6124 OPCODE_INFO2 (0xfa000e80,
6125 (0_3, FREG, OPRND_SHIFT_0_BIT),
6126 (16_19or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT)),
6127 CSKY_ISA_VDSP),
6128 OP32 ("vmfvr.u8",
6129 OPCODE_INFO2 (0xf8001200,
6130 (0_4, AREG, OPRND_SHIFT_0_BIT),
6131 (16_19or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT)),
6132 CSKY_ISA_VDSP),
6133 OP32 ("vmfvr.u16",
6134 OPCODE_INFO2 (0xf8001220,
6135 (0_4, AREG, OPRND_SHIFT_0_BIT),
6136 (16_19or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT)),
6137 CSKY_ISA_VDSP),
6138 OP32 ("vmfvr.u32",
6139 OPCODE_INFO2 (0xf8001240,
6140 (0_4, AREG, OPRND_SHIFT_0_BIT),
6141 (16_19or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT)),
6142 CSKY_ISA_VDSP),
6143 OP32 ("vmfvr.s8",
6144 OPCODE_INFO2 (0xf8001280,
6145 (0_4, AREG, OPRND_SHIFT_0_BIT),
6146 (16_19or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT)),
6147 CSKY_ISA_VDSP),
6148 OP32 ("vmfvr.s16",
6149 OPCODE_INFO2 (0xf80012a0,
6150 (0_4, AREG, OPRND_SHIFT_0_BIT),
6151 (16_19or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT)),
6152 CSKY_ISA_VDSP),
6153 OP32 ("vmtvr.u8",
6154 OPCODE_INFO2 (0xf8001300,
6155 (0_3or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT),
6156 (16_20, AREG, OPRND_SHIFT_0_BIT)),
6157 CSKY_ISA_VDSP),
6158 OP32 ("vmtvr.u16",
6159 OPCODE_INFO2 (0xf8001320,
6160 (0_3or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT),
6161 (16_20, AREG, OPRND_SHIFT_0_BIT)),
6162 CSKY_ISA_VDSP),
6163 OP32 ("vmtvr.u32",
6164 OPCODE_INFO2 (0xf8001340,
6165 (0_3or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT),
6166 (16_20, AREG, OPRND_SHIFT_0_BIT)),
6167 CSKY_ISA_VDSP),
6168 OP32 ("vldd.8",
6169 SOPCODE_INFO2 (0xf8002000,
6170 (0_3, FREG, OPRND_SHIFT_0_BIT),
6171 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6172 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_3_BIT))),
6173 CSKY_ISA_VDSP),
6174 OP32 ("vldd.16",
6175 SOPCODE_INFO2 (0xf8002100,
6176 (0_3, FREG, OPRND_SHIFT_0_BIT),
6177 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6178 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_3_BIT))),
6179 CSKY_ISA_VDSP),
6180 OP32 ("vldd.32",
6181 SOPCODE_INFO2 (0xf8002200,
6182 (0_3, FREG, OPRND_SHIFT_0_BIT),
6183 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6184 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_3_BIT))),
6185 CSKY_ISA_VDSP),
6186 OP32 ("vldq.8",
6187 SOPCODE_INFO2 (0xf8002400,
6188 (0_3, FREG, OPRND_SHIFT_0_BIT),
6189 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6190 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_4_BIT))),
6191 CSKY_ISA_VDSP),
6192 OP32 ("vldq.16",
6193 SOPCODE_INFO2 (0xf8002500,
6194 (0_3, FREG, OPRND_SHIFT_0_BIT),
6195 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6196 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_4_BIT))),
6197 CSKY_ISA_VDSP),
6198 OP32 ("vldq.32",
6199 SOPCODE_INFO2 (0xf8002600,
6200 (0_3, FREG, OPRND_SHIFT_0_BIT),
6201 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6202 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_4_BIT))),
6203 CSKY_ISA_VDSP),
6204 OP32 ("vstd.8",
6205 SOPCODE_INFO2 (0xf8002800,
6206 (0_3, FREG, OPRND_SHIFT_0_BIT),
6207 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6208 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_3_BIT))),
6209 CSKY_ISA_VDSP),
6210 OP32 ("vstd.16",
6211 SOPCODE_INFO2 (0xf8002900,
6212 (0_3, FREG, OPRND_SHIFT_0_BIT),
6213 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6214 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_3_BIT))),
6215 CSKY_ISA_VDSP),
6216 OP32 ("vstd.32",
6217 SOPCODE_INFO2 (0xf8002a00,
6218 (0_3, FREG, OPRND_SHIFT_0_BIT),
6219 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6220 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_3_BIT))),
6221 CSKY_ISA_VDSP),
6222 OP32 ("vstq.8",
6223 SOPCODE_INFO2 (0xf8002c00,
6224 (0_3, FREG, OPRND_SHIFT_0_BIT),
6225 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6226 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_4_BIT))),
6227 CSKY_ISA_VDSP),
6228 OP32 ("vstq.16",
6229 SOPCODE_INFO2 (0xf8002d00,
6230 (0_3, FREG, OPRND_SHIFT_0_BIT),
6231 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6232 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_4_BIT))),
6233 CSKY_ISA_VDSP),
6234 OP32 ("vstq.32",
6235 SOPCODE_INFO2 (0xf8002e00,
6236 (0_3, FREG, OPRND_SHIFT_0_BIT),
6237 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6238 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_4_BIT))),
6239 CSKY_ISA_VDSP),
6240 OP32 ("vldrd.8",
6241 SOPCODE_INFO2 (0xf8003000,
6242 (0_3, FREG, OPRND_SHIFT_0_BIT),
6243 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6244 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6245 CSKY_ISA_VDSP),
6246 OP32 ("vldrd.16",
6247 SOPCODE_INFO2 (0xf8003100,
6248 (0_3, FREG, OPRND_SHIFT_0_BIT),
6249 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6250 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6251 CSKY_ISA_VDSP),
6252 OP32 ("vldrd.32",
6253 SOPCODE_INFO2 (0xf8003200,
6254 (0_3, FREG, OPRND_SHIFT_0_BIT),
6255 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6256 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6257 CSKY_ISA_VDSP),
6258 OP32 ("vldrq.8",
6259 SOPCODE_INFO2 (0xf8003400,
6260 (0_3, FREG, OPRND_SHIFT_0_BIT),
6261 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6262 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6263 CSKY_ISA_VDSP),
6264 OP32 ("vldrq.16",
6265 SOPCODE_INFO2 (0xf8003500,
6266 (0_3, FREG, OPRND_SHIFT_0_BIT),
6267 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6268 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6269 CSKY_ISA_VDSP),
6270 OP32 ("vldrq.32",
6271 SOPCODE_INFO2 (0xf8003600,
6272 (0_3, FREG, OPRND_SHIFT_0_BIT),
6273 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6274 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6275 CSKY_ISA_VDSP),
6276 OP32 ("vstrd.8",
6277 SOPCODE_INFO2 (0xf8003800,
6278 (0_3, FREG, OPRND_SHIFT_0_BIT),
6279 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6280 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6281 CSKY_ISA_VDSP),
6282 OP32 ("vstrd.16",
6283 SOPCODE_INFO2 (0xf8003900,
6284 (0_3, FREG, OPRND_SHIFT_0_BIT),
6285 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6286 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6287 CSKY_ISA_VDSP),
6288 OP32 ("vstrd.32",
6289 SOPCODE_INFO2 (0xf8003a00,
6290 (0_3, FREG, OPRND_SHIFT_0_BIT),
6291 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6292 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6293 CSKY_ISA_VDSP),
6294 OP32 ("vstrq.8",
6295 SOPCODE_INFO2 (0xf8003c00,
6296 (0_3, FREG, OPRND_SHIFT_0_BIT),
6297 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6298 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6299 CSKY_ISA_VDSP),
6300 OP32 ("vstrq.16",
6301 SOPCODE_INFO2 (0xf8003d00,
6302 (0_3, FREG, OPRND_SHIFT_0_BIT),
6303 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6304 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6305 CSKY_ISA_VDSP),
6306 OP32 ("vstrq.32",
6307 SOPCODE_INFO2 (0xf8003e00,
6308 (0_3, FREG, OPRND_SHIFT_0_BIT),
6309 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6310 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6311 CSKY_ISA_VDSP),
6312 OP32 ("vmov",
6313 OPCODE_INFO2 (0xf8000c00,
6314 (0_3, VREG, OPRND_SHIFT_0_BIT),
6315 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6316 CSKY_ISA_VDSP),
6317 OP32 ("vcadd.eu8",
6318 OPCODE_INFO2 (0xf8000060,
6319 (0_3, VREG, OPRND_SHIFT_0_BIT),
6320 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6321 CSKY_ISA_VDSP),
6322 OP32 ("vcadd.eu16",
6323 OPCODE_INFO2 (0xf8100060,
6324 (0_3, VREG, OPRND_SHIFT_0_BIT),
6325 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6326 CSKY_ISA_VDSP),
6327 OP32 ("vcadd.es8",
6328 OPCODE_INFO2 (0xf8000070,
6329 (0_3, VREG, OPRND_SHIFT_0_BIT),
6330 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6331 CSKY_ISA_VDSP),
6332 OP32 ("vcadd.es16",
6333 OPCODE_INFO2 (0xf8100070,
6334 (0_3, VREG, OPRND_SHIFT_0_BIT),
6335 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6336 CSKY_ISA_VDSP),
6337 OP32 ("vmov.eu8",
6338 OPCODE_INFO2 (0xf8000c20,
6339 (0_3, VREG, OPRND_SHIFT_0_BIT),
6340 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6341 CSKY_ISA_VDSP),
6342 OP32 ("vmov.eu16",
6343 OPCODE_INFO2 (0xf8100c20,
6344 (0_3, VREG, OPRND_SHIFT_0_BIT),
6345 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6346 CSKY_ISA_VDSP),
6347 OP32 ("vmov.es8",
6348 OPCODE_INFO2 (0xf8000c30,
6349 (0_3, VREG, OPRND_SHIFT_0_BIT),
6350 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6351 CSKY_ISA_VDSP),
6352 OP32 ("vmov.es16",
6353 OPCODE_INFO2 (0xf8100c30,
6354 (0_3, VREG, OPRND_SHIFT_0_BIT),
6355 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6356 CSKY_ISA_VDSP),
6357 OP32 ("vmov.u16.l",
6358 OPCODE_INFO2 (0xf8100d00,
6359 (0_3, VREG, OPRND_SHIFT_0_BIT),
6360 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6361 CSKY_ISA_VDSP),
6362 OP32 ("vmov.u32.l",
6363 OPCODE_INFO2 (0xfa000d00,
6364 (0_3, VREG, OPRND_SHIFT_0_BIT),
6365 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6366 CSKY_ISA_VDSP),
6367 OP32 ("vmov.s16.l",
6368 OPCODE_INFO2 (0xf8100d10,
6369 (0_3, VREG, OPRND_SHIFT_0_BIT),
6370 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6371 CSKY_ISA_VDSP),
6372 OP32 ("vmov.s32.l",
6373 OPCODE_INFO2 (0xfa000d10,
6374 (0_3, VREG, OPRND_SHIFT_0_BIT),
6375 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6376 CSKY_ISA_VDSP),
6377 OP32 ("vmov.u16.sl",
6378 OPCODE_INFO2 (0xf8100d40,
6379 (0_3, VREG, OPRND_SHIFT_0_BIT),
6380 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6381 CSKY_ISA_VDSP),
6382 OP32 ("vmov.u32.sl",
6383 OPCODE_INFO2 (0xfa000d40,
6384 (0_3, VREG, OPRND_SHIFT_0_BIT),
6385 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6386 CSKY_ISA_VDSP),
6387 OP32 ("vmov.s16.sl",
6388 OPCODE_INFO2 (0xf8100d50,
6389 (0_3, VREG, OPRND_SHIFT_0_BIT),
6390 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6391 CSKY_ISA_VDSP),
6392 OP32 ("vmov.s32.sl",
6393 OPCODE_INFO2 (0xfa000d50,
6394 (0_3, VREG, OPRND_SHIFT_0_BIT),
6395 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6396 CSKY_ISA_VDSP),
6397 OP32 ("vmov.u16.h",
6398 OPCODE_INFO2 (0xf8100d60,
6399 (0_3, VREG, OPRND_SHIFT_0_BIT),
6400 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6401 CSKY_ISA_VDSP),
6402 OP32 ("vmov.u32.h",
6403 OPCODE_INFO2 (0xfa000d60,
6404 (0_3, VREG, OPRND_SHIFT_0_BIT),
6405 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6406 CSKY_ISA_VDSP),
6407 OP32 ("vmov.s16.h",
6408 OPCODE_INFO2 (0xf8100d70,
6409 (0_3, VREG, OPRND_SHIFT_0_BIT),
6410 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6411 CSKY_ISA_VDSP),
6412 OP32 ("vmov.s32.h",
6413 OPCODE_INFO2 (0xfa000d70,
6414 (0_3, VREG, OPRND_SHIFT_0_BIT),
6415 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6416 CSKY_ISA_VDSP),
6417 OP32 ("vmov.u16.rh",
6418 OPCODE_INFO2 (0xf8100d80,
6419 (0_3, VREG, OPRND_SHIFT_0_BIT),
6420 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6421 CSKY_ISA_VDSP),
6422 OP32 ("vmov.u32.rh",
6423 OPCODE_INFO2 (0xfa000d80,
6424 (0_3, VREG, OPRND_SHIFT_0_BIT),
6425 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6426 CSKY_ISA_VDSP),
6427 OP32 ("vmov.s16.rh",
6428 OPCODE_INFO2 (0xf8100d90,
6429 (0_3, VREG, OPRND_SHIFT_0_BIT),
6430 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6431 CSKY_ISA_VDSP),
6432 OP32 ("vmov.s32.rh",
6433 OPCODE_INFO2 (0xfa000d90,
6434 (0_3, VREG, OPRND_SHIFT_0_BIT),
6435 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6436 CSKY_ISA_VDSP),
6437 OP32 ("vstou.u16.sl",
6438 OPCODE_INFO2 (0xf8100dc0,
6439 (0_3, VREG, OPRND_SHIFT_0_BIT),
6440 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6441 CSKY_ISA_VDSP),
6442 OP32 ("vstou.u32.sl",
6443 OPCODE_INFO2 (0xfa000dc0,
6444 (0_3, VREG, OPRND_SHIFT_0_BIT),
6445 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6446 CSKY_ISA_VDSP),
6447 OP32 ("vstou.s16.sl",
6448 OPCODE_INFO2 (0xf8100dd0,
6449 (0_3, VREG, OPRND_SHIFT_0_BIT),
6450 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6451 CSKY_ISA_VDSP),
6452 OP32 ("vstou.s32.sl",
6453 OPCODE_INFO2 (0xfa000dd0,
6454 (0_3, VREG, OPRND_SHIFT_0_BIT),
6455 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6456 CSKY_ISA_VDSP),
6457 OP32 ("vrev.8",
6458 OPCODE_INFO2 (0xf8000e60,
6459 (0_3, VREG, OPRND_SHIFT_0_BIT),
6460 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6461 CSKY_ISA_VDSP),
6462 OP32 ("vrev.16",
6463 OPCODE_INFO2 (0xf8100e60,
6464 (0_3, VREG, OPRND_SHIFT_0_BIT),
6465 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6466 CSKY_ISA_VDSP),
6467 OP32 ("vrev.32",
6468 OPCODE_INFO2 (0xfa000e60,
6469 (0_3, VREG, OPRND_SHIFT_0_BIT),
6470 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6471 CSKY_ISA_VDSP),
6472 OP32 ("vcnt1.8",
6473 OPCODE_INFO2 (0xf8000ea0,
6474 (0_3, VREG, OPRND_SHIFT_0_BIT),
6475 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6476 CSKY_ISA_VDSP),
6477 OP32 ("vclz.8",
6478 OPCODE_INFO2 (0xf8000ec0,
6479 (0_3, VREG, OPRND_SHIFT_0_BIT),
6480 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6481 CSKY_ISA_VDSP),
6482 OP32 ("vclz.16",
6483 OPCODE_INFO2 (0xf8100ec0,
6484 (0_3, VREG, OPRND_SHIFT_0_BIT),
6485 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6486 CSKY_ISA_VDSP),
6487 OP32 ("vclz.32",
6488 OPCODE_INFO2 (0xfa000ec0,
6489 (0_3, VREG, OPRND_SHIFT_0_BIT),
6490 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6491 CSKY_ISA_VDSP),
6492 OP32 ("vcls.u8",
6493 OPCODE_INFO2 (0xf8000ee0,
6494 (0_3, VREG, OPRND_SHIFT_0_BIT),
6495 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6496 CSKY_ISA_VDSP),
6497 OP32 ("vcls.u16",
6498 OPCODE_INFO2 (0xf8100ee0,
6499 (0_3, VREG, OPRND_SHIFT_0_BIT),
6500 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6501 CSKY_ISA_VDSP),
6502 OP32 ("vcls.u32",
6503 OPCODE_INFO2 (0xfa000ee0,
6504 (0_3, VREG, OPRND_SHIFT_0_BIT),
6505 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6506 CSKY_ISA_VDSP),
6507 OP32 ("vcls.s8",
6508 OPCODE_INFO2 (0xf8000ef0,
6509 (0_3, VREG, OPRND_SHIFT_0_BIT),
6510 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6511 CSKY_ISA_VDSP),
6512 OP32 ("vcls.s16",
6513 OPCODE_INFO2 (0xf8100ef0,
6514 (0_3, VREG, OPRND_SHIFT_0_BIT),
6515 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6516 CSKY_ISA_VDSP),
6517 OP32 ("vcls.s32",
6518 OPCODE_INFO2 (0xfa000ef0,
6519 (0_3, VREG, OPRND_SHIFT_0_BIT),
6520 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6521 CSKY_ISA_VDSP),
6522 OP32 ("vabs.s8",
6523 OPCODE_INFO2 (0xf8001010,
6524 (0_3, VREG, OPRND_SHIFT_0_BIT),
6525 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6526 CSKY_ISA_VDSP),
6527 OP32 ("vabs.s16",
6528 OPCODE_INFO2 (0xf8101010,
6529 (0_3, VREG, OPRND_SHIFT_0_BIT),
6530 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6531 CSKY_ISA_VDSP),
6532 OP32 ("vabs.s32",
6533 OPCODE_INFO2 (0xfa001010,
6534 (0_3, VREG, OPRND_SHIFT_0_BIT),
6535 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6536 CSKY_ISA_VDSP),
6537 OP32 ("vabs.u8.s",
6538 OPCODE_INFO2 (0xf8001040,
6539 (0_3, VREG, OPRND_SHIFT_0_BIT),
6540 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6541 CSKY_ISA_VDSP),
6542 OP32 ("vabs.u16.s",
6543 OPCODE_INFO2 (0xf8101040,
6544 (0_3, VREG, OPRND_SHIFT_0_BIT),
6545 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6546 CSKY_ISA_VDSP),
6547 OP32 ("vabs.u32.s",
6548 OPCODE_INFO2 (0xfa001040,
6549 (0_3, VREG, OPRND_SHIFT_0_BIT),
6550 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6551 CSKY_ISA_VDSP),
6552 OP32 ("vabs.s8.s",
6553 OPCODE_INFO2 (0xf8001050,
6554 (0_3, VREG, OPRND_SHIFT_0_BIT),
6555 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6556 CSKY_ISA_VDSP),
6557 OP32 ("vabs.s16.s",
6558 OPCODE_INFO2 (0xf8101050,
6559 (0_3, VREG, OPRND_SHIFT_0_BIT),
6560 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6561 CSKY_ISA_VDSP),
6562 OP32 ("vabs.s32.s",
6563 OPCODE_INFO2 (0xfa001050,
6564 (0_3, VREG, OPRND_SHIFT_0_BIT),
6565 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6566 CSKY_ISA_VDSP),
6567 OP32 ("vneg.u8",
6568 OPCODE_INFO2 (0xf8001080,
6569 (0_3, VREG, OPRND_SHIFT_0_BIT),
6570 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6571 CSKY_ISA_VDSP),
6572 OP32 ("vneg.u16",
6573 OPCODE_INFO2 (0xf8101080,
6574 (0_3, VREG, OPRND_SHIFT_0_BIT),
6575 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6576 CSKY_ISA_VDSP),
6577 OP32 ("vneg.u32",
6578 OPCODE_INFO2 (0xfa001080,
6579 (0_3, VREG, OPRND_SHIFT_0_BIT),
6580 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6581 CSKY_ISA_VDSP),
6582 OP32 ("vneg.s8",
6583 OPCODE_INFO2 (0xf8001090,
6584 (0_3, VREG, OPRND_SHIFT_0_BIT),
6585 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6586 CSKY_ISA_VDSP),
6587 OP32 ("vneg.s16",
6588 OPCODE_INFO2 (0xf8101090,
6589 (0_3, VREG, OPRND_SHIFT_0_BIT),
6590 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6591 CSKY_ISA_VDSP),
6592 OP32 ("vneg.s32",
6593 OPCODE_INFO2 (0xfa001090,
6594 (0_3, VREG, OPRND_SHIFT_0_BIT),
6595 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6596 CSKY_ISA_VDSP),
6597 OP32 ("vneg.u8.s",
6598 OPCODE_INFO2 (0xf80010c0,
6599 (0_3, VREG, OPRND_SHIFT_0_BIT),
6600 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6601 CSKY_ISA_VDSP),
6602 OP32 ("vneg.u16.s",
6603 OPCODE_INFO2 (0xf81010c0,
6604 (0_3, VREG, OPRND_SHIFT_0_BIT),
6605 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6606 CSKY_ISA_VDSP),
6607 OP32 ("vneg.u32.s",
6608 OPCODE_INFO2 (0xfa0010c0,
6609 (0_3, VREG, OPRND_SHIFT_0_BIT),
6610 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6611 CSKY_ISA_VDSP),
6612 OP32 ("vneg.s8.s",
6613 OPCODE_INFO2 (0xf80010d0,
6614 (0_3, VREG, OPRND_SHIFT_0_BIT),
6615 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6616 CSKY_ISA_VDSP),
6617 OP32 ("vneg.s16.s",
6618 OPCODE_INFO2 (0xf81010d0,
6619 (0_3, VREG, OPRND_SHIFT_0_BIT),
6620 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6621 CSKY_ISA_VDSP),
6622 OP32 ("vneg.s32.s",
6623 OPCODE_INFO2 (0xfa0010d0,
6624 (0_3, VREG, OPRND_SHIFT_0_BIT),
6625 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6626 CSKY_ISA_VDSP),
6627 OP32 ("vcmphsz.u8",
6628 OPCODE_INFO2 (0xf8000880,
6629 (0_3, VREG, OPRND_SHIFT_0_BIT),
6630 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6631 CSKY_ISA_VDSP),
6632 OP32 ("vcmphsz.u16",
6633 OPCODE_INFO2 (0xf8100880,
6634 (0_3, VREG, OPRND_SHIFT_0_BIT),
6635 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6636 CSKY_ISA_VDSP),
6637 OP32 ("vcmphsz.u32",
6638 OPCODE_INFO2 (0xfa000880,
6639 (0_3, VREG, OPRND_SHIFT_0_BIT),
6640 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6641 CSKY_ISA_VDSP),
6642 OP32 ("vcmphsz.s8",
6643 OPCODE_INFO2 (0xf8000890,
6644 (0_3, VREG, OPRND_SHIFT_0_BIT),
6645 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6646 CSKY_ISA_VDSP),
6647 OP32 ("vcmphsz.s16",
6648 OPCODE_INFO2 (0xf8100890,
6649 (0_3, VREG, OPRND_SHIFT_0_BIT),
6650 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6651 CSKY_ISA_VDSP),
6652 OP32 ("vcmphsz.s32",
6653 OPCODE_INFO2 (0xfa000890,
6654 (0_3, VREG, OPRND_SHIFT_0_BIT),
6655 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6656 CSKY_ISA_VDSP),
6657 OP32 ("vcmpltz.u8",
6658 OPCODE_INFO2 (0xf80008a0,
6659 (0_3, VREG, OPRND_SHIFT_0_BIT),
6660 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6661 CSKY_ISA_VDSP),
6662 OP32 ("vcmpltz.u16",
6663 OPCODE_INFO2 (0xf81008a0,
6664 (0_3, VREG, OPRND_SHIFT_0_BIT),
6665 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6666 CSKY_ISA_VDSP),
6667 OP32 ("vcmpltz.u32",
6668 OPCODE_INFO2 (0xfa0008a0,
6669 (0_3, VREG, OPRND_SHIFT_0_BIT),
6670 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6671 CSKY_ISA_VDSP),
6672 OP32 ("vcmpltz.s8",
6673 OPCODE_INFO2 (0xf80008b0,
6674 (0_3, VREG, OPRND_SHIFT_0_BIT),
6675 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6676 CSKY_ISA_VDSP),
6677 OP32 ("vcmpltz.s16",
6678 OPCODE_INFO2 (0xf81008b0,
6679 (0_3, VREG, OPRND_SHIFT_0_BIT),
6680 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6681 CSKY_ISA_VDSP),
6682 OP32 ("vcmpltz.s32",
6683 OPCODE_INFO2 (0xfa0008b0,
6684 (0_3, VREG, OPRND_SHIFT_0_BIT),
6685 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6686 CSKY_ISA_VDSP),
6687 OP32 ("vcmpnez.u8",
6688 OPCODE_INFO2 (0xf80008c0,
6689 (0_3, VREG, OPRND_SHIFT_0_BIT),
6690 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6691 CSKY_ISA_VDSP),
6692 OP32 ("vcmpnez.u16",
6693 OPCODE_INFO2 (0xf81008c0,
6694 (0_3, VREG, OPRND_SHIFT_0_BIT),
6695 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6696 CSKY_ISA_VDSP),
6697 OP32 ("vcmpnez.u32",
6698 OPCODE_INFO2 (0xfa0008c0,
6699 (0_3, VREG, OPRND_SHIFT_0_BIT),
6700 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6701 CSKY_ISA_VDSP),
6702 OP32 ("vcmpnez.s8",
6703 OPCODE_INFO2 (0xf80008d0,
6704 (0_3, VREG, OPRND_SHIFT_0_BIT),
6705 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6706 CSKY_ISA_VDSP),
6707 OP32 ("vcmpnez.s16",
6708 OPCODE_INFO2 (0xf81008d0,
6709 (0_3, VREG, OPRND_SHIFT_0_BIT),
6710 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6711 CSKY_ISA_VDSP),
6712 OP32 ("vcmpnez.s32",
6713 OPCODE_INFO2 (0xfa0008d0,
6714 (0_3, VREG, OPRND_SHIFT_0_BIT),
6715 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6716 CSKY_ISA_VDSP),
6717 OP32 ("vtrch.8",
6718 OPCODE_INFO3 (0xf8000f40,
6719 (0_3, VREG, OPRND_SHIFT_0_BIT),
6720 (16_19, VREG, OPRND_SHIFT_0_BIT),
6721 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6722 CSKY_ISA_VDSP),
6723 OP32 ("vtrch.16",
6724 OPCODE_INFO3 (0xf8100f40,
6725 (0_3, VREG, OPRND_SHIFT_0_BIT),
6726 (16_19, VREG, OPRND_SHIFT_0_BIT),
6727 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6728 CSKY_ISA_VDSP),
6729 OP32 ("vtrch.32",
6730 OPCODE_INFO3 (0xfa000f40,
6731 (0_3, VREG, OPRND_SHIFT_0_BIT),
6732 (16_19, VREG, OPRND_SHIFT_0_BIT),
6733 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6734 CSKY_ISA_VDSP),
6735 OP32 ("vtrcl.8",
6736 OPCODE_INFO3 (0xf8000f60,
6737 (0_3, VREG, OPRND_SHIFT_0_BIT),
6738 (16_19, VREG, OPRND_SHIFT_0_BIT),
6739 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6740 CSKY_ISA_VDSP),
6741 OP32 ("vtrcl.16",
6742 OPCODE_INFO3 (0xf8100f60,
6743 (0_3, VREG, OPRND_SHIFT_0_BIT),
6744 (16_19, VREG, OPRND_SHIFT_0_BIT),
6745 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6746 CSKY_ISA_VDSP),
6747 OP32 ("vtrcl.32",
6748 OPCODE_INFO3 (0xfa000f60,
6749 (0_3, VREG, OPRND_SHIFT_0_BIT),
6750 (16_19, VREG, OPRND_SHIFT_0_BIT),
6751 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6752 CSKY_ISA_VDSP),
6753 OP32 ("vadd.u8",
6754 OPCODE_INFO3 (0xf8000000,
6755 (0_3, VREG, OPRND_SHIFT_0_BIT),
6756 (16_19, VREG, OPRND_SHIFT_0_BIT),
6757 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6758 CSKY_ISA_VDSP),
6759 OP32 ("vadd.u16",
6760 OPCODE_INFO3 (0xf8100000,
6761 (0_3, VREG, OPRND_SHIFT_0_BIT),
6762 (16_19, VREG, OPRND_SHIFT_0_BIT),
6763 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6764 CSKY_ISA_VDSP),
6765 OP32 ("vadd.u32",
6766 OPCODE_INFO3 (0xfa000000,
6767 (0_3, VREG, OPRND_SHIFT_0_BIT),
6768 (16_19, VREG, OPRND_SHIFT_0_BIT),
6769 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6770 CSKY_ISA_VDSP),
6771 OP32 ("vadd.s8",
6772 OPCODE_INFO3 (0xf8000010,
6773 (0_3, VREG, OPRND_SHIFT_0_BIT),
6774 (16_19, VREG, OPRND_SHIFT_0_BIT),
6775 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6776 CSKY_ISA_VDSP),
6777 OP32 ("vadd.s16",
6778 OPCODE_INFO3 (0xf8100010,
6779 (0_3, VREG, OPRND_SHIFT_0_BIT),
6780 (16_19, VREG, OPRND_SHIFT_0_BIT),
6781 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6782 CSKY_ISA_VDSP),
6783 OP32 ("vadd.s32",
6784 OPCODE_INFO3 (0xfa000010,
6785 (0_3, VREG, OPRND_SHIFT_0_BIT),
6786 (16_19, VREG, OPRND_SHIFT_0_BIT),
6787 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6788 CSKY_ISA_VDSP),
6789 OP32 ("vadd.eu8",
6790 OPCODE_INFO3 (0xf8000020,
6791 (0_3, VREG, OPRND_SHIFT_0_BIT),
6792 (16_19, VREG, OPRND_SHIFT_0_BIT),
6793 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6794 CSKY_ISA_VDSP),
6795 OP32 ("vadd.eu16",
6796 OPCODE_INFO3 (0xf8100020,
6797 (0_3, VREG, OPRND_SHIFT_0_BIT),
6798 (16_19, VREG, OPRND_SHIFT_0_BIT),
6799 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6800 CSKY_ISA_VDSP),
6801 OP32 ("vadd.es8",
6802 OPCODE_INFO3 (0xf8000030,
6803 (0_3, VREG, OPRND_SHIFT_0_BIT),
6804 (16_19, VREG, OPRND_SHIFT_0_BIT),
6805 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6806 CSKY_ISA_VDSP),
6807 OP32 ("vadd.es16",
6808 OPCODE_INFO3 (0xf8100030,
6809 (0_3, VREG, OPRND_SHIFT_0_BIT),
6810 (16_19, VREG, OPRND_SHIFT_0_BIT),
6811 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6812 CSKY_ISA_VDSP),
6813 OP32 ("vcadd.u8",
6814 OPCODE_INFO3 (0xf8000040,
6815 (0_3, VREG, OPRND_SHIFT_0_BIT),
6816 (16_19, VREG, OPRND_SHIFT_0_BIT),
6817 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6818 CSKY_ISA_VDSP),
6819 OP32 ("vcadd.u16",
6820 OPCODE_INFO3 (0xf8100040,
6821 (0_3, VREG, OPRND_SHIFT_0_BIT),
6822 (16_19, VREG, OPRND_SHIFT_0_BIT),
6823 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6824 CSKY_ISA_VDSP),
6825 OP32 ("vcadd.u32",
6826 OPCODE_INFO3 (0xfa000040,
6827 (0_3, VREG, OPRND_SHIFT_0_BIT),
6828 (16_19, VREG, OPRND_SHIFT_0_BIT),
6829 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6830 CSKY_ISA_VDSP),
6831 OP32 ("vcadd.s8",
6832 OPCODE_INFO3 (0xf8000050,
6833 (0_3, VREG, OPRND_SHIFT_0_BIT),
6834 (16_19, VREG, OPRND_SHIFT_0_BIT),
6835 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6836 CSKY_ISA_VDSP),
6837 OP32 ("vcadd.s16",
6838 OPCODE_INFO3 (0xf8100050,
6839 (0_3, VREG, OPRND_SHIFT_0_BIT),
6840 (16_19, VREG, OPRND_SHIFT_0_BIT),
6841 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6842 CSKY_ISA_VDSP),
6843 OP32 ("vcadd.s32",
6844 OPCODE_INFO3 (0xfa000050,
6845 (0_3, VREG, OPRND_SHIFT_0_BIT),
6846 (16_19, VREG, OPRND_SHIFT_0_BIT),
6847 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6848 CSKY_ISA_VDSP),
6849 OP32 ("vadd.xu16.sl",
6850 OPCODE_INFO3 (0xf8100140,
6851 (0_3, VREG, OPRND_SHIFT_0_BIT),
6852 (16_19, VREG, OPRND_SHIFT_0_BIT),
6853 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6854 CSKY_ISA_VDSP),
6855 OP32 ("vadd.xu32.sl",
6856 OPCODE_INFO3 (0xfa000140,
6857 (0_3, VREG, OPRND_SHIFT_0_BIT),
6858 (16_19, VREG, OPRND_SHIFT_0_BIT),
6859 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6860 CSKY_ISA_VDSP),
6861 OP32 ("vadd.xs16.sl",
6862 OPCODE_INFO3 (0xf8100150,
6863 (0_3, VREG, OPRND_SHIFT_0_BIT),
6864 (16_19, VREG, OPRND_SHIFT_0_BIT),
6865 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6866 CSKY_ISA_VDSP),
6867 OP32 ("vadd.xs32.sl",
6868 OPCODE_INFO3 (0xfa000150,
6869 (0_3, VREG, OPRND_SHIFT_0_BIT),
6870 (16_19, VREG, OPRND_SHIFT_0_BIT),
6871 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6872 CSKY_ISA_VDSP),
6873 OP32 ("vadd.xu16",
6874 OPCODE_INFO3 (0xf8100160,
6875 (0_3, VREG, OPRND_SHIFT_0_BIT),
6876 (16_19, VREG, OPRND_SHIFT_0_BIT),
6877 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6878 CSKY_ISA_VDSP),
6879 OP32 ("vadd.xu32",
6880 OPCODE_INFO3 (0xfa000160,
6881 (0_3, VREG, OPRND_SHIFT_0_BIT),
6882 (16_19, VREG, OPRND_SHIFT_0_BIT),
6883 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6884 CSKY_ISA_VDSP),
6885 OP32 ("vadd.xs16",
6886 OPCODE_INFO3 (0xf8100170,
6887 (0_3, VREG, OPRND_SHIFT_0_BIT),
6888 (16_19, VREG, OPRND_SHIFT_0_BIT),
6889 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6890 CSKY_ISA_VDSP),
6891 OP32 ("vadd.xs32",
6892 OPCODE_INFO3 (0xfa000170,
6893 (0_3, VREG, OPRND_SHIFT_0_BIT),
6894 (16_19, VREG, OPRND_SHIFT_0_BIT),
6895 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6896 CSKY_ISA_VDSP),
6897 OP32 ("vaddh.u8",
6898 OPCODE_INFO3 (0xf8000180,
6899 (0_3, VREG, OPRND_SHIFT_0_BIT),
6900 (16_19, VREG, OPRND_SHIFT_0_BIT),
6901 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6902 CSKY_ISA_VDSP),
6903 OP32 ("vaddh.u16",
6904 OPCODE_INFO3 (0xf8100180,
6905 (0_3, VREG, OPRND_SHIFT_0_BIT),
6906 (16_19, VREG, OPRND_SHIFT_0_BIT),
6907 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6908 CSKY_ISA_VDSP),
6909 OP32 ("vaddh.u32",
6910 OPCODE_INFO3 (0xfa000180,
6911 (0_3, VREG, OPRND_SHIFT_0_BIT),
6912 (16_19, VREG, OPRND_SHIFT_0_BIT),
6913 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6914 CSKY_ISA_VDSP),
6915 OP32 ("vaddh.s8",
6916 OPCODE_INFO3 (0xf8000190,
6917 (0_3, VREG, OPRND_SHIFT_0_BIT),
6918 (16_19, VREG, OPRND_SHIFT_0_BIT),
6919 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6920 CSKY_ISA_VDSP),
6921 OP32 ("vaddh.s16",
6922 OPCODE_INFO3 (0xf8100190,
6923 (0_3, VREG, OPRND_SHIFT_0_BIT),
6924 (16_19, VREG, OPRND_SHIFT_0_BIT),
6925 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6926 CSKY_ISA_VDSP),
6927 OP32 ("vaddh.s32",
6928 OPCODE_INFO3 (0xfa000190,
6929 (0_3, VREG, OPRND_SHIFT_0_BIT),
6930 (16_19, VREG, OPRND_SHIFT_0_BIT),
6931 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6932 CSKY_ISA_VDSP),
6933 OP32 ("vaddh.u8.r",
6934 OPCODE_INFO3 (0xf80001a0,
6935 (0_3, VREG, OPRND_SHIFT_0_BIT),
6936 (16_19, VREG, OPRND_SHIFT_0_BIT),
6937 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6938 CSKY_ISA_VDSP),
6939 OP32 ("vaddh.u16.r",
6940 OPCODE_INFO3 (0xf81001a0,
6941 (0_3, VREG, OPRND_SHIFT_0_BIT),
6942 (16_19, VREG, OPRND_SHIFT_0_BIT),
6943 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6944 CSKY_ISA_VDSP),
6945 OP32 ("vaddh.u32.r",
6946 OPCODE_INFO3 (0xfa0001a0,
6947 (0_3, VREG, OPRND_SHIFT_0_BIT),
6948 (16_19, VREG, OPRND_SHIFT_0_BIT),
6949 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6950 CSKY_ISA_VDSP),
6951 OP32 ("vaddh.s8.r",
6952 OPCODE_INFO3 (0xf80001b0,
6953 (0_3, VREG, OPRND_SHIFT_0_BIT),
6954 (16_19, VREG, OPRND_SHIFT_0_BIT),
6955 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6956 CSKY_ISA_VDSP),
6957 OP32 ("vaddh.s16.r",
6958 OPCODE_INFO3 (0xf81001b0,
6959 (0_3, VREG, OPRND_SHIFT_0_BIT),
6960 (16_19, VREG, OPRND_SHIFT_0_BIT),
6961 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6962 CSKY_ISA_VDSP),
6963 OP32 ("vaddh.s32.r",
6964 OPCODE_INFO3 (0xfa0001b0,
6965 (0_3, VREG, OPRND_SHIFT_0_BIT),
6966 (16_19, VREG, OPRND_SHIFT_0_BIT),
6967 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6968 CSKY_ISA_VDSP),
6969 OP32 ("vadd.u8.s",
6970 OPCODE_INFO3 (0xf80001c0,
6971 (0_3, VREG, OPRND_SHIFT_0_BIT),
6972 (16_19, VREG, OPRND_SHIFT_0_BIT),
6973 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6974 CSKY_ISA_VDSP),
6975 OP32 ("vadd.u16.s",
6976 OPCODE_INFO3 (0xf81001c0,
6977 (0_3, VREG, OPRND_SHIFT_0_BIT),
6978 (16_19, VREG, OPRND_SHIFT_0_BIT),
6979 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6980 CSKY_ISA_VDSP),
6981 OP32 ("vadd.u32.s",
6982 OPCODE_INFO3 (0xfa0001c0,
6983 (0_3, VREG, OPRND_SHIFT_0_BIT),
6984 (16_19, VREG, OPRND_SHIFT_0_BIT),
6985 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6986 CSKY_ISA_VDSP),
6987 OP32 ("vadd.s8.s",
6988 OPCODE_INFO3 (0xf80001d0,
6989 (0_3, VREG, OPRND_SHIFT_0_BIT),
6990 (16_19, VREG, OPRND_SHIFT_0_BIT),
6991 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6992 CSKY_ISA_VDSP),
6993 OP32 ("vadd.s16.s",
6994 OPCODE_INFO3 (0xf81001d0,
6995 (0_3, VREG, OPRND_SHIFT_0_BIT),
6996 (16_19, VREG, OPRND_SHIFT_0_BIT),
6997 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6998 CSKY_ISA_VDSP),
6999 OP32 ("vadd.s32.s",
7000 OPCODE_INFO3 (0xfa0001d0,
7001 (0_3, VREG, OPRND_SHIFT_0_BIT),
7002 (16_19, VREG, OPRND_SHIFT_0_BIT),
7003 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7004 CSKY_ISA_VDSP),
7005 OP32 ("vsub.u8",
7006 OPCODE_INFO3 (0xf8000200,
7007 (0_3, VREG, OPRND_SHIFT_0_BIT),
7008 (16_19, VREG, OPRND_SHIFT_0_BIT),
7009 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7010 CSKY_ISA_VDSP),
7011 OP32 ("vsub.u16",
7012 OPCODE_INFO3 (0xf8100200,
7013 (0_3, VREG, OPRND_SHIFT_0_BIT),
7014 (16_19, VREG, OPRND_SHIFT_0_BIT),
7015 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7016 CSKY_ISA_VDSP),
7017 OP32 ("vsub.u32",
7018 OPCODE_INFO3 (0xfa000200,
7019 (0_3, VREG, OPRND_SHIFT_0_BIT),
7020 (16_19, VREG, OPRND_SHIFT_0_BIT),
7021 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7022 CSKY_ISA_VDSP),
7023 OP32 ("vsub.s8",
7024 OPCODE_INFO3 (0xf8000210,
7025 (0_3, VREG, OPRND_SHIFT_0_BIT),
7026 (16_19, VREG, OPRND_SHIFT_0_BIT),
7027 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7028 CSKY_ISA_VDSP),
7029 OP32 ("vsub.s16",
7030 OPCODE_INFO3 (0xf8100210,
7031 (0_3, VREG, OPRND_SHIFT_0_BIT),
7032 (16_19, VREG, OPRND_SHIFT_0_BIT),
7033 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7034 CSKY_ISA_VDSP),
7035 OP32 ("vsub.s32",
7036 OPCODE_INFO3 (0xfa000210,
7037 (0_3, VREG, OPRND_SHIFT_0_BIT),
7038 (16_19, VREG, OPRND_SHIFT_0_BIT),
7039 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7040 CSKY_ISA_VDSP),
7041 OP32 ("vsub.eu8",
7042 OPCODE_INFO3 (0xf8000220,
7043 (0_3, VREG, OPRND_SHIFT_0_BIT),
7044 (16_19, VREG, OPRND_SHIFT_0_BIT),
7045 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7046 CSKY_ISA_VDSP),
7047 OP32 ("vsub.eu16",
7048 OPCODE_INFO3 (0xf8100220,
7049 (0_3, VREG, OPRND_SHIFT_0_BIT),
7050 (16_19, VREG, OPRND_SHIFT_0_BIT),
7051 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7052 CSKY_ISA_VDSP),
7053 OP32 ("vsub.eu32",
7054 OPCODE_INFO3 (0xfa000220,
7055 (0_3, VREG, OPRND_SHIFT_0_BIT),
7056 (16_19, VREG, OPRND_SHIFT_0_BIT),
7057 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7058 CSKY_ISA_VDSP),
7059 OP32 ("vsub.es8",
7060 OPCODE_INFO3 (0xf8000230,
7061 (0_3, VREG, OPRND_SHIFT_0_BIT),
7062 (16_19, VREG, OPRND_SHIFT_0_BIT),
7063 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7064 CSKY_ISA_VDSP),
7065 OP32 ("vsub.es16",
7066 OPCODE_INFO3 (0xf8100230,
7067 (0_3, VREG, OPRND_SHIFT_0_BIT),
7068 (16_19, VREG, OPRND_SHIFT_0_BIT),
7069 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7070 CSKY_ISA_VDSP),
7071 OP32 ("vsub.es32",
7072 OPCODE_INFO3 (0xfa000230,
7073 (0_3, VREG, OPRND_SHIFT_0_BIT),
7074 (16_19, VREG, OPRND_SHIFT_0_BIT),
7075 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7076 CSKY_ISA_VDSP),
7077 OP32 ("vsabs.u8",
7078 OPCODE_INFO3 (0xf8000240,
7079 (0_3, VREG, OPRND_SHIFT_0_BIT),
7080 (16_19, VREG, OPRND_SHIFT_0_BIT),
7081 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7082 CSKY_ISA_VDSP),
7083 OP32 ("vsabs.u16",
7084 OPCODE_INFO3 (0xf8100240,
7085 (0_3, VREG, OPRND_SHIFT_0_BIT),
7086 (16_19, VREG, OPRND_SHIFT_0_BIT),
7087 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7088 CSKY_ISA_VDSP),
7089 OP32 ("vsabs.u32",
7090 OPCODE_INFO3 (0xfa000240,
7091 (0_3, VREG, OPRND_SHIFT_0_BIT),
7092 (16_19, VREG, OPRND_SHIFT_0_BIT),
7093 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7094 CSKY_ISA_VDSP),
7095 OP32 ("vsabs.s8",
7096 OPCODE_INFO3 (0xf8000250,
7097 (0_3, VREG, OPRND_SHIFT_0_BIT),
7098 (16_19, VREG, OPRND_SHIFT_0_BIT),
7099 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7100 CSKY_ISA_VDSP),
7101 OP32 ("vsabs.s16",
7102 OPCODE_INFO3 (0xf8100250,
7103 (0_3, VREG, OPRND_SHIFT_0_BIT),
7104 (16_19, VREG, OPRND_SHIFT_0_BIT),
7105 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7106 CSKY_ISA_VDSP),
7107 OP32 ("vsabs.s32",
7108 OPCODE_INFO3 (0xfa000250,
7109 (0_3, VREG, OPRND_SHIFT_0_BIT),
7110 (16_19, VREG, OPRND_SHIFT_0_BIT),
7111 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7112 CSKY_ISA_VDSP),
7113 OP32 ("vsabs.eu8",
7114 OPCODE_INFO3 (0xf8000260,
7115 (0_3, VREG, OPRND_SHIFT_0_BIT),
7116 (16_19, VREG, OPRND_SHIFT_0_BIT),
7117 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7118 CSKY_ISA_VDSP),
7119 OP32 ("vsabs.eu16",
7120 OPCODE_INFO3 (0xf8100260,
7121 (0_3, VREG, OPRND_SHIFT_0_BIT),
7122 (16_19, VREG, OPRND_SHIFT_0_BIT),
7123 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7124 CSKY_ISA_VDSP),
7125 OP32 ("vsabs.es8",
7126 OPCODE_INFO3 (0xf8000270,
7127 (0_3, VREG, OPRND_SHIFT_0_BIT),
7128 (16_19, VREG, OPRND_SHIFT_0_BIT),
7129 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7130 CSKY_ISA_VDSP),
7131 OP32 ("vsabs.es16",
7132 OPCODE_INFO3 (0xf8100270,
7133 (0_3, VREG, OPRND_SHIFT_0_BIT),
7134 (16_19, VREG, OPRND_SHIFT_0_BIT),
7135 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7136 CSKY_ISA_VDSP),
7137 OP32 ("vsabsa.u8",
7138 OPCODE_INFO3 (0xf8000280,
7139 (0_3, VREG, OPRND_SHIFT_0_BIT),
7140 (16_19, VREG, OPRND_SHIFT_0_BIT),
7141 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7142 CSKY_ISA_VDSP),
7143 OP32 ("vsabsa.u16",
7144 OPCODE_INFO3 (0xf8100280,
7145 (0_3, VREG, OPRND_SHIFT_0_BIT),
7146 (16_19, VREG, OPRND_SHIFT_0_BIT),
7147 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7148 CSKY_ISA_VDSP),
7149 OP32 ("vsabsa.u32",
7150 OPCODE_INFO3 (0xfa000280,
7151 (0_3, VREG, OPRND_SHIFT_0_BIT),
7152 (16_19, VREG, OPRND_SHIFT_0_BIT),
7153 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7154 CSKY_ISA_VDSP),
7155 OP32 ("vsabsa.s8",
7156 OPCODE_INFO3 (0xf8000290,
7157 (0_3, VREG, OPRND_SHIFT_0_BIT),
7158 (16_19, VREG, OPRND_SHIFT_0_BIT),
7159 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7160 CSKY_ISA_VDSP),
7161 OP32 ("vsabsa.s16",
7162 OPCODE_INFO3 (0xf8100290,
7163 (0_3, VREG, OPRND_SHIFT_0_BIT),
7164 (16_19, VREG, OPRND_SHIFT_0_BIT),
7165 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7166 CSKY_ISA_VDSP),
7167 OP32 ("vsabsa.s32",
7168 OPCODE_INFO3 (0xfa000290,
7169 (0_3, VREG, OPRND_SHIFT_0_BIT),
7170 (16_19, VREG, OPRND_SHIFT_0_BIT),
7171 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7172 CSKY_ISA_VDSP),
7173 OP32 ("vsabsa.eu8",
7174 OPCODE_INFO3 (0xf80002a0,
7175 (0_3, VREG, OPRND_SHIFT_0_BIT),
7176 (16_19, VREG, OPRND_SHIFT_0_BIT),
7177 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7178 CSKY_ISA_VDSP),
7179 OP32 ("vsabsa.eu16",
7180 OPCODE_INFO3 (0xf81002a0,
7181 (0_3, VREG, OPRND_SHIFT_0_BIT),
7182 (16_19, VREG, OPRND_SHIFT_0_BIT),
7183 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7184 CSKY_ISA_VDSP),
7185 OP32 ("vsabsa.es8",
7186 OPCODE_INFO3 (0xf80002b0,
7187 (0_3, VREG, OPRND_SHIFT_0_BIT),
7188 (16_19, VREG, OPRND_SHIFT_0_BIT),
7189 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7190 CSKY_ISA_VDSP),
7191 OP32 ("vsabsa.es16",
7192 OPCODE_INFO3 (0xf81002b0,
7193 (0_3, VREG, OPRND_SHIFT_0_BIT),
7194 (16_19, VREG, OPRND_SHIFT_0_BIT),
7195 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7196 CSKY_ISA_VDSP),
7197 OP32 ("vsub.xu16",
7198 OPCODE_INFO3 (0xf8100360,
7199 (0_3, VREG, OPRND_SHIFT_0_BIT),
7200 (16_19, VREG, OPRND_SHIFT_0_BIT),
7201 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7202 CSKY_ISA_VDSP),
7203 OP32 ("vsub.xu32",
7204 OPCODE_INFO3 (0xfa000360,
7205 (0_3, VREG, OPRND_SHIFT_0_BIT),
7206 (16_19, VREG, OPRND_SHIFT_0_BIT),
7207 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7208 CSKY_ISA_VDSP),
7209 OP32 ("vsub.xs16",
7210 OPCODE_INFO3 (0xf8100370,
7211 (0_3, VREG, OPRND_SHIFT_0_BIT),
7212 (16_19, VREG, OPRND_SHIFT_0_BIT),
7213 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7214 CSKY_ISA_VDSP),
7215 OP32 ("vsub.xs32",
7216 OPCODE_INFO3 (0xfa000370,
7217 (0_3, VREG, OPRND_SHIFT_0_BIT),
7218 (16_19, VREG, OPRND_SHIFT_0_BIT),
7219 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7220 CSKY_ISA_VDSP),
7221 OP32 ("vsubh.u8",
7222 OPCODE_INFO3 (0xf8000380,
7223 (0_3, VREG, OPRND_SHIFT_0_BIT),
7224 (16_19, VREG, OPRND_SHIFT_0_BIT),
7225 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7226 CSKY_ISA_VDSP),
7227 OP32 ("vsubh.u16",
7228 OPCODE_INFO3 (0xf8100380,
7229 (0_3, VREG, OPRND_SHIFT_0_BIT),
7230 (16_19, VREG, OPRND_SHIFT_0_BIT),
7231 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7232 CSKY_ISA_VDSP),
7233 OP32 ("vsubh.u32",
7234 OPCODE_INFO3 (0xfa000380,
7235 (0_3, VREG, OPRND_SHIFT_0_BIT),
7236 (16_19, VREG, OPRND_SHIFT_0_BIT),
7237 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7238 CSKY_ISA_VDSP),
7239 OP32 ("vsubh.s8",
7240 OPCODE_INFO3 (0xf8000390,
7241 (0_3, VREG, OPRND_SHIFT_0_BIT),
7242 (16_19, VREG, OPRND_SHIFT_0_BIT),
7243 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7244 CSKY_ISA_VDSP),
7245 OP32 ("vsubh.s16",
7246 OPCODE_INFO3 (0xf8100390,
7247 (0_3, VREG, OPRND_SHIFT_0_BIT),
7248 (16_19, VREG, OPRND_SHIFT_0_BIT),
7249 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7250 CSKY_ISA_VDSP),
7251 OP32 ("vsubh.s32",
7252 OPCODE_INFO3 (0xfa000390,
7253 (0_3, VREG, OPRND_SHIFT_0_BIT),
7254 (16_19, VREG, OPRND_SHIFT_0_BIT),
7255 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7256 CSKY_ISA_VDSP),
7257 OP32 ("vsubh.u8.r",
7258 OPCODE_INFO3 (0xf80003a0,
7259 (0_3, VREG, OPRND_SHIFT_0_BIT),
7260 (16_19, VREG, OPRND_SHIFT_0_BIT),
7261 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7262 CSKY_ISA_VDSP),
7263 OP32 ("vsubh.u16.r",
7264 OPCODE_INFO3 (0xf81003a0,
7265 (0_3, VREG, OPRND_SHIFT_0_BIT),
7266 (16_19, VREG, OPRND_SHIFT_0_BIT),
7267 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7268 CSKY_ISA_VDSP),
7269 OP32 ("vsubh.u32.r",
7270 OPCODE_INFO3 (0xfa0003a0,
7271 (0_3, VREG, OPRND_SHIFT_0_BIT),
7272 (16_19, VREG, OPRND_SHIFT_0_BIT),
7273 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7274 CSKY_ISA_VDSP),
7275 OP32 ("vsubh.s8.r",
7276 OPCODE_INFO3 (0xf80003b0,
7277 (0_3, VREG, OPRND_SHIFT_0_BIT),
7278 (16_19, VREG, OPRND_SHIFT_0_BIT),
7279 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7280 CSKY_ISA_VDSP),
7281 OP32 ("vsubh.s16.r",
7282 OPCODE_INFO3 (0xf81003b0,
7283 (0_3, VREG, OPRND_SHIFT_0_BIT),
7284 (16_19, VREG, OPRND_SHIFT_0_BIT),
7285 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7286 CSKY_ISA_VDSP),
7287 OP32 ("vsubh.s32.r",
7288 OPCODE_INFO3 (0xfa0003b0,
7289 (0_3, VREG, OPRND_SHIFT_0_BIT),
7290 (16_19, VREG, OPRND_SHIFT_0_BIT),
7291 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7292 CSKY_ISA_VDSP),
7293 OP32 ("vsub.u8.s",
7294 OPCODE_INFO3 (0xf80003c0,
7295 (0_3, VREG, OPRND_SHIFT_0_BIT),
7296 (16_19, VREG, OPRND_SHIFT_0_BIT),
7297 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7298 CSKY_ISA_VDSP),
7299 OP32 ("vsub.u16.s",
7300 OPCODE_INFO3 (0xf81003c0,
7301 (0_3, VREG, OPRND_SHIFT_0_BIT),
7302 (16_19, VREG, OPRND_SHIFT_0_BIT),
7303 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7304 CSKY_ISA_VDSP),
7305 OP32 ("vsub.u32.s",
7306 OPCODE_INFO3 (0xfa0003c0,
7307 (0_3, VREG, OPRND_SHIFT_0_BIT),
7308 (16_19, VREG, OPRND_SHIFT_0_BIT),
7309 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7310 CSKY_ISA_VDSP),
7311 OP32 ("vsub.s8.s",
7312 OPCODE_INFO3 (0xf80003d0,
7313 (0_3, VREG, OPRND_SHIFT_0_BIT),
7314 (16_19, VREG, OPRND_SHIFT_0_BIT),
7315 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7316 CSKY_ISA_VDSP),
7317 OP32 ("vsub.s16.s",
7318 OPCODE_INFO3 (0xf81003d0,
7319 (0_3, VREG, OPRND_SHIFT_0_BIT),
7320 (16_19, VREG, OPRND_SHIFT_0_BIT),
7321 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7322 CSKY_ISA_VDSP),
7323 OP32 ("vsub.s32.s",
7324 OPCODE_INFO3 (0xfa0003d0,
7325 (0_3, VREG, OPRND_SHIFT_0_BIT),
7326 (16_19, VREG, OPRND_SHIFT_0_BIT),
7327 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7328 CSKY_ISA_VDSP),
7329 OP32 ("vmul.u8",
7330 OPCODE_INFO3 (0xf8000400,
7331 (0_3, VREG, OPRND_SHIFT_0_BIT),
7332 (16_19, VREG, OPRND_SHIFT_0_BIT),
7333 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7334 CSKY_ISA_VDSP),
7335 OP32 ("vmul.u16",
7336 OPCODE_INFO3 (0xf8100400,
7337 (0_3, VREG, OPRND_SHIFT_0_BIT),
7338 (16_19, VREG, OPRND_SHIFT_0_BIT),
7339 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7340 CSKY_ISA_VDSP),
7341 OP32 ("vmul.u32",
7342 OPCODE_INFO3 (0xfa000400,
7343 (0_3, VREG, OPRND_SHIFT_0_BIT),
7344 (16_19, VREG, OPRND_SHIFT_0_BIT),
7345 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7346 CSKY_ISA_VDSP),
7347 OP32 ("vmul.s8",
7348 OPCODE_INFO3 (0xf8000410,
7349 (0_3, VREG, OPRND_SHIFT_0_BIT),
7350 (16_19, VREG, OPRND_SHIFT_0_BIT),
7351 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7352 CSKY_ISA_VDSP),
7353 OP32 ("vmul.s16",
7354 OPCODE_INFO3 (0xf8100410,
7355 (0_3, VREG, OPRND_SHIFT_0_BIT),
7356 (16_19, VREG, OPRND_SHIFT_0_BIT),
7357 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7358 CSKY_ISA_VDSP),
7359 OP32 ("vmul.s32",
7360 OPCODE_INFO3 (0xfa000410,
7361 (0_3, VREG, OPRND_SHIFT_0_BIT),
7362 (16_19, VREG, OPRND_SHIFT_0_BIT),
7363 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7364 CSKY_ISA_VDSP),
7365 OP32 ("vmul.eu8",
7366 OPCODE_INFO3 (0xf8000420,
7367 (0_3, VREG, OPRND_SHIFT_0_BIT),
7368 (16_19, VREG, OPRND_SHIFT_0_BIT),
7369 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7370 CSKY_ISA_VDSP),
7371 OP32 ("vmul.eu16",
7372 OPCODE_INFO3 (0xf8100420,
7373 (0_3, VREG, OPRND_SHIFT_0_BIT),
7374 (16_19, VREG, OPRND_SHIFT_0_BIT),
7375 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7376 CSKY_ISA_VDSP),
7377 OP32 ("vmul.es8",
7378 OPCODE_INFO3 (0xf8000430,
7379 (0_3, VREG, OPRND_SHIFT_0_BIT),
7380 (16_19, VREG, OPRND_SHIFT_0_BIT),
7381 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7382 CSKY_ISA_VDSP),
7383 OP32 ("vmul.es16",
7384 OPCODE_INFO3 (0xf8100430,
7385 (0_3, VREG, OPRND_SHIFT_0_BIT),
7386 (16_19, VREG, OPRND_SHIFT_0_BIT),
7387 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7388 CSKY_ISA_VDSP),
7389 OP32 ("vmula.u8",
7390 OPCODE_INFO3 (0xf8000440,
7391 (0_3, VREG, OPRND_SHIFT_0_BIT),
7392 (16_19, VREG, OPRND_SHIFT_0_BIT),
7393 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7394 CSKY_ISA_VDSP),
7395 OP32 ("vmula.u16",
7396 OPCODE_INFO3 (0xf8100440,
7397 (0_3, VREG, OPRND_SHIFT_0_BIT),
7398 (16_19, VREG, OPRND_SHIFT_0_BIT),
7399 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7400 CSKY_ISA_VDSP),
7401 OP32 ("vmula.u32",
7402 OPCODE_INFO3 (0xfa000440,
7403 (0_3, VREG, OPRND_SHIFT_0_BIT),
7404 (16_19, VREG, OPRND_SHIFT_0_BIT),
7405 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7406 CSKY_ISA_VDSP),
7407 OP32 ("vmula.s8",
7408 OPCODE_INFO3 (0xf8000450,
7409 (0_3, VREG, OPRND_SHIFT_0_BIT),
7410 (16_19, VREG, OPRND_SHIFT_0_BIT),
7411 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7412 CSKY_ISA_VDSP),
7413 OP32 ("vmula.s16",
7414 OPCODE_INFO3 (0xf8100450,
7415 (0_3, VREG, OPRND_SHIFT_0_BIT),
7416 (16_19, VREG, OPRND_SHIFT_0_BIT),
7417 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7418 CSKY_ISA_VDSP),
7419 OP32 ("vmula.s32",
7420 OPCODE_INFO3 (0xfa000450,
7421 (0_3, VREG, OPRND_SHIFT_0_BIT),
7422 (16_19, VREG, OPRND_SHIFT_0_BIT),
7423 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7424 CSKY_ISA_VDSP),
7425 OP32 ("vmula.eu8",
7426 OPCODE_INFO3 (0xf8000460,
7427 (0_3, VREG, OPRND_SHIFT_0_BIT),
7428 (16_19, VREG, OPRND_SHIFT_0_BIT),
7429 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7430 CSKY_ISA_VDSP),
7431 OP32 ("vmula.eu16",
7432 OPCODE_INFO3 (0xf8100460,
7433 (0_3, VREG, OPRND_SHIFT_0_BIT),
7434 (16_19, VREG, OPRND_SHIFT_0_BIT),
7435 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7436 CSKY_ISA_VDSP),
7437 OP32 ("vmula.eu32",
7438 OPCODE_INFO3 (0xfa000460,
7439 (0_3, VREG, OPRND_SHIFT_0_BIT),
7440 (16_19, VREG, OPRND_SHIFT_0_BIT),
7441 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7442 CSKY_ISA_VDSP),
7443 OP32 ("vmula.es8",
7444 OPCODE_INFO3 (0xf8000470,
7445 (0_3, VREG, OPRND_SHIFT_0_BIT),
7446 (16_19, VREG, OPRND_SHIFT_0_BIT),
7447 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7448 CSKY_ISA_VDSP),
7449 OP32 ("vmula.es16",
7450 OPCODE_INFO3 (0xf8100470,
7451 (0_3, VREG, OPRND_SHIFT_0_BIT),
7452 (16_19, VREG, OPRND_SHIFT_0_BIT),
7453 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7454 CSKY_ISA_VDSP),
7455 OP32 ("vmula.es32",
7456 OPCODE_INFO3 (0xfa000470,
7457 (0_3, VREG, OPRND_SHIFT_0_BIT),
7458 (16_19, VREG, OPRND_SHIFT_0_BIT),
7459 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7460 CSKY_ISA_VDSP),
7461 OP32 ("vmuls.u8",
7462 OPCODE_INFO3 (0xf8000480,
7463 (0_3, VREG, OPRND_SHIFT_0_BIT),
7464 (16_19, VREG, OPRND_SHIFT_0_BIT),
7465 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7466 CSKY_ISA_VDSP),
7467 OP32 ("vmuls.u16",
7468 OPCODE_INFO3 (0xf8100480,
7469 (0_3, VREG, OPRND_SHIFT_0_BIT),
7470 (16_19, VREG, OPRND_SHIFT_0_BIT),
7471 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7472 CSKY_ISA_VDSP),
7473 OP32 ("vmuls.u32",
7474 OPCODE_INFO3 (0xfa000480,
7475 (0_3, VREG, OPRND_SHIFT_0_BIT),
7476 (16_19, VREG, OPRND_SHIFT_0_BIT),
7477 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7478 CSKY_ISA_VDSP),
7479 OP32 ("vmuls.s8",
7480 OPCODE_INFO3 (0xf8000490,
7481 (0_3, VREG, OPRND_SHIFT_0_BIT),
7482 (16_19, VREG, OPRND_SHIFT_0_BIT),
7483 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7484 CSKY_ISA_VDSP),
7485 OP32 ("vmuls.s16",
7486 OPCODE_INFO3 (0xf8100490,
7487 (0_3, VREG, OPRND_SHIFT_0_BIT),
7488 (16_19, VREG, OPRND_SHIFT_0_BIT),
7489 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7490 CSKY_ISA_VDSP),
7491 OP32 ("vmuls.s32",
7492 OPCODE_INFO3 (0xfa000490,
7493 (0_3, VREG, OPRND_SHIFT_0_BIT),
7494 (16_19, VREG, OPRND_SHIFT_0_BIT),
7495 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7496 CSKY_ISA_VDSP),
7497 OP32 ("vmuls.eu8",
7498 OPCODE_INFO3 (0xf80004a0,
7499 (0_3, VREG, OPRND_SHIFT_0_BIT),
7500 (16_19, VREG, OPRND_SHIFT_0_BIT),
7501 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7502 CSKY_ISA_VDSP),
7503 OP32 ("vmuls.eu16",
7504 OPCODE_INFO3 (0xf81004a0,
7505 (0_3, VREG, OPRND_SHIFT_0_BIT),
7506 (16_19, VREG, OPRND_SHIFT_0_BIT),
7507 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7508 CSKY_ISA_VDSP),
7509 OP32 ("vmuls.es8",
7510 OPCODE_INFO3 (0xf80004b0,
7511 (0_3, VREG, OPRND_SHIFT_0_BIT),
7512 (16_19, VREG, OPRND_SHIFT_0_BIT),
7513 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7514 CSKY_ISA_VDSP),
7515 OP32 ("vmuls.es16",
7516 OPCODE_INFO3 (0xf81004b0,
7517 (0_3, VREG, OPRND_SHIFT_0_BIT),
7518 (16_19, VREG, OPRND_SHIFT_0_BIT),
7519 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7520 CSKY_ISA_VDSP),
7521 OP32 ("vshr.u8",
7522 OPCODE_INFO3 (0xf8000680,
7523 (0_3, VREG, OPRND_SHIFT_0_BIT),
7524 (16_19, VREG, OPRND_SHIFT_0_BIT),
7525 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7526 CSKY_ISA_VDSP),
7527 OP32 ("vshr.u16",
7528 OPCODE_INFO3 (0xf8100680,
7529 (0_3, VREG, OPRND_SHIFT_0_BIT),
7530 (16_19, VREG, OPRND_SHIFT_0_BIT),
7531 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7532 CSKY_ISA_VDSP),
7533 OP32 ("vshr.u32",
7534 OPCODE_INFO3 (0xfa000680,
7535 (0_3, VREG, OPRND_SHIFT_0_BIT),
7536 (16_19, VREG, OPRND_SHIFT_0_BIT),
7537 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7538 CSKY_ISA_VDSP),
7539 OP32 ("vshr.s8",
7540 OPCODE_INFO3 (0xf8000690,
7541 (0_3, VREG, OPRND_SHIFT_0_BIT),
7542 (16_19, VREG, OPRND_SHIFT_0_BIT),
7543 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7544 CSKY_ISA_VDSP),
7545 OP32 ("vshr.s16",
7546 OPCODE_INFO3 (0xf8100690,
7547 (0_3, VREG, OPRND_SHIFT_0_BIT),
7548 (16_19, VREG, OPRND_SHIFT_0_BIT),
7549 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7550 CSKY_ISA_VDSP),
7551 OP32 ("vshr.s32",
7552 OPCODE_INFO3 (0xfa000690,
7553 (0_3, VREG, OPRND_SHIFT_0_BIT),
7554 (16_19, VREG, OPRND_SHIFT_0_BIT),
7555 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7556 CSKY_ISA_VDSP),
7557 OP32 ("vshr.u8.r",
7558 OPCODE_INFO3 (0xf80006c0,
7559 (0_3, VREG, OPRND_SHIFT_0_BIT),
7560 (16_19, VREG, OPRND_SHIFT_0_BIT),
7561 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7562 CSKY_ISA_VDSP),
7563 OP32 ("vshr.u16.r",
7564 OPCODE_INFO3 (0xf81006c0,
7565 (0_3, VREG, OPRND_SHIFT_0_BIT),
7566 (16_19, VREG, OPRND_SHIFT_0_BIT),
7567 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7568 CSKY_ISA_VDSP),
7569 OP32 ("vshr.u32.r",
7570 OPCODE_INFO3 (0xfa0006c0,
7571 (0_3, VREG, OPRND_SHIFT_0_BIT),
7572 (16_19, VREG, OPRND_SHIFT_0_BIT),
7573 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7574 CSKY_ISA_VDSP),
7575 OP32 ("vshr.s8.r",
7576 OPCODE_INFO3 (0xf80006d0,
7577 (0_3, VREG, OPRND_SHIFT_0_BIT),
7578 (16_19, VREG, OPRND_SHIFT_0_BIT),
7579 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7580 CSKY_ISA_VDSP),
7581 OP32 ("vshr.s16.r",
7582 OPCODE_INFO3 (0xf81006d0,
7583 (0_3, VREG, OPRND_SHIFT_0_BIT),
7584 (16_19, VREG, OPRND_SHIFT_0_BIT),
7585 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7586 CSKY_ISA_VDSP),
7587 OP32 ("vshr.s32.r",
7588 OPCODE_INFO3 (0xfa0006d0,
7589 (0_3, VREG, OPRND_SHIFT_0_BIT),
7590 (16_19, VREG, OPRND_SHIFT_0_BIT),
7591 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7592 CSKY_ISA_VDSP),
7593 OP32 ("vshl.u8",
7594 OPCODE_INFO3 (0xf8000780,
7595 (0_3, VREG, OPRND_SHIFT_0_BIT),
7596 (16_19, VREG, OPRND_SHIFT_0_BIT),
7597 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7598 CSKY_ISA_VDSP),
7599 OP32 ("vshl.u16",
7600 OPCODE_INFO3 (0xf8100780,
7601 (0_3, VREG, OPRND_SHIFT_0_BIT),
7602 (16_19, VREG, OPRND_SHIFT_0_BIT),
7603 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7604 CSKY_ISA_VDSP),
7605 OP32 ("vshl.u32",
7606 OPCODE_INFO3 (0xfa000780,
7607 (0_3, VREG, OPRND_SHIFT_0_BIT),
7608 (16_19, VREG, OPRND_SHIFT_0_BIT),
7609 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7610 CSKY_ISA_VDSP),
7611 OP32 ("vshl.s8",
7612 OPCODE_INFO3 (0xf8000790,
7613 (0_3, VREG, OPRND_SHIFT_0_BIT),
7614 (16_19, VREG, OPRND_SHIFT_0_BIT),
7615 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7616 CSKY_ISA_VDSP),
7617 OP32 ("vshl.s16",
7618 OPCODE_INFO3 (0xf8100790,
7619 (0_3, VREG, OPRND_SHIFT_0_BIT),
7620 (16_19, VREG, OPRND_SHIFT_0_BIT),
7621 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7622 CSKY_ISA_VDSP),
7623 OP32 ("vshl.s32",
7624 OPCODE_INFO3 (0xfa000790,
7625 (0_3, VREG, OPRND_SHIFT_0_BIT),
7626 (16_19, VREG, OPRND_SHIFT_0_BIT),
7627 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7628 CSKY_ISA_VDSP),
7629 OP32 ("vshl.u8.s",
7630 OPCODE_INFO3 (0xf80007c0,
7631 (0_3, VREG, OPRND_SHIFT_0_BIT),
7632 (16_19, VREG, OPRND_SHIFT_0_BIT),
7633 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7634 CSKY_ISA_VDSP),
7635 OP32 ("vshl.u16.s",
7636 OPCODE_INFO3 (0xf81007c0,
7637 (0_3, VREG, OPRND_SHIFT_0_BIT),
7638 (16_19, VREG, OPRND_SHIFT_0_BIT),
7639 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7640 CSKY_ISA_VDSP),
7641 OP32 ("vshl.u32.s",
7642 OPCODE_INFO3 (0xfa0007c0,
7643 (0_3, VREG, OPRND_SHIFT_0_BIT),
7644 (16_19, VREG, OPRND_SHIFT_0_BIT),
7645 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7646 CSKY_ISA_VDSP),
7647 OP32 ("vshl.s8.s",
7648 OPCODE_INFO3 (0xf80007d0,
7649 (0_3, VREG, OPRND_SHIFT_0_BIT),
7650 (16_19, VREG, OPRND_SHIFT_0_BIT),
7651 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7652 CSKY_ISA_VDSP),
7653 OP32 ("vshl.s16.s",
7654 OPCODE_INFO3 (0xf81007d0,
7655 (0_3, VREG, OPRND_SHIFT_0_BIT),
7656 (16_19, VREG, OPRND_SHIFT_0_BIT),
7657 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7658 CSKY_ISA_VDSP),
7659 OP32 ("vshl.s32.s",
7660 OPCODE_INFO3 (0xfa0007d0,
7661 (0_3, VREG, OPRND_SHIFT_0_BIT),
7662 (16_19, VREG, OPRND_SHIFT_0_BIT),
7663 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7664 CSKY_ISA_VDSP),
7665 OP32 ("vcmphs.u8",
7666 OPCODE_INFO3 (0xf8000800,
7667 (0_3, VREG, OPRND_SHIFT_0_BIT),
7668 (16_19, VREG, OPRND_SHIFT_0_BIT),
7669 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7670 CSKY_ISA_VDSP),
7671 OP32 ("vcmphs.u16",
7672 OPCODE_INFO3 (0xf8100800,
7673 (0_3, VREG, OPRND_SHIFT_0_BIT),
7674 (16_19, VREG, OPRND_SHIFT_0_BIT),
7675 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7676 CSKY_ISA_VDSP),
7677 OP32 ("vcmphs.u32",
7678 OPCODE_INFO3 (0xfa000800,
7679 (0_3, VREG, OPRND_SHIFT_0_BIT),
7680 (16_19, VREG, OPRND_SHIFT_0_BIT),
7681 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7682 CSKY_ISA_VDSP),
7683 OP32 ("vcmphs.s8",
7684 OPCODE_INFO3 (0xf8000810,
7685 (0_3, VREG, OPRND_SHIFT_0_BIT),
7686 (16_19, VREG, OPRND_SHIFT_0_BIT),
7687 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7688 CSKY_ISA_VDSP),
7689 OP32 ("vcmphs.s16",
7690 OPCODE_INFO3 (0xf8100810,
7691 (0_3, VREG, OPRND_SHIFT_0_BIT),
7692 (16_19, VREG, OPRND_SHIFT_0_BIT),
7693 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7694 CSKY_ISA_VDSP),
7695 OP32 ("vcmphs.s32",
7696 OPCODE_INFO3 (0xfa000810,
7697 (0_3, VREG, OPRND_SHIFT_0_BIT),
7698 (16_19, VREG, OPRND_SHIFT_0_BIT),
7699 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7700 CSKY_ISA_VDSP),
7701 OP32 ("vcmplt.u8",
7702 OPCODE_INFO3 (0xf8000820,
7703 (0_3, VREG, OPRND_SHIFT_0_BIT),
7704 (16_19, VREG, OPRND_SHIFT_0_BIT),
7705 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7706 CSKY_ISA_VDSP),
7707 OP32 ("vcmplt.u16",
7708 OPCODE_INFO3 (0xf8100820,
7709 (0_3, VREG, OPRND_SHIFT_0_BIT),
7710 (16_19, VREG, OPRND_SHIFT_0_BIT),
7711 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7712 CSKY_ISA_VDSP),
7713 OP32 ("vcmplt.u32",
7714 OPCODE_INFO3 (0xfa000820,
7715 (0_3, VREG, OPRND_SHIFT_0_BIT),
7716 (16_19, VREG, OPRND_SHIFT_0_BIT),
7717 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7718 CSKY_ISA_VDSP),
7719 OP32 ("vcmplt.s8",
7720 OPCODE_INFO3 (0xf8000830,
7721 (0_3, VREG, OPRND_SHIFT_0_BIT),
7722 (16_19, VREG, OPRND_SHIFT_0_BIT),
7723 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7724 CSKY_ISA_VDSP),
7725 OP32 ("vcmplt.s16",
7726 OPCODE_INFO3 (0xf8100830,
7727 (0_3, VREG, OPRND_SHIFT_0_BIT),
7728 (16_19, VREG, OPRND_SHIFT_0_BIT),
7729 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7730 CSKY_ISA_VDSP),
7731 OP32 ("vcmplt.s32",
7732 OPCODE_INFO3 (0xfa000830,
7733 (0_3, VREG, OPRND_SHIFT_0_BIT),
7734 (16_19, VREG, OPRND_SHIFT_0_BIT),
7735 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7736 CSKY_ISA_VDSP),
7737 OP32 ("vcmpne.u8",
7738 OPCODE_INFO3 (0xf8000840,
7739 (0_3, VREG, OPRND_SHIFT_0_BIT),
7740 (16_19, VREG, OPRND_SHIFT_0_BIT),
7741 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7742 CSKY_ISA_VDSP),
7743 OP32 ("vcmpne.u16",
7744 OPCODE_INFO3 (0xf8100840,
7745 (0_3, VREG, OPRND_SHIFT_0_BIT),
7746 (16_19, VREG, OPRND_SHIFT_0_BIT),
7747 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7748 CSKY_ISA_VDSP),
7749 OP32 ("vcmpne.u32",
7750 OPCODE_INFO3 (0xfa000840,
7751 (0_3, VREG, OPRND_SHIFT_0_BIT),
7752 (16_19, VREG, OPRND_SHIFT_0_BIT),
7753 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7754 CSKY_ISA_VDSP),
7755 OP32 ("vcmpne.s8",
7756 OPCODE_INFO3 (0xf8000850,
7757 (0_3, VREG, OPRND_SHIFT_0_BIT),
7758 (16_19, VREG, OPRND_SHIFT_0_BIT),
7759 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7760 CSKY_ISA_VDSP),
7761 OP32 ("vcmpne.s16",
7762 OPCODE_INFO3 (0xf8100850,
7763 (0_3, VREG, OPRND_SHIFT_0_BIT),
7764 (16_19, VREG, OPRND_SHIFT_0_BIT),
7765 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7766 CSKY_ISA_VDSP),
7767 OP32 ("vcmpne.s32",
7768 OPCODE_INFO3 (0xfa000850,
7769 (0_3, VREG, OPRND_SHIFT_0_BIT),
7770 (16_19, VREG, OPRND_SHIFT_0_BIT),
7771 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7772 CSKY_ISA_VDSP),
7773 OP32 ("vmax.u8",
7774 OPCODE_INFO3 (0xf8000900,
7775 (0_3, VREG, OPRND_SHIFT_0_BIT),
7776 (16_19, VREG, OPRND_SHIFT_0_BIT),
7777 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7778 CSKY_ISA_VDSP),
7779 OP32 ("vmax.u16",
7780 OPCODE_INFO3 (0xf8100900,
7781 (0_3, VREG, OPRND_SHIFT_0_BIT),
7782 (16_19, VREG, OPRND_SHIFT_0_BIT),
7783 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7784 CSKY_ISA_VDSP),
7785 OP32 ("vmax.u32",
7786 OPCODE_INFO3 (0xfa000900,
7787 (0_3, VREG, OPRND_SHIFT_0_BIT),
7788 (16_19, VREG, OPRND_SHIFT_0_BIT),
7789 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7790 CSKY_ISA_VDSP),
7791 OP32 ("vmax.s8",
7792 OPCODE_INFO3 (0xf8000910,
7793 (0_3, VREG, OPRND_SHIFT_0_BIT),
7794 (16_19, VREG, OPRND_SHIFT_0_BIT),
7795 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7796 CSKY_ISA_VDSP),
7797 OP32 ("vmax.s16",
7798 OPCODE_INFO3 (0xf8100910,
7799 (0_3, VREG, OPRND_SHIFT_0_BIT),
7800 (16_19, VREG, OPRND_SHIFT_0_BIT),
7801 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7802 CSKY_ISA_VDSP),
7803 OP32 ("vmax.s32",
7804 OPCODE_INFO3 (0xfa000910,
7805 (0_3, VREG, OPRND_SHIFT_0_BIT),
7806 (16_19, VREG, OPRND_SHIFT_0_BIT),
7807 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7808 CSKY_ISA_VDSP),
7809 OP32 ("vmin.u8",
7810 OPCODE_INFO3 (0xf8000920,
7811 (0_3, VREG, OPRND_SHIFT_0_BIT),
7812 (16_19, VREG, OPRND_SHIFT_0_BIT),
7813 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7814 CSKY_ISA_VDSP),
7815 OP32 ("vmin.u16",
7816 OPCODE_INFO3 (0xf8100920,
7817 (0_3, VREG, OPRND_SHIFT_0_BIT),
7818 (16_19, VREG, OPRND_SHIFT_0_BIT),
7819 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7820 CSKY_ISA_VDSP),
7821 OP32 ("vmin.u32",
7822 OPCODE_INFO3 (0xfa000920,
7823 (0_3, VREG, OPRND_SHIFT_0_BIT),
7824 (16_19, VREG, OPRND_SHIFT_0_BIT),
7825 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7826 CSKY_ISA_VDSP),
7827 OP32 ("vmin.s8",
7828 OPCODE_INFO3 (0xf8000930,
7829 (0_3, VREG, OPRND_SHIFT_0_BIT),
7830 (16_19, VREG, OPRND_SHIFT_0_BIT),
7831 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7832 CSKY_ISA_VDSP),
7833 OP32 ("vmin.s16",
7834 OPCODE_INFO3 (0xf8100930,
7835 (0_3, VREG, OPRND_SHIFT_0_BIT),
7836 (16_19, VREG, OPRND_SHIFT_0_BIT),
7837 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7838 CSKY_ISA_VDSP),
7839 OP32 ("vmin.s32",
7840 OPCODE_INFO3 (0xfa000930,
7841 (0_3, VREG, OPRND_SHIFT_0_BIT),
7842 (16_19, VREG, OPRND_SHIFT_0_BIT),
7843 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7844 CSKY_ISA_VDSP),
7845 OP32 ("vcmax.u8",
7846 OPCODE_INFO3 (0xf8000980,
7847 (0_3, VREG, OPRND_SHIFT_0_BIT),
7848 (16_19, VREG, OPRND_SHIFT_0_BIT),
7849 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7850 CSKY_ISA_VDSP),
7851 OP32 ("vcmax.u16",
7852 OPCODE_INFO3 (0xf8100980,
7853 (0_3, VREG, OPRND_SHIFT_0_BIT),
7854 (16_19, VREG, OPRND_SHIFT_0_BIT),
7855 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7856 CSKY_ISA_VDSP),
7857 OP32 ("vcmax.u32",
7858 OPCODE_INFO3 (0xfa000980,
7859 (0_3, VREG, OPRND_SHIFT_0_BIT),
7860 (16_19, VREG, OPRND_SHIFT_0_BIT),
7861 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7862 CSKY_ISA_VDSP),
7863 OP32 ("vcmax.s8",
7864 OPCODE_INFO3 (0xf8000990,
7865 (0_3, VREG, OPRND_SHIFT_0_BIT),
7866 (16_19, VREG, OPRND_SHIFT_0_BIT),
7867 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7868 CSKY_ISA_VDSP),
7869 OP32 ("vcmax.s16",
7870 OPCODE_INFO3 (0xf8100990,
7871 (0_3, VREG, OPRND_SHIFT_0_BIT),
7872 (16_19, VREG, OPRND_SHIFT_0_BIT),
7873 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7874 CSKY_ISA_VDSP),
7875 OP32 ("vcmax.s32",
7876 OPCODE_INFO3 (0xfa000990,
7877 (0_3, VREG, OPRND_SHIFT_0_BIT),
7878 (16_19, VREG, OPRND_SHIFT_0_BIT),
7879 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7880 CSKY_ISA_VDSP),
7881 OP32 ("vcmin.u8",
7882 OPCODE_INFO3 (0xf80009a0,
7883 (0_3, VREG, OPRND_SHIFT_0_BIT),
7884 (16_19, VREG, OPRND_SHIFT_0_BIT),
7885 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7886 CSKY_ISA_VDSP),
7887 OP32 ("vcmin.u16",
7888 OPCODE_INFO3 (0xf81009a0,
7889 (0_3, VREG, OPRND_SHIFT_0_BIT),
7890 (16_19, VREG, OPRND_SHIFT_0_BIT),
7891 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7892 CSKY_ISA_VDSP),
7893 OP32 ("vcmin.u32",
7894 OPCODE_INFO3 (0xfa0009a0,
7895 (0_3, VREG, OPRND_SHIFT_0_BIT),
7896 (16_19, VREG, OPRND_SHIFT_0_BIT),
7897 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7898 CSKY_ISA_VDSP),
7899 OP32 ("vcmin.s8",
7900 OPCODE_INFO3 (0xf80009b0,
7901 (0_3, VREG, OPRND_SHIFT_0_BIT),
7902 (16_19, VREG, OPRND_SHIFT_0_BIT),
7903 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7904 CSKY_ISA_VDSP),
7905 OP32 ("vcmin.s16",
7906 OPCODE_INFO3 (0xf81009b0,
7907 (0_3, VREG, OPRND_SHIFT_0_BIT),
7908 (16_19, VREG, OPRND_SHIFT_0_BIT),
7909 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7910 CSKY_ISA_VDSP),
7911 OP32 ("vcmin.s32",
7912 OPCODE_INFO3 (0xfa0009b0,
7913 (0_3, VREG, OPRND_SHIFT_0_BIT),
7914 (16_19, VREG, OPRND_SHIFT_0_BIT),
7915 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7916 CSKY_ISA_VDSP),
7917 OP32 ("vand.8",
7918 OPCODE_INFO3 (0xf8000a00,
7919 (0_3, VREG, OPRND_SHIFT_0_BIT),
7920 (16_19, VREG, OPRND_SHIFT_0_BIT),
7921 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7922 CSKY_ISA_VDSP),
7923 OP32 ("vand.16",
7924 OPCODE_INFO3 (0xf8100a00,
7925 (0_3, VREG, OPRND_SHIFT_0_BIT),
7926 (16_19, VREG, OPRND_SHIFT_0_BIT),
7927 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7928 CSKY_ISA_VDSP),
7929 OP32 ("vand.32",
7930 OPCODE_INFO3 (0xfa000a00,
7931 (0_3, VREG, OPRND_SHIFT_0_BIT),
7932 (16_19, VREG, OPRND_SHIFT_0_BIT),
7933 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7934 CSKY_ISA_VDSP),
7935 OP32 ("vandn.8",
7936 OPCODE_INFO3 (0xf8000a20,
7937 (0_3, VREG, OPRND_SHIFT_0_BIT),
7938 (16_19, VREG, OPRND_SHIFT_0_BIT),
7939 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7940 CSKY_ISA_VDSP),
7941 OP32 ("vandn.16",
7942 OPCODE_INFO3 (0xf8100a20,
7943 (0_3, VREG, OPRND_SHIFT_0_BIT),
7944 (16_19, VREG, OPRND_SHIFT_0_BIT),
7945 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7946 CSKY_ISA_VDSP),
7947 OP32 ("vandn.32",
7948 OPCODE_INFO3 (0xfa000a20,
7949 (0_3, VREG, OPRND_SHIFT_0_BIT),
7950 (16_19, VREG, OPRND_SHIFT_0_BIT),
7951 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7952 CSKY_ISA_VDSP),
7953 OP32 ("vor.8",
7954 OPCODE_INFO3 (0xf8000a40,
7955 (0_3, VREG, OPRND_SHIFT_0_BIT),
7956 (16_19, VREG, OPRND_SHIFT_0_BIT),
7957 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7958 CSKY_ISA_VDSP),
7959 OP32 ("vor.16",
7960 OPCODE_INFO3 (0xf8100a40,
7961 (0_3, VREG, OPRND_SHIFT_0_BIT),
7962 (16_19, VREG, OPRND_SHIFT_0_BIT),
7963 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7964 CSKY_ISA_VDSP),
7965 OP32 ("vor.32",
7966 OPCODE_INFO3 (0xfa000a40,
7967 (0_3, VREG, OPRND_SHIFT_0_BIT),
7968 (16_19, VREG, OPRND_SHIFT_0_BIT),
7969 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7970 CSKY_ISA_VDSP),
7971 OP32 ("vnor.8",
7972 OPCODE_INFO3 (0xf8000a60,
7973 (0_3, VREG, OPRND_SHIFT_0_BIT),
7974 (16_19, VREG, OPRND_SHIFT_0_BIT),
7975 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7976 CSKY_ISA_VDSP),
7977 OP32 ("vnor.16",
7978 OPCODE_INFO3 (0xf8100a60,
7979 (0_3, VREG, OPRND_SHIFT_0_BIT),
7980 (16_19, VREG, OPRND_SHIFT_0_BIT),
7981 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7982 CSKY_ISA_VDSP),
7983 OP32 ("vnor.32",
7984 OPCODE_INFO3 (0xfa000a60,
7985 (0_3, VREG, OPRND_SHIFT_0_BIT),
7986 (16_19, VREG, OPRND_SHIFT_0_BIT),
7987 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7988 CSKY_ISA_VDSP),
7989 OP32 ("vxor.8",
7990 OPCODE_INFO3 (0xf8000a80,
7991 (0_3, VREG, OPRND_SHIFT_0_BIT),
7992 (16_19, VREG, OPRND_SHIFT_0_BIT),
7993 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7994 CSKY_ISA_VDSP),
7995 OP32 ("vxor.16",
7996 OPCODE_INFO3 (0xf8100a80,
7997 (0_3, VREG, OPRND_SHIFT_0_BIT),
7998 (16_19, VREG, OPRND_SHIFT_0_BIT),
7999 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8000 CSKY_ISA_VDSP),
8001 OP32 ("vxor.32",
8002 OPCODE_INFO3 (0xfa000a80,
8003 (0_3, VREG, OPRND_SHIFT_0_BIT),
8004 (16_19, VREG, OPRND_SHIFT_0_BIT),
8005 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8006 CSKY_ISA_VDSP),
8007 OP32 ("vtst.8",
8008 OPCODE_INFO3 (0xf8000b20,
8009 (0_3, VREG, OPRND_SHIFT_0_BIT),
8010 (16_19, VREG, OPRND_SHIFT_0_BIT),
8011 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8012 CSKY_ISA_VDSP),
8013 OP32 ("vtst.16",
8014 OPCODE_INFO3 (0xf8100b20,
8015 (0_3, VREG, OPRND_SHIFT_0_BIT),
8016 (16_19, VREG, OPRND_SHIFT_0_BIT),
8017 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8018 CSKY_ISA_VDSP),
8019 OP32 ("vtst.32",
8020 OPCODE_INFO3 (0xfa000b20,
8021 (0_3, VREG, OPRND_SHIFT_0_BIT),
8022 (16_19, VREG, OPRND_SHIFT_0_BIT),
8023 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8024 CSKY_ISA_VDSP),
8025 OP32 ("vbpermz.8",
8026 OPCODE_INFO3 (0xf8000f00,
8027 (0_3, VREG, OPRND_SHIFT_0_BIT),
8028 (16_19, VREG, OPRND_SHIFT_0_BIT),
8029 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8030 CSKY_ISA_VDSP),
8031 OP32 ("vbpermz.16",
8032 OPCODE_INFO3 (0xf8100f00,
8033 (0_3, VREG, OPRND_SHIFT_0_BIT),
8034 (16_19, VREG, OPRND_SHIFT_0_BIT),
8035 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8036 CSKY_ISA_VDSP),
8037 OP32 ("vbpermz.32",
8038 OPCODE_INFO3 (0xfa000f00,
8039 (0_3, VREG, OPRND_SHIFT_0_BIT),
8040 (16_19, VREG, OPRND_SHIFT_0_BIT),
8041 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8042 CSKY_ISA_VDSP),
8043 OP32 ("vbperm.8",
8044 OPCODE_INFO3 (0xf8000f20,
8045 (0_3, VREG, OPRND_SHIFT_0_BIT),
8046 (16_19, VREG, OPRND_SHIFT_0_BIT),
8047 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8048 CSKY_ISA_VDSP),
8049 OP32 ("vbperm.16",
8050 OPCODE_INFO3 (0xf8100f20,
8051 (0_3, VREG, OPRND_SHIFT_0_BIT),
8052 (16_19, VREG, OPRND_SHIFT_0_BIT),
8053 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8054 CSKY_ISA_VDSP),
8055 OP32 ("vbperm.32",
8056 OPCODE_INFO3 (0xfa000f20,
8057 (0_3, VREG, OPRND_SHIFT_0_BIT),
8058 (16_19, VREG, OPRND_SHIFT_0_BIT),
8059 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8060 CSKY_ISA_VDSP),
8061 OP32 ("vdch.8",
8062 OPCODE_INFO3 (0xf8000fc0,
8063 (0_3, VREG, OPRND_SHIFT_0_BIT),
8064 (16_19, VREG, OPRND_SHIFT_0_BIT),
8065 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8066 CSKY_ISA_VDSP),
8067 OP32 ("vdch.16",
8068 OPCODE_INFO3 (0xf8100fc0,
8069 (0_3, VREG, OPRND_SHIFT_0_BIT),
8070 (16_19, VREG, OPRND_SHIFT_0_BIT),
8071 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8072 CSKY_ISA_VDSP),
8073 OP32 ("vdch.32",
8074 OPCODE_INFO3 (0xfa000fc0,
8075 (0_3, VREG, OPRND_SHIFT_0_BIT),
8076 (16_19, VREG, OPRND_SHIFT_0_BIT),
8077 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8078 CSKY_ISA_VDSP),
8079 OP32 ("vdcl.8",
8080 OPCODE_INFO3 (0xf8000fe0,
8081 (0_3, VREG, OPRND_SHIFT_0_BIT),
8082 (16_19, VREG, OPRND_SHIFT_0_BIT),
8083 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8084 CSKY_ISA_VDSP),
8085 OP32 ("vdcl.16",
8086 OPCODE_INFO3 (0xf8100fe0,
8087 (0_3, VREG, OPRND_SHIFT_0_BIT),
8088 (16_19, VREG, OPRND_SHIFT_0_BIT),
8089 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8090 CSKY_ISA_VDSP),
8091 OP32 ("vdcl.32",
8092 OPCODE_INFO3 (0xfa000fe0,
8093 (0_3, VREG, OPRND_SHIFT_0_BIT),
8094 (16_19, VREG, OPRND_SHIFT_0_BIT),
8095 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8096 CSKY_ISA_VDSP),
8097 OP32 ("vich.8",
8098 OPCODE_INFO3 (0xf8000f80,
8099 (0_3, VREG, OPRND_SHIFT_0_BIT),
8100 (16_19, VREG, OPRND_SHIFT_0_BIT),
8101 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8102 CSKY_ISA_VDSP),
8103 OP32 ("vich.16",
8104 OPCODE_INFO3 (0xf8100f80,
8105 (0_3, VREG, OPRND_SHIFT_0_BIT),
8106 (16_19, VREG, OPRND_SHIFT_0_BIT),
8107 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8108 CSKY_ISA_VDSP),
8109 OP32 ("vich.32",
8110 OPCODE_INFO3 (0xfa000f80,
8111 (0_3, VREG, OPRND_SHIFT_0_BIT),
8112 (16_19, VREG, OPRND_SHIFT_0_BIT),
8113 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8114 CSKY_ISA_VDSP),
8115 OP32 ("vicl.8",
8116 OPCODE_INFO3 (0xf8000fa0,
8117 (0_3, VREG, OPRND_SHIFT_0_BIT),
8118 (16_19, VREG, OPRND_SHIFT_0_BIT),
8119 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8120 CSKY_ISA_VDSP),
8121 OP32 ("vicl.16",
8122 OPCODE_INFO3 (0xf8100fa0,
8123 (0_3, VREG, OPRND_SHIFT_0_BIT),
8124 (16_19, VREG, OPRND_SHIFT_0_BIT),
8125 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8126 CSKY_ISA_VDSP),
8127 OP32 ("vicl.32",
8128 OPCODE_INFO3 (0xfa000fa0,
8129 (0_3, VREG, OPRND_SHIFT_0_BIT),
8130 (16_19, VREG, OPRND_SHIFT_0_BIT),
8131 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8132 CSKY_ISA_VDSP),
8133
8134 #define OPRND_SHIFT0(mask, type) (mask, type, OPRND_SHIFT_0_BIT)
8135 #define OPRND_SHIFT1(mask, type) (mask, type, OPRND_SHIFT_1_BIT)
8136 #define OPRND_SHIFT2(mask, type) (mask, type, OPRND_SHIFT_2_BIT)
8137 #define OPRND_SHIFT3(mask, type) (mask, type, OPRND_SHIFT_3_BIT)
8138 #define OPRND_SHIFT4(mask, type) (mask, type, OPRND_SHIFT_4_BIT)
8139
8140 /* The followings are 860 floating instructions. */
8141 OP32 ("fadd.16",
8142 OPCODE_INFO3 (0xf400c800,
8143 OPRND_SHIFT0 (0_4, FREG),
8144 OPRND_SHIFT0 (16_20, FREG),
8145 OPRND_SHIFT0 (21_25, FREG)),
8146 CSKY_ISA_FLOAT_7E60),
8147 OP32 ("faddh",
8148 OPCODE_INFO3 (0xf400c800,
8149 OPRND_SHIFT0 (0_4, FREG),
8150 OPRND_SHIFT0 (16_20, FREG),
8151 OPRND_SHIFT0 (21_25, FREG)),
8152 CSKY_ISA_FLOAT_7E60),
8153 OP32 ("fsub.16",
8154 OPCODE_INFO3 (0xf400c820,
8155 OPRND_SHIFT0 (0_4, FREG),
8156 OPRND_SHIFT0 (16_20, FREG),
8157 OPRND_SHIFT0 (21_25, FREG)),
8158 CSKY_ISA_FLOAT_7E60),
8159 OP32 ("fsubh",
8160 OPCODE_INFO3 (0xf400c820,
8161 OPRND_SHIFT0 (0_4, FREG),
8162 OPRND_SHIFT0 (16_20, FREG),
8163 OPRND_SHIFT0 (21_25, FREG)),
8164 CSKY_ISA_FLOAT_7E60),
8165 OP32 ("fmov.16",
8166 OPCODE_INFO2 (0xf400c880,
8167 OPRND_SHIFT0 (0_4, FREG),
8168 OPRND_SHIFT0 (16_20, FREG)),
8169 CSKY_ISA_FLOAT_7E60),
8170 OP32 ("fmovh",
8171 OPCODE_INFO2 (0xf400c880,
8172 OPRND_SHIFT0 (0_4, FREG),
8173 OPRND_SHIFT0 (16_20, FREG)),
8174 CSKY_ISA_FLOAT_7E60),
8175 OP32 ("fabs.16",
8176 OPCODE_INFO2 (0xf400c8c0,
8177 OPRND_SHIFT0 (0_4, FREG),
8178 OPRND_SHIFT0 (16_20, FREG)),
8179 CSKY_ISA_FLOAT_7E60),
8180 OP32 ("fabsh",
8181 OPCODE_INFO2 (0xf400c8c0,
8182 OPRND_SHIFT0 (0_4, FREG),
8183 OPRND_SHIFT0 (16_20, FREG)),
8184 CSKY_ISA_FLOAT_7E60),
8185 OP32 ("fneg.16",
8186 OPCODE_INFO2 (0xf400c8e0,
8187 OPRND_SHIFT0 (0_4, FREG),
8188 OPRND_SHIFT0 (16_20, FREG)),
8189 CSKY_ISA_FLOAT_7E60),
8190 OP32 ("fnegh",
8191 OPCODE_INFO2 (0xf400c8e0,
8192 OPRND_SHIFT0 (0_4, FREG),
8193 OPRND_SHIFT0 (16_20, FREG)),
8194 CSKY_ISA_FLOAT_7E60),
8195 OP32 ("fcmphsz.16",
8196 OPCODE_INFO1 (0xf400c900,
8197 OPRND_SHIFT0 (16_20, FREG)),
8198 CSKY_ISA_FLOAT_7E60),
8199 OP32 ("fcmpzhsh",
8200 OPCODE_INFO1 (0xf400c900,
8201 OPRND_SHIFT0 (16_20, FREG)),
8202 CSKY_ISA_FLOAT_7E60),
8203 OP32 ("fcmpltz.16",
8204 OPCODE_INFO1 (0xf400c920,
8205 OPRND_SHIFT0 (16_20, FREG)),
8206 CSKY_ISA_FLOAT_7E60),
8207 OP32 ("fcmpzlth",
8208 OPCODE_INFO1 (0xf400c920,
8209 OPRND_SHIFT0 (16_20, FREG)),
8210 CSKY_ISA_FLOAT_7E60),
8211 OP32 ("fcmpnez.16",
8212 OPCODE_INFO1 (0xf400c940,
8213 OPRND_SHIFT0 (16_20, FREG)),
8214 CSKY_ISA_FLOAT_7E60),
8215 OP32 ("fcmpzneh",
8216 OPCODE_INFO1 (0xf400c940,
8217 OPRND_SHIFT0 (16_20, FREG)),
8218 CSKY_ISA_FLOAT_7E60),
8219 OP32 ("fcmpuoz.16",
8220 OPCODE_INFO1 (0xf400c960,
8221 OPRND_SHIFT0 (16_20, FREG)),
8222 CSKY_ISA_FLOAT_7E60),
8223 OP32 ("fcmpzuoh",
8224 OPCODE_INFO1 (0xf400c960,
8225 OPRND_SHIFT0 (16_20, FREG)),
8226 CSKY_ISA_FLOAT_7E60),
8227 OP32 ("fcmphs.16",
8228 OPCODE_INFO2 (0xf400c980,
8229 OPRND_SHIFT0 (16_20, FREG),
8230 OPRND_SHIFT0 (21_25, FREG)),
8231 CSKY_ISA_FLOAT_7E60),
8232 OP32 ("fcmphsh",
8233 OPCODE_INFO2 (0xf400c980,
8234 OPRND_SHIFT0 (16_20, FREG),
8235 OPRND_SHIFT0 (21_25, FREG)),
8236 CSKY_ISA_FLOAT_7E60),
8237 OP32 ("fcmplt.16",
8238 OPCODE_INFO2 (0xf400c9a0,
8239 OPRND_SHIFT0 (16_20, FREG),
8240 OPRND_SHIFT0 (21_25, FREG)),
8241 CSKY_ISA_FLOAT_7E60),
8242 OP32 ("fcmpne.16",
8243 OPCODE_INFO2 (0xf400c9c0,
8244 OPRND_SHIFT0 (16_20, FREG),
8245 OPRND_SHIFT0 (21_25, FREG)),
8246 CSKY_ISA_FLOAT_7E60),
8247 OP32 ("fcmpneh",
8248 OPCODE_INFO2 (0xf400c9c0,
8249 OPRND_SHIFT0 (16_20, FREG),
8250 OPRND_SHIFT0 (21_25, FREG)),
8251 CSKY_ISA_FLOAT_7E60),
8252 OP32 ("fcmpuo.16",
8253 OPCODE_INFO2 (0xf400c9e0,
8254 OPRND_SHIFT0 (16_20, FREG),
8255 OPRND_SHIFT0 (21_25, FREG)),
8256 CSKY_ISA_FLOAT_7E60),
8257 OP32 ("fcmpuoh",
8258 OPCODE_INFO2 (0xf400c9e0,
8259 OPRND_SHIFT0 (16_20, FREG),
8260 OPRND_SHIFT0 (21_25, FREG)),
8261 CSKY_ISA_FLOAT_7E60),
8262 OP32 ("fmaxnm.16",
8263 OPCODE_INFO3 (0xf400cd00,
8264 OPRND_SHIFT0 (0_4, FREG),
8265 OPRND_SHIFT0 (16_20, FREG),
8266 OPRND_SHIFT0 (21_25, FREG)),
8267 CSKY_ISA_FLOAT_7E60),
8268 OP32 ("fminnm.16",
8269 OPCODE_INFO3 (0xf400cd20,
8270 OPRND_SHIFT0 (0_4, FREG),
8271 OPRND_SHIFT0 (16_20, FREG),
8272 OPRND_SHIFT0 (21_25, FREG)),
8273 CSKY_ISA_FLOAT_7E60),
8274 OP32 ("fcmphz.16",
8275 OPCODE_INFO1 (0xf400cd40,
8276 OPRND_SHIFT0 (16_20, FREG)),
8277 CSKY_ISA_FLOAT_7E60),
8278 OP32 ("fcmplsz.16",
8279 OPCODE_INFO1 (0xf400cd60,
8280 OPRND_SHIFT0 (16_20, FREG)),
8281 CSKY_ISA_FLOAT_7E60),
8282 OP32 ("fmul.16",
8283 OPCODE_INFO3 (0xf400ca00,
8284 OPRND_SHIFT0 (0_4, FREG),
8285 OPRND_SHIFT0 (16_20, FREG),
8286 OPRND_SHIFT0 (21_25, FREG)),
8287 CSKY_ISA_FLOAT_7E60),
8288 OP32 ("fmulh",
8289 OPCODE_INFO3 (0xf400ca00,
8290 OPRND_SHIFT0 (0_4, FREG),
8291 OPRND_SHIFT0 (16_20, FREG),
8292 OPRND_SHIFT0 (21_25, FREG)),
8293 CSKY_ISA_FLOAT_7E60),
8294 OP32 ("fnmul.16",
8295 OPCODE_INFO3 (0xf400ca20,
8296 OPRND_SHIFT0 (0_4, FREG),
8297 OPRND_SHIFT0 (16_20, FREG),
8298 OPRND_SHIFT0 (21_25, FREG)),
8299 CSKY_ISA_FLOAT_7E60),
8300 OP32 ("fnmulh",
8301 OPCODE_INFO3 (0xf400ca20,
8302 OPRND_SHIFT0 (0_4, FREG),
8303 OPRND_SHIFT0 (16_20, FREG),
8304 OPRND_SHIFT0 (21_25, FREG)),
8305 CSKY_ISA_FLOAT_7E60),
8306 OP32 ("fmula.16",
8307 OPCODE_INFO3 (0xf400ca80,
8308 OPRND_SHIFT0 (0_4, FREG),
8309 OPRND_SHIFT0 (16_20, FREG),
8310 OPRND_SHIFT0 (21_25, FREG)),
8311 CSKY_ISA_FLOAT_7E60),
8312 OP32 ("fmach",
8313 OPCODE_INFO3 (0xf400ca80,
8314 OPRND_SHIFT0 (0_4, FREG),
8315 OPRND_SHIFT0 (16_20, FREG),
8316 OPRND_SHIFT0 (21_25, FREG)),
8317 CSKY_ISA_FLOAT_7E60),
8318 OP32 ("fnmuls.16",
8319 OPCODE_INFO3 (0xf400caa0,
8320 OPRND_SHIFT0 (0_4, FREG),
8321 OPRND_SHIFT0 (16_20, FREG),
8322 OPRND_SHIFT0 (21_25, FREG)),
8323 CSKY_ISA_FLOAT_7E60),
8324 OP32 ("fmsch",
8325 OPCODE_INFO3 (0xf400caa0,
8326 OPRND_SHIFT0 (0_4, FREG),
8327 OPRND_SHIFT0 (16_20, FREG),
8328 OPRND_SHIFT0 (21_25, FREG)),
8329 CSKY_ISA_FLOAT_7E60),
8330 OP32 ("fmuls.16",
8331 OPCODE_INFO3 (0xf400cac0,
8332 OPRND_SHIFT0 (0_4, FREG),
8333 OPRND_SHIFT0 (16_20, FREG),
8334 OPRND_SHIFT0 (21_25, FREG)),
8335 CSKY_ISA_FLOAT_7E60),
8336 OP32 ("fnmach",
8337 OPCODE_INFO3 (0xf400cac0,
8338 OPRND_SHIFT0 (0_4, FREG),
8339 OPRND_SHIFT0 (16_20, FREG),
8340 OPRND_SHIFT0 (21_25, FREG)),
8341 CSKY_ISA_FLOAT_7E60),
8342 OP32 ("fnmula.16",
8343 OPCODE_INFO3 (0xf400cae0,
8344 OPRND_SHIFT0 (0_4, FREG),
8345 OPRND_SHIFT0 (16_20, FREG),
8346 OPRND_SHIFT0 (21_25, FREG)),
8347 CSKY_ISA_FLOAT_7E60),
8348 OP32 ("fnmsch",
8349 OPCODE_INFO3 (0xf400cae0,
8350 OPRND_SHIFT0 (0_4, FREG),
8351 OPRND_SHIFT0 (16_20, FREG),
8352 OPRND_SHIFT0 (21_25, FREG)),
8353 CSKY_ISA_FLOAT_7E60),
8354 OP32 ("ffmula.16",
8355 OPCODE_INFO3 (0xf400ce00,
8356 OPRND_SHIFT0 (0_4, FREG),
8357 OPRND_SHIFT0 (16_20, FREG),
8358 OPRND_SHIFT0 (21_25, FREG)),
8359 CSKY_ISA_FLOAT_7E60),
8360 OP32 ("ffmuls.16",
8361 OPCODE_INFO3 (0xf400ce20,
8362 OPRND_SHIFT0 (0_4, FREG),
8363 OPRND_SHIFT0 (16_20, FREG),
8364 OPRND_SHIFT0 (21_25, FREG)),
8365 CSKY_ISA_FLOAT_7E60),
8366 OP32 ("ffnmula.16",
8367 OPCODE_INFO3 (0xf400ce40,
8368 OPRND_SHIFT0 (0_4, FREG),
8369 OPRND_SHIFT0 (16_20, FREG),
8370 OPRND_SHIFT0 (21_25, FREG)),
8371 CSKY_ISA_FLOAT_7E60),
8372 OP32 ("ffnmuls.16",
8373 OPCODE_INFO3 (0xf400ce60,
8374 OPRND_SHIFT0 (0_4, FREG),
8375 OPRND_SHIFT0 (16_20, FREG),
8376 OPRND_SHIFT0 (21_25, FREG)),
8377 CSKY_ISA_FLOAT_7E60),
8378 OP32 ("fdivh",
8379 OPCODE_INFO3 (0xf400cb00,
8380 OPRND_SHIFT0 (0_4, FREG),
8381 OPRND_SHIFT0 (16_20, FREG),
8382 OPRND_SHIFT0 (21_25, FREG)),
8383 CSKY_ISA_FLOAT_7E60),
8384 OP32 ("fdiv.16",
8385 OPCODE_INFO3 (0xf400cb00,
8386 OPRND_SHIFT0 (0_4, FREG),
8387 OPRND_SHIFT0 (16_20, FREG),
8388 OPRND_SHIFT0 (21_25, FREG)),
8389 CSKY_ISA_FLOAT_7E60),
8390 OP32 ("freciph",
8391 OPCODE_INFO2 (0xf400cb20,
8392 OPRND_SHIFT0 (0_4, FREG),
8393 OPRND_SHIFT0 (16_20, FREG)),
8394 CSKY_ISA_FLOAT_7E60),
8395 OP32 ("frecip.16",
8396 OPCODE_INFO2 (0xf400cb20,
8397 OPRND_SHIFT0 (0_4, FREG),
8398 OPRND_SHIFT0 (16_20, FREG)),
8399 CSKY_ISA_FLOAT_7E60),
8400 OP32 ("fsqrt.16",
8401 OPCODE_INFO2 (0xf400cb40,
8402 OPRND_SHIFT0 (0_4, FREG),
8403 OPRND_SHIFT0 (16_20, FREG)),
8404 CSKY_ISA_FLOAT_7E60),
8405 OP32 ("fsqrth",
8406 OPCODE_INFO2 (0xf400cb40,
8407 OPRND_SHIFT0 (0_4, FREG),
8408 OPRND_SHIFT0 (16_20, FREG)),
8409 CSKY_ISA_FLOAT_7E60),
8410 OP32 ("fsel.16",
8411 OPCODE_INFO3 (0xf400cf20,
8412 OPRND_SHIFT0 (0_4, FREG),
8413 OPRND_SHIFT0 (16_20, FREG),
8414 OPRND_SHIFT0 (21_25, FREG)),
8415 CSKY_ISA_FLOAT_7E60),
8416 /* Single floating. */
8417 OP32 ("fadd.32",
8418 OPCODE_INFO3 (0xf4000000,
8419 OPRND_SHIFT0 (0_4, FREG),
8420 OPRND_SHIFT0 (16_20, FREG),
8421 OPRND_SHIFT0 (21_25, FREG)),
8422 CSKY_ISA_FLOAT_7E60),
8423 OP32 ("fadds",
8424 OPCODE_INFO3 (0xf4000000,
8425 OPRND_SHIFT0 (0_4, FREG),
8426 OPRND_SHIFT0 (16_20, FREG),
8427 OPRND_SHIFT0 (21_25, FREG)),
8428 CSKY_ISA_FLOAT_7E60),
8429 OP32 ("fsub.32",
8430 OPCODE_INFO3 (0xf4000020,
8431 OPRND_SHIFT0 (0_4, FREG),
8432 OPRND_SHIFT0 (16_20, FREG),
8433 OPRND_SHIFT0 (21_25, FREG)),
8434 CSKY_ISA_FLOAT_7E60),
8435 OP32 ("fsubs",
8436 OPCODE_INFO3 (0xf4000020,
8437 OPRND_SHIFT0 (0_4, FREG),
8438 OPRND_SHIFT0 (16_20, FREG),
8439 OPRND_SHIFT0 (21_25, FREG)),
8440 CSKY_ISA_FLOAT_7E60),
8441 OP32 ("fmov.32",
8442 OPCODE_INFO2 (0xf4000080,
8443 OPRND_SHIFT0 (0_4, FREG),
8444 OPRND_SHIFT0 (16_20, FREG)),
8445 CSKY_ISA_FLOAT_7E60),
8446 OP32 ("fmovs",
8447 OPCODE_INFO2 (0xf4000080,
8448 OPRND_SHIFT0 (0_4, FREG),
8449 OPRND_SHIFT0 (16_20, FREG)),
8450 CSKY_ISA_FLOAT_7E60),
8451 OP32 ("fabs.32",
8452 OPCODE_INFO2 (0xf40000c0,
8453 OPRND_SHIFT0 (0_4, FREG),
8454 OPRND_SHIFT0 (16_20, FREG)),
8455 CSKY_ISA_FLOAT_7E60),
8456 OP32 ("fabss",
8457 OPCODE_INFO2 (0xf40000c0,
8458 OPRND_SHIFT0 (0_4, FREG),
8459 OPRND_SHIFT0 (16_20, FREG)),
8460 CSKY_ISA_FLOAT_7E60),
8461 OP32 ("fneg.32",
8462 OPCODE_INFO2 (0xf40000e0,
8463 OPRND_SHIFT0 (0_4, FREG),
8464 OPRND_SHIFT0 (16_20, FREG)),
8465 CSKY_ISA_FLOAT_7E60),
8466 OP32 ("fnegs",
8467 OPCODE_INFO2 (0xf40000e0,
8468 OPRND_SHIFT0 (0_4, FREG),
8469 OPRND_SHIFT0 (16_20, FREG)),
8470 CSKY_ISA_FLOAT_7E60),
8471 OP32 ("fcmphsz.32",
8472 OPCODE_INFO1 (0xf4000100,
8473 OPRND_SHIFT0 (16_20, FREG)),
8474 CSKY_ISA_FLOAT_7E60),
8475 OP32 ("fcmpzhss",
8476 OPCODE_INFO1 (0xf4000100,
8477 OPRND_SHIFT0 (16_20, FREG)),
8478 CSKY_ISA_FLOAT_7E60),
8479 OP32 ("fcmpltz.32",
8480 OPCODE_INFO1 (0xf4000120,
8481 OPRND_SHIFT0 (16_20, FREG)),
8482 CSKY_ISA_FLOAT_7E60),
8483 OP32 ("fcmpzlts",
8484 OPCODE_INFO1 (0xf4000120,
8485 OPRND_SHIFT0 (16_20, FREG)),
8486 CSKY_ISA_FLOAT_7E60),
8487 OP32 ("fcmpnez.32",
8488 OPCODE_INFO1 (0xf4000140,
8489 OPRND_SHIFT0 (16_20, FREG)),
8490 CSKY_ISA_FLOAT_7E60),
8491 OP32 ("fcmpznes",
8492 OPCODE_INFO1 (0xf4000140,
8493 OPRND_SHIFT0 (16_20, FREG)),
8494 CSKY_ISA_FLOAT_7E60),
8495 OP32 ("fcmpuoz.32",
8496 OPCODE_INFO1 (0xf4000160,
8497 OPRND_SHIFT0 (16_20, FREG)),
8498 CSKY_ISA_FLOAT_7E60),
8499 OP32 ("fcmpzuos",
8500 OPCODE_INFO1 (0xf4000160,
8501 OPRND_SHIFT0 (16_20, FREG)),
8502 CSKY_ISA_FLOAT_7E60),
8503 OP32 ("fcmphs.32",
8504 OPCODE_INFO2 (0xf4000180,
8505 OPRND_SHIFT0 (16_20, FREG),
8506 OPRND_SHIFT0 (21_25, FREG)),
8507 CSKY_ISA_FLOAT_7E60),
8508 OP32 ("fcmphss",
8509 OPCODE_INFO2 (0xf4000180,
8510 OPRND_SHIFT0 (16_20, FREG),
8511 OPRND_SHIFT0 (21_25, FREG)),
8512 CSKY_ISA_FLOAT_7E60),
8513 OP32 ("fcmplt.32",
8514 OPCODE_INFO2 (0xf40001a0,
8515 OPRND_SHIFT0 (16_20, FREG),
8516 OPRND_SHIFT0 (21_25, FREG)),
8517 CSKY_ISA_FLOAT_7E60),
8518 OP32 ("fcmplts",
8519 OPCODE_INFO2 (0xf40001a0,
8520 OPRND_SHIFT0 (16_20, FREG),
8521 OPRND_SHIFT0 (21_25, FREG)),
8522 CSKY_ISA_FLOAT_7E60),
8523 OP32 ("fcmpne.32",
8524 OPCODE_INFO2 (0xf40001c0,
8525 OPRND_SHIFT0 (16_20, FREG),
8526 OPRND_SHIFT0 (21_25, FREG)),
8527 CSKY_ISA_FLOAT_7E60),
8528 OP32 ("fcmpnes",
8529 OPCODE_INFO2 (0xf40001c0,
8530 OPRND_SHIFT0 (16_20, FREG),
8531 OPRND_SHIFT0 (21_25, FREG)),
8532 CSKY_ISA_FLOAT_7E60),
8533 OP32 ("fcmpuo.32",
8534 OPCODE_INFO2 (0xf40001e0,
8535 OPRND_SHIFT0 (16_20, FREG),
8536 OPRND_SHIFT0 (21_25, FREG)),
8537 CSKY_ISA_FLOAT_7E60),
8538 OP32 ("fcmpuos",
8539 OPCODE_INFO2 (0xf40001e0,
8540 OPRND_SHIFT0 (16_20, FREG),
8541 OPRND_SHIFT0 (21_25, FREG)),
8542 CSKY_ISA_FLOAT_7E60),
8543 OP32 ("fmaxnm.32",
8544 OPCODE_INFO3 (0xf4000500,
8545 OPRND_SHIFT0 (0_4, FREG),
8546 OPRND_SHIFT0 (16_20, FREG),
8547 OPRND_SHIFT0 (21_25, FREG)),
8548 CSKY_ISA_FLOAT_7E60),
8549 OP32 ("fminnm.32",
8550 OPCODE_INFO3 (0xf4000520,
8551 OPRND_SHIFT0 (0_4, FREG),
8552 OPRND_SHIFT0 (16_20, FREG),
8553 OPRND_SHIFT0 (21_25, FREG)),
8554 CSKY_ISA_FLOAT_7E60),
8555 OP32 ("fcmphz.32",
8556 OPCODE_INFO1 (0xf4000540,
8557 OPRND_SHIFT0 (16_20, FREG)),
8558 CSKY_ISA_FLOAT_7E60),
8559 OP32 ("fcmplsz.32",
8560 OPCODE_INFO1 (0xf4000560,
8561 OPRND_SHIFT0 (16_20, FREG)),
8562 CSKY_ISA_FLOAT_7E60),
8563 OP32 ("fmul.32",
8564 OPCODE_INFO3 (0xf4000200,
8565 OPRND_SHIFT0 (0_4, FREG),
8566 OPRND_SHIFT0 (16_20, FREG),
8567 OPRND_SHIFT0 (21_25, FREG)),
8568 CSKY_ISA_FLOAT_7E60),
8569 OP32 ("fmuls",
8570 OPCODE_INFO3 (0xf4000200,
8571 OPRND_SHIFT0 (0_4, FREG),
8572 OPRND_SHIFT0 (16_20, FREG),
8573 OPRND_SHIFT0 (21_25, FREG)),
8574 CSKY_ISA_FLOAT_7E60),
8575 OP32 ("fnmul.32",
8576 OPCODE_INFO3 (0xf4000220,
8577 OPRND_SHIFT0 (0_4, FREG),
8578 OPRND_SHIFT0 (16_20, FREG),
8579 OPRND_SHIFT0 (21_25, FREG)),
8580 CSKY_ISA_FLOAT_7E60),
8581 OP32 ("fnmuls",
8582 OPCODE_INFO3 (0xf4000220,
8583 OPRND_SHIFT0 (0_4, FREG),
8584 OPRND_SHIFT0 (16_20, FREG),
8585 OPRND_SHIFT0 (21_25, FREG)),
8586 CSKY_ISA_FLOAT_7E60),
8587 OP32 ("fmula.32",
8588 OPCODE_INFO3 (0xf4000280,
8589 OPRND_SHIFT0 (0_4, FREG),
8590 OPRND_SHIFT0 (16_20, FREG),
8591 OPRND_SHIFT0 (21_25, FREG)),
8592 CSKY_ISA_FLOAT_7E60),
8593 OP32 ("fmacs",
8594 OPCODE_INFO3 (0xf4000280,
8595 OPRND_SHIFT0 (0_4, FREG),
8596 OPRND_SHIFT0 (16_20, FREG),
8597 OPRND_SHIFT0 (21_25, FREG)),
8598 CSKY_ISA_FLOAT_7E60),
8599 OP32 ("fnmuls.32",
8600 OPCODE_INFO3 (0xf40002a0,
8601 OPRND_SHIFT0 (0_4, FREG),
8602 OPRND_SHIFT0 (16_20, FREG),
8603 OPRND_SHIFT0 (21_25, FREG)),
8604 CSKY_ISA_FLOAT_7E60),
8605 OP32 ("fmscs",
8606 OPCODE_INFO3 (0xf40002a0,
8607 OPRND_SHIFT0 (0_4, FREG),
8608 OPRND_SHIFT0 (16_20, FREG),
8609 OPRND_SHIFT0 (21_25, FREG)),
8610 CSKY_ISA_FLOAT_7E60),
8611 OP32 ("fmuls.32",
8612 OPCODE_INFO3 (0xf40002c0,
8613 OPRND_SHIFT0 (0_4, FREG),
8614 OPRND_SHIFT0 (16_20, FREG),
8615 OPRND_SHIFT0 (21_25, FREG)),
8616 CSKY_ISA_FLOAT_7E60),
8617 OP32 ("fnmacs",
8618 OPCODE_INFO3 (0xf40002c0,
8619 OPRND_SHIFT0 (0_4, FREG),
8620 OPRND_SHIFT0 (16_20, FREG),
8621 OPRND_SHIFT0 (21_25, FREG)),
8622 CSKY_ISA_FLOAT_7E60),
8623 OP32 ("fnmula.32",
8624 OPCODE_INFO3 (0xf40002e0,
8625 OPRND_SHIFT0 (0_4, FREG),
8626 OPRND_SHIFT0 (16_20, FREG),
8627 OPRND_SHIFT0 (21_25, FREG)),
8628 CSKY_ISA_FLOAT_7E60),
8629 OP32 ("fnmscs",
8630 OPCODE_INFO3 (0xf40002e0,
8631 OPRND_SHIFT0 (0_4, FREG),
8632 OPRND_SHIFT0 (16_20, FREG),
8633 OPRND_SHIFT0 (21_25, FREG)),
8634 CSKY_ISA_FLOAT_7E60),
8635 OP32 ("ffmula.32",
8636 OPCODE_INFO3 (0xf4000600,
8637 OPRND_SHIFT0 (0_4, FREG),
8638 OPRND_SHIFT0 (16_20, FREG),
8639 OPRND_SHIFT0 (21_25, FREG)),
8640 CSKY_ISA_FLOAT_7E60),
8641 OP32 ("ffmuls.32",
8642 OPCODE_INFO3 (0xf4000620,
8643 OPRND_SHIFT0 (0_4, FREG),
8644 OPRND_SHIFT0 (16_20, FREG),
8645 OPRND_SHIFT0 (21_25, FREG)),
8646 CSKY_ISA_FLOAT_7E60),
8647 OP32 ("ffnmula.32",
8648 OPCODE_INFO3 (0xf4000640,
8649 OPRND_SHIFT0 (0_4, FREG),
8650 OPRND_SHIFT0 (16_20, FREG),
8651 OPRND_SHIFT0 (21_25, FREG)),
8652 CSKY_ISA_FLOAT_7E60),
8653 OP32 ("ffnmuls.32",
8654 OPCODE_INFO3 (0xf4000660,
8655 OPRND_SHIFT0 (0_4, FREG),
8656 OPRND_SHIFT0 (16_20, FREG),
8657 OPRND_SHIFT0 (21_25, FREG)),
8658 CSKY_ISA_FLOAT_7E60),
8659 OP32 ("fdiv.32",
8660 OPCODE_INFO3 (0xf4000300,
8661 OPRND_SHIFT0 (0_4, FREG),
8662 OPRND_SHIFT0 (16_20, FREG),
8663 OPRND_SHIFT0 (21_25, FREG)),
8664 CSKY_ISA_FLOAT_7E60),
8665 OP32 ("fdivs",
8666 OPCODE_INFO3 (0xf4000300,
8667 OPRND_SHIFT0 (0_4, FREG),
8668 OPRND_SHIFT0 (16_20, FREG),
8669 OPRND_SHIFT0 (21_25, FREG)),
8670 CSKY_ISA_FLOAT_7E60),
8671 OP32 ("frecip.32",
8672 OPCODE_INFO2 (0xf4000320,
8673 OPRND_SHIFT0 (0_4, FREG),
8674 OPRND_SHIFT0 (16_20, FREG)),
8675 CSKY_ISA_FLOAT_7E60),
8676 OP32 ("frecips",
8677 OPCODE_INFO2 (0xf4000320,
8678 OPRND_SHIFT0 (0_4, FREG),
8679 OPRND_SHIFT0 (16_20, FREG)),
8680 CSKY_ISA_FLOAT_7E60),
8681 OP32 ("fsqrt.32",
8682 OPCODE_INFO2 (0xf4000340,
8683 OPRND_SHIFT0 (0_4, FREG),
8684 OPRND_SHIFT0 (16_20, FREG)),
8685 CSKY_ISA_FLOAT_7E60),
8686 OP32 ("fsqrts",
8687 OPCODE_INFO2 (0xf4000340,
8688 OPRND_SHIFT0 (0_4, FREG),
8689 OPRND_SHIFT0 (16_20, FREG)),
8690 CSKY_ISA_FLOAT_7E60),
8691 OP32 ("fsel.32",
8692 OPCODE_INFO3 (0xf4000720,
8693 OPRND_SHIFT0 (0_4, FREG),
8694 OPRND_SHIFT0 (16_20, FREG),
8695 OPRND_SHIFT0 (21_25, FREG)),
8696 CSKY_ISA_FLOAT_7E60),
8697 /* Double floating. */
8698 OP32 ("fadd.64",
8699 OPCODE_INFO3 (0xf4000800,
8700 OPRND_SHIFT0 (0_4, FREG),
8701 OPRND_SHIFT0 (16_20, FREG),
8702 OPRND_SHIFT0 (21_25, FREG)),
8703 CSKY_ISA_FLOAT_7E60),
8704 OP32 ("faddd",
8705 OPCODE_INFO3 (0xf4000800,
8706 OPRND_SHIFT0 (0_4, FREG),
8707 OPRND_SHIFT0 (16_20, FREG),
8708 OPRND_SHIFT0 (21_25, FREG)),
8709 CSKY_ISA_FLOAT_7E60),
8710 OP32 ("fsub.64",
8711 OPCODE_INFO3 (0xf4000820,
8712 OPRND_SHIFT0 (0_4, FREG),
8713 OPRND_SHIFT0 (16_20, FREG),
8714 OPRND_SHIFT0 (21_25, FREG)),
8715 CSKY_ISA_FLOAT_7E60),
8716 OP32 ("fsubd",
8717 OPCODE_INFO3 (0xf4000820,
8718 OPRND_SHIFT0 (0_4, FREG),
8719 OPRND_SHIFT0 (16_20, FREG),
8720 OPRND_SHIFT0 (21_25, FREG)),
8721 CSKY_ISA_FLOAT_7E60),
8722 OP32 ("fmov.64",
8723 OPCODE_INFO2 (0xf4000880,
8724 OPRND_SHIFT0 (0_4, FREG),
8725 OPRND_SHIFT0 (16_20, FREG)),
8726 CSKY_ISA_FLOAT_7E60),
8727 OP32 ("fmovd",
8728 OPCODE_INFO2 (0xf4000880,
8729 OPRND_SHIFT0 (0_4, FREG),
8730 OPRND_SHIFT0 (16_20, FREG)),
8731 CSKY_ISA_FLOAT_7E60),
8732 OP32 ("fmovx.32",
8733 OPCODE_INFO2 (0xf40008a0,
8734 OPRND_SHIFT0 (0_4, FREG),
8735 OPRND_SHIFT0 (16_20, FREG)),
8736 CSKY_ISA_FLOAT_7E60),
8737 OP32 ("fabs.64",
8738 OPCODE_INFO2 (0xf40008c0,
8739 OPRND_SHIFT0 (0_4, FREG),
8740 OPRND_SHIFT0 (16_20, FREG)),
8741 CSKY_ISA_FLOAT_7E60),
8742 OP32 ("fabsd",
8743 OPCODE_INFO2 (0xf40008c0,
8744 OPRND_SHIFT0 (0_4, FREG),
8745 OPRND_SHIFT0 (16_20, FREG)),
8746 CSKY_ISA_FLOAT_7E60),
8747 OP32 ("fneg.64",
8748 OPCODE_INFO2 (0xf40008e0,
8749 OPRND_SHIFT0 (0_4, FREG),
8750 OPRND_SHIFT0 (16_20, FREG)),
8751 CSKY_ISA_FLOAT_7E60),
8752 OP32 ("fnegd",
8753 OPCODE_INFO2 (0xf40008e0,
8754 OPRND_SHIFT0 (0_4, FREG),
8755 OPRND_SHIFT0 (16_20, FREG)),
8756 CSKY_ISA_FLOAT_7E60),
8757 OP32 ("fcmphsz.64",
8758 OPCODE_INFO1 (0xf4000900,
8759 OPRND_SHIFT0 (16_20, FREG)),
8760 CSKY_ISA_FLOAT_7E60),
8761 OP32 ("fcmpzhsd",
8762 OPCODE_INFO1 (0xf4000900,
8763 OPRND_SHIFT0 (16_20, FREG)),
8764 CSKY_ISA_FLOAT_7E60),
8765 OP32 ("fcmpltz.64",
8766 OPCODE_INFO1 (0xf4000920,
8767 OPRND_SHIFT0 (16_20, FREG)),
8768 CSKY_ISA_FLOAT_7E60),
8769 OP32 ("fcmpzltd",
8770 OPCODE_INFO1 (0xf4000920,
8771 OPRND_SHIFT0 (16_20, FREG)),
8772 CSKY_ISA_FLOAT_7E60),
8773 OP32 ("fcmpnez.64",
8774 OPCODE_INFO1 (0xf4000940,
8775 OPRND_SHIFT0 (16_20, FREG)),
8776 CSKY_ISA_FLOAT_7E60),
8777 OP32 ("fcmpzned",
8778 OPCODE_INFO1 (0xf4000940,
8779 OPRND_SHIFT0 (16_20, FREG)),
8780 CSKY_ISA_FLOAT_7E60),
8781 OP32 ("fcmpuoz.64",
8782 OPCODE_INFO1 (0xf4000960,
8783 OPRND_SHIFT0 (16_20, FREG)),
8784 CSKY_ISA_FLOAT_7E60),
8785 OP32 ("fcmpzuod",
8786 OPCODE_INFO1 (0xf4000960,
8787 OPRND_SHIFT0 (16_20, FREG)),
8788 CSKY_ISA_FLOAT_7E60),
8789 OP32 ("fcmphs.64",
8790 OPCODE_INFO2 (0xf4000980,
8791 OPRND_SHIFT0 (16_20, FREG),
8792 OPRND_SHIFT0 (21_25, FREG)),
8793 CSKY_ISA_FLOAT_7E60),
8794 OP32 ("fcmphsd",
8795 OPCODE_INFO2 (0xf4000980,
8796 OPRND_SHIFT0 (16_20, FREG),
8797 OPRND_SHIFT0 (21_25, FREG)),
8798 CSKY_ISA_FLOAT_7E60),
8799 OP32 ("fcmplt.64",
8800 OPCODE_INFO2 (0xf40009a0,
8801 OPRND_SHIFT0 (16_20, FREG),
8802 OPRND_SHIFT0 (21_25, FREG)),
8803 CSKY_ISA_FLOAT_7E60),
8804 OP32 ("fcmpltd",
8805 OPCODE_INFO2 (0xf40009a0,
8806 OPRND_SHIFT0 (16_20, FREG),
8807 OPRND_SHIFT0 (21_25, FREG)),
8808 CSKY_ISA_FLOAT_7E60),
8809 OP32 ("fcmpne.64",
8810 OPCODE_INFO2 (0xf40009c0,
8811 OPRND_SHIFT0 (16_20, FREG),
8812 OPRND_SHIFT0 (21_25, FREG)),
8813 CSKY_ISA_FLOAT_7E60),
8814 OP32 ("fcmpned",
8815 OPCODE_INFO2 (0xf40009c0,
8816 OPRND_SHIFT0 (16_20, FREG),
8817 OPRND_SHIFT0 (21_25, FREG)),
8818 CSKY_ISA_FLOAT_7E60),
8819 OP32 ("fcmpuo.64",
8820 OPCODE_INFO2 (0xf40009e0,
8821 OPRND_SHIFT0 (16_20, FREG),
8822 OPRND_SHIFT0 (21_25, FREG)),
8823 CSKY_ISA_FLOAT_7E60),
8824 OP32 ("fcmpuod",
8825 OPCODE_INFO2 (0xf40009e0,
8826 OPRND_SHIFT0 (16_20, FREG),
8827 OPRND_SHIFT0 (21_25, FREG)),
8828 CSKY_ISA_FLOAT_7E60),
8829 OP32 ("fmaxnm.64",
8830 OPCODE_INFO3 (0xf4000d00,
8831 OPRND_SHIFT0 (0_4, FREG),
8832 OPRND_SHIFT0 (16_20, FREG),
8833 OPRND_SHIFT0 (21_25, FREG)),
8834 CSKY_ISA_FLOAT_7E60),
8835 OP32 ("fminnm.64",
8836 OPCODE_INFO3 (0xf4000d20,
8837 OPRND_SHIFT0 (0_4, FREG),
8838 OPRND_SHIFT0 (16_20, FREG),
8839 OPRND_SHIFT0 (21_25, FREG)),
8840 CSKY_ISA_FLOAT_7E60),
8841 OP32 ("fcmphz.64",
8842 OPCODE_INFO1 (0xf4000d40,
8843 OPRND_SHIFT0 (16_20, FREG)),
8844 CSKY_ISA_FLOAT_7E60),
8845 OP32 ("fcmplsz.64",
8846 OPCODE_INFO1 (0xf4000d60,
8847 OPRND_SHIFT0 (16_20, FREG)),
8848 CSKY_ISA_FLOAT_7E60),
8849 OP32 ("fmul.64",
8850 OPCODE_INFO3 (0xf4000a00,
8851 OPRND_SHIFT0 (0_4, FREG),
8852 OPRND_SHIFT0 (16_20, FREG),
8853 OPRND_SHIFT0 (21_25, FREG)),
8854 CSKY_ISA_FLOAT_7E60),
8855 OP32 ("fmuld",
8856 OPCODE_INFO3 (0xf4000a00,
8857 OPRND_SHIFT0 (0_4, FREG),
8858 OPRND_SHIFT0 (16_20, FREG),
8859 OPRND_SHIFT0 (21_25, FREG)),
8860 CSKY_ISA_FLOAT_7E60),
8861 OP32 ("fnmul.64",
8862 OPCODE_INFO3 (0xf4000a20,
8863 OPRND_SHIFT0 (0_4, FREG),
8864 OPRND_SHIFT0 (16_20, FREG),
8865 OPRND_SHIFT0 (21_25, FREG)),
8866 CSKY_ISA_FLOAT_7E60),
8867 OP32 ("fnmuld",
8868 OPCODE_INFO3 (0xf4000a20,
8869 OPRND_SHIFT0 (0_4, FREG),
8870 OPRND_SHIFT0 (16_20, FREG),
8871 OPRND_SHIFT0 (21_25, FREG)),
8872 CSKY_ISA_FLOAT_7E60),
8873 OP32 ("fmula.64",
8874 OPCODE_INFO3 (0xf4000a80,
8875 OPRND_SHIFT0 (0_4, FREG),
8876 OPRND_SHIFT0 (16_20, FREG),
8877 OPRND_SHIFT0 (21_25, FREG)),
8878 CSKY_ISA_FLOAT_7E60),
8879 OP32 ("fmacd",
8880 OPCODE_INFO3 (0xf4000a80,
8881 OPRND_SHIFT0 (0_4, FREG),
8882 OPRND_SHIFT0 (16_20, FREG),
8883 OPRND_SHIFT0 (21_25, FREG)),
8884 CSKY_ISA_FLOAT_7E60),
8885 OP32 ("fnmuls.64",
8886 OPCODE_INFO3 (0xf4000aa0,
8887 OPRND_SHIFT0 (0_4, FREG),
8888 OPRND_SHIFT0 (16_20, FREG),
8889 OPRND_SHIFT0 (21_25, FREG)),
8890 CSKY_ISA_FLOAT_7E60),
8891 OP32 ("fmscd",
8892 OPCODE_INFO3 (0xf4000aa0,
8893 OPRND_SHIFT0 (0_4, FREG),
8894 OPRND_SHIFT0 (16_20, FREG),
8895 OPRND_SHIFT0 (21_25, FREG)),
8896 CSKY_ISA_FLOAT_7E60),
8897 OP32 ("fmuls.64",
8898 OPCODE_INFO3 (0xf4000ac0,
8899 OPRND_SHIFT0 (0_4, FREG),
8900 OPRND_SHIFT0 (16_20, FREG),
8901 OPRND_SHIFT0 (21_25, FREG)),
8902 CSKY_ISA_FLOAT_7E60),
8903 OP32 ("fnmacd",
8904 OPCODE_INFO3 (0xf4000ac0,
8905 OPRND_SHIFT0 (0_4, FREG),
8906 OPRND_SHIFT0 (16_20, FREG),
8907 OPRND_SHIFT0 (21_25, FREG)),
8908 CSKY_ISA_FLOAT_7E60),
8909 OP32 ("fnmula.64",
8910 OPCODE_INFO3 (0xf4000ae0,
8911 OPRND_SHIFT0 (0_4, FREG),
8912 OPRND_SHIFT0 (16_20, FREG),
8913 OPRND_SHIFT0 (21_25, FREG)),
8914 CSKY_ISA_FLOAT_7E60),
8915 OP32 ("fnmscd",
8916 OPCODE_INFO3 (0xf4000ae0,
8917 OPRND_SHIFT0 (0_4, FREG),
8918 OPRND_SHIFT0 (16_20, FREG),
8919 OPRND_SHIFT0 (21_25, FREG)),
8920 CSKY_ISA_FLOAT_7E60),
8921 OP32 ("ffmula.64",
8922 OPCODE_INFO3 (0xf4000e00,
8923 OPRND_SHIFT0 (0_4, FREG),
8924 OPRND_SHIFT0 (16_20, FREG),
8925 OPRND_SHIFT0 (21_25, FREG)),
8926 CSKY_ISA_FLOAT_7E60),
8927 OP32 ("ffmuls.64",
8928 OPCODE_INFO3 (0xf4000e20,
8929 OPRND_SHIFT0 (0_4, FREG),
8930 OPRND_SHIFT0 (16_20, FREG),
8931 OPRND_SHIFT0 (21_25, FREG)),
8932 CSKY_ISA_FLOAT_7E60),
8933 OP32 ("ffnmula.64",
8934 OPCODE_INFO3 (0xf4000e40,
8935 OPRND_SHIFT0 (0_4, FREG),
8936 OPRND_SHIFT0 (16_20, FREG),
8937 OPRND_SHIFT0 (21_25, FREG)),
8938 CSKY_ISA_FLOAT_7E60),
8939 OP32 ("ffnmuls.64",
8940 OPCODE_INFO3 (0xf4000e60,
8941 OPRND_SHIFT0 (0_4, FREG),
8942 OPRND_SHIFT0 (16_20, FREG),
8943 OPRND_SHIFT0 (21_25, FREG)),
8944 CSKY_ISA_FLOAT_7E60),
8945 OP32 ("fdiv.64",
8946 OPCODE_INFO3 (0xf4000b00,
8947 OPRND_SHIFT0 (0_4, FREG),
8948 OPRND_SHIFT0 (16_20, FREG),
8949 OPRND_SHIFT0 (21_25, FREG)),
8950 CSKY_ISA_FLOAT_7E60),
8951 OP32 ("fdivd",
8952 OPCODE_INFO3 (0xf4000b00,
8953 OPRND_SHIFT0 (0_4, FREG),
8954 OPRND_SHIFT0 (16_20, FREG),
8955 OPRND_SHIFT0 (21_25, FREG)),
8956 CSKY_ISA_FLOAT_7E60),
8957 OP32 ("frecip.64",
8958 OPCODE_INFO2 (0xf4000b20,
8959 OPRND_SHIFT0 (0_4, FREG),
8960 OPRND_SHIFT0 (16_20, FREG)),
8961 CSKY_ISA_FLOAT_7E60),
8962 OP32 ("frecipd",
8963 OPCODE_INFO2 (0xf4000b20,
8964 OPRND_SHIFT0 (0_4, FREG),
8965 OPRND_SHIFT0 (16_20, FREG)),
8966 CSKY_ISA_FLOAT_7E60),
8967 OP32 ("fsqrt.64",
8968 OPCODE_INFO2 (0xf4000b40,
8969 OPRND_SHIFT0 (0_4, FREG),
8970 OPRND_SHIFT0 (16_20, FREG)),
8971 CSKY_ISA_FLOAT_7E60),
8972 OP32 ("fsqrtd",
8973 OPCODE_INFO2 (0xf4000b40,
8974 OPRND_SHIFT0 (0_4, FREG),
8975 OPRND_SHIFT0 (16_20, FREG)),
8976 CSKY_ISA_FLOAT_7E60),
8977 OP32 ("fins.32",
8978 OPCODE_INFO2 (0xf4000360,
8979 OPRND_SHIFT0 (0_4, FREG),
8980 OPRND_SHIFT0 (16_20, FREG)),
8981 CSKY_ISA_FLOAT_7E60),
8982 OP32 ("fsel.64",
8983 OPCODE_INFO3 (0xf4000f20,
8984 OPRND_SHIFT0 (0_4, FREG),
8985 OPRND_SHIFT0 (16_20, FREG),
8986 OPRND_SHIFT0 (21_25, FREG)),
8987 CSKY_ISA_FLOAT_7E60),
8988 /* SIMD floating. */
8989 OP32 ("fadd.f32",
8990 OPCODE_INFO3 (0xf4001000,
8991 OPRND_SHIFT0 (0_4, FREG),
8992 OPRND_SHIFT0 (16_20, FREG),
8993 OPRND_SHIFT0 (21_25, FREG)),
8994 CSKY_ISA_FLOAT_7E60),
8995 OP32 ("faddm",
8996 OPCODE_INFO3 (0xf4001000,
8997 OPRND_SHIFT0 (0_4, FREG),
8998 OPRND_SHIFT0 (16_20, FREG),
8999 OPRND_SHIFT0 (21_25, FREG)),
9000 CSKY_ISA_FLOAT_7E60),
9001 OP32 ("fsub.f32",
9002 OPCODE_INFO3 (0xf4001020,
9003 OPRND_SHIFT0 (0_4, FREG),
9004 OPRND_SHIFT0 (16_20, FREG),
9005 OPRND_SHIFT0 (21_25, FREG)),
9006 CSKY_ISA_FLOAT_7E60),
9007 OP32 ("fsubm",
9008 OPCODE_INFO3 (0xf4001020,
9009 OPRND_SHIFT0 (0_4, FREG),
9010 OPRND_SHIFT0 (16_20, FREG),
9011 OPRND_SHIFT0 (21_25, FREG)),
9012 CSKY_ISA_FLOAT_7E60),
9013 OP32 ("fmov.f32",
9014 OPCODE_INFO2 (0xf4001080,
9015 OPRND_SHIFT0 (0_4, FREG),
9016 OPRND_SHIFT0 (16_20, FREG)),
9017 CSKY_ISA_FLOAT_7E60),
9018 OP32 ("fmovm",
9019 OPCODE_INFO2 (0xf4001080,
9020 OPRND_SHIFT0 (0_4, FREG),
9021 OPRND_SHIFT0 (16_20, FREG)),
9022 CSKY_ISA_FLOAT_7E60),
9023 OP32 ("fabs.f32",
9024 OPCODE_INFO2 (0xf40010c0,
9025 OPRND_SHIFT0 (0_4, FREG),
9026 OPRND_SHIFT0 (16_20, FREG)),
9027 CSKY_ISA_FLOAT_7E60),
9028 OP32 ("fabsm",
9029 OPCODE_INFO2 (0xf40010c0,
9030 OPRND_SHIFT0 (0_4, FREG),
9031 OPRND_SHIFT0 (16_20, FREG)),
9032 CSKY_ISA_FLOAT_7E60),
9033 OP32 ("fneg.f32",
9034 OPCODE_INFO2 (0xf40010e0,
9035 OPRND_SHIFT0 (0_4, FREG),
9036 OPRND_SHIFT0 (16_20, FREG)),
9037 CSKY_ISA_FLOAT_7E60),
9038 OP32 ("fnegm",
9039 OPCODE_INFO2 (0xf40010e0,
9040 OPRND_SHIFT0 (0_4, FREG),
9041 OPRND_SHIFT0 (16_20, FREG)),
9042 CSKY_ISA_FLOAT_7E60),
9043 OP32 ("fmul.f32",
9044 OPCODE_INFO3 (0xf4001200,
9045 OPRND_SHIFT0 (0_4, FREG),
9046 OPRND_SHIFT0 (16_20, FREG),
9047 OPRND_SHIFT0 (21_25, FREG)),
9048 CSKY_ISA_FLOAT_7E60),
9049 OP32 ("fmulm",
9050 OPCODE_INFO3 (0xf4001200,
9051 OPRND_SHIFT0 (0_4, FREG),
9052 OPRND_SHIFT0 (16_20, FREG),
9053 OPRND_SHIFT0 (21_25, FREG)),
9054 CSKY_ISA_FLOAT_7E60),
9055 OP32 ("fmula.f32",
9056 OPCODE_INFO3 (0xf4001280,
9057 OPRND_SHIFT0 (0_4, FREG),
9058 OPRND_SHIFT0 (16_20, FREG),
9059 OPRND_SHIFT0 (21_25, FREG)),
9060 CSKY_ISA_FLOAT_7E60),
9061 OP32 ("fmuls.f32",
9062 OPCODE_INFO3 (0xf40012c0,
9063 OPRND_SHIFT0 (0_4, FREG),
9064 OPRND_SHIFT0 (16_20, FREG),
9065 OPRND_SHIFT0 (21_25, FREG)),
9066 CSKY_ISA_FLOAT_7E60),
9067 OP32 ("fnmacm",
9068 OPCODE_INFO3 (0xf40012c0,
9069 OPRND_SHIFT0 (0_4, FREG),
9070 OPRND_SHIFT0 (16_20, FREG),
9071 OPRND_SHIFT0 (21_25, FREG)),
9072 CSKY_ISA_FLOAT_7E60),
9073 /* floating formate. */
9074 OP32 ("fftoi.f32.s32.rn",
9075 OPCODE_INFO2 (0xf4001800,
9076 OPRND_SHIFT0 (0_4, FREG),
9077 OPRND_SHIFT0 (16_20, FREG)),
9078 CSKY_ISA_FLOAT_7E60),
9079 OP32 ("fstosi.rn",
9080 OPCODE_INFO2 (0xf4001800,
9081 OPRND_SHIFT0 (0_4, FREG),
9082 OPRND_SHIFT0 (16_20, FREG)),
9083 CSKY_ISA_FLOAT_7E60),
9084 OP32 ("fftoi.f32.s32.rz",
9085 OPCODE_INFO2 (0xf4001820,
9086 OPRND_SHIFT0 (0_4, FREG),
9087 OPRND_SHIFT0 (16_20, FREG)),
9088 CSKY_ISA_FLOAT_7E60),
9089 OP32 ("fstosi.rz",
9090 OPCODE_INFO2 (0xf4001820,
9091 OPRND_SHIFT0 (0_4, FREG),
9092 OPRND_SHIFT0 (16_20, FREG)),
9093 CSKY_ISA_FLOAT_7E60),
9094 OP32 ("fftoi.f32.s32.rpi",
9095 OPCODE_INFO2 (0xf4001840,
9096 OPRND_SHIFT0 (0_4, FREG),
9097 OPRND_SHIFT0 (16_20, FREG)),
9098 CSKY_ISA_FLOAT_7E60),
9099 OP32 ("fstosi.rpi",
9100 OPCODE_INFO2 (0xf4001840,
9101 OPRND_SHIFT0 (0_4, FREG),
9102 OPRND_SHIFT0 (16_20, FREG)),
9103 CSKY_ISA_FLOAT_7E60),
9104 OP32 ("fftoi.f32.s32.rni",
9105 OPCODE_INFO2 (0xf4001860,
9106 OPRND_SHIFT0 (0_4, FREG),
9107 OPRND_SHIFT0 (16_20, FREG)),
9108 CSKY_ISA_FLOAT_7E60),
9109 OP32 ("fstosi.rni",
9110 OPCODE_INFO2 (0xf4001860,
9111 OPRND_SHIFT0 (0_4, FREG),
9112 OPRND_SHIFT0 (16_20, FREG)),
9113 CSKY_ISA_FLOAT_7E60),
9114 OP32 ("fftoi.f32.u32.rn",
9115 OPCODE_INFO2 (0xf4001880,
9116 OPRND_SHIFT0 (0_4, FREG),
9117 OPRND_SHIFT0 (16_20, FREG)),
9118 CSKY_ISA_FLOAT_7E60),
9119 OP32 ("fstoui.rn",
9120 OPCODE_INFO2 (0xf4001880,
9121 OPRND_SHIFT0 (0_4, FREG),
9122 OPRND_SHIFT0 (16_20, FREG)),
9123 CSKY_ISA_FLOAT_7E60),
9124 OP32 ("fftoi.f32.u32.rz",
9125 OPCODE_INFO2 (0xf40018a0,
9126 OPRND_SHIFT0 (0_4, FREG),
9127 OPRND_SHIFT0 (16_20, FREG)),
9128 CSKY_ISA_FLOAT_7E60),
9129 OP32 ("fstoui.rz",
9130 OPCODE_INFO2 (0xf40018a0,
9131 OPRND_SHIFT0 (0_4, FREG),
9132 OPRND_SHIFT0 (16_20, FREG)),
9133 CSKY_ISA_FLOAT_7E60),
9134 OP32 ("fftoi.f32.u32.rpi",
9135 OPCODE_INFO2 (0xf40018c0,
9136 OPRND_SHIFT0 (0_4, FREG),
9137 OPRND_SHIFT0 (16_20, FREG)),
9138 CSKY_ISA_FLOAT_7E60),
9139 OP32 ("fstoui.rpi",
9140 OPCODE_INFO2 (0xf40018c0,
9141 OPRND_SHIFT0 (0_4, FREG),
9142 OPRND_SHIFT0 (16_20, FREG)),
9143 CSKY_ISA_FLOAT_7E60),
9144 OP32 ("fftoi.f32.u32.rni",
9145 OPCODE_INFO2 (0xf40018e0,
9146 OPRND_SHIFT0 (0_4, FREG),
9147 OPRND_SHIFT0 (16_20, FREG)),
9148 CSKY_ISA_FLOAT_7E60),
9149 OP32 ("fstoui.rni",
9150 OPCODE_INFO2 (0xf40018e0,
9151 OPRND_SHIFT0 (0_4, FREG),
9152 OPRND_SHIFT0 (16_20, FREG)),
9153 CSKY_ISA_FLOAT_7E60),
9154 OP32 ("fftoi.f64.s32.rn",
9155 OPCODE_INFO2 (0xf4001900,
9156 OPRND_SHIFT0 (0_4, FREG),
9157 OPRND_SHIFT0 (16_20, FREG)),
9158 CSKY_ISA_FLOAT_7E60),
9159 OP32 ("fdtosi.rn",
9160 OPCODE_INFO2 (0xf4001900,
9161 OPRND_SHIFT0 (0_4, FREG),
9162 OPRND_SHIFT0 (16_20, FREG)),
9163 CSKY_ISA_FLOAT_7E60),
9164 OP32 ("fftoi.f64.s32.rz",
9165 OPCODE_INFO2 (0xf4001920,
9166 OPRND_SHIFT0 (0_4, FREG),
9167 OPRND_SHIFT0 (16_20, FREG)),
9168 CSKY_ISA_FLOAT_7E60),
9169 OP32 ("fdtosi.rz",
9170 OPCODE_INFO2 (0xf4001920,
9171 OPRND_SHIFT0 (0_4, FREG),
9172 OPRND_SHIFT0 (16_20, FREG)),
9173 CSKY_ISA_FLOAT_7E60),
9174 OP32 ("fftoi.f64.s32.rpi",
9175 OPCODE_INFO2 (0xf4001940,
9176 OPRND_SHIFT0 (0_4, FREG),
9177 OPRND_SHIFT0 (16_20, FREG)),
9178 CSKY_ISA_FLOAT_7E60),
9179 OP32 ("fdtosi.rpi",
9180 OPCODE_INFO2 (0xf4001940,
9181 OPRND_SHIFT0 (0_4, FREG),
9182 OPRND_SHIFT0 (16_20, FREG)),
9183 CSKY_ISA_FLOAT_7E60),
9184 OP32 ("fftoi.f64.s32.rni",
9185 OPCODE_INFO2 (0xf4001960,
9186 OPRND_SHIFT0 (0_4, FREG),
9187 OPRND_SHIFT0 (16_20, FREG)),
9188 CSKY_ISA_FLOAT_7E60),
9189 OP32 ("fdtosi.rni",
9190 OPCODE_INFO2 (0xf4001960,
9191 OPRND_SHIFT0 (0_4, FREG),
9192 OPRND_SHIFT0 (16_20, FREG)),
9193 CSKY_ISA_FLOAT_7E60),
9194 OP32 ("fftoi.f64.u32.rn",
9195 OPCODE_INFO2 (0xf4001980,
9196 OPRND_SHIFT0 (0_4, FREG),
9197 OPRND_SHIFT0 (16_20, FREG)),
9198 CSKY_ISA_FLOAT_7E60),
9199 OP32 ("fdtoui.rn",
9200 OPCODE_INFO2 (0xf4001980,
9201 OPRND_SHIFT0 (0_4, FREG),
9202 OPRND_SHIFT0 (16_20, FREG)),
9203 CSKY_ISA_FLOAT_7E60),
9204 OP32 ("fftoi.f64.u32.rz",
9205 OPCODE_INFO2 (0xf40019a0,
9206 OPRND_SHIFT0 (0_4, FREG),
9207 OPRND_SHIFT0 (16_20, FREG)),
9208 CSKY_ISA_FLOAT_7E60),
9209 OP32 ("fdtoui.rz",
9210 OPCODE_INFO2 (0xf40019a0,
9211 OPRND_SHIFT0 (0_4, FREG),
9212 OPRND_SHIFT0 (16_20, FREG)),
9213 CSKY_ISA_FLOAT_7E60),
9214 OP32 ("fftoi.f64.u32.rpi",
9215 OPCODE_INFO2 (0xf40019c0,
9216 OPRND_SHIFT0 (0_4, FREG),
9217 OPRND_SHIFT0 (16_20, FREG)),
9218 CSKY_ISA_FLOAT_7E60),
9219 OP32 ("fdtoui.rpi",
9220 OPCODE_INFO2 (0xf40019c0,
9221 OPRND_SHIFT0 (0_4, FREG),
9222 OPRND_SHIFT0 (16_20, FREG)),
9223 CSKY_ISA_FLOAT_7E60),
9224 OP32 ("fftoi.f64.u32.rni",
9225 OPCODE_INFO2 (0xf40019e0,
9226 OPRND_SHIFT0 (0_4, FREG),
9227 OPRND_SHIFT0 (16_20, FREG)),
9228 CSKY_ISA_FLOAT_7E60),
9229 OP32 ("fdtoui.rni",
9230 OPCODE_INFO2 (0xf40019e0,
9231 OPRND_SHIFT0 (0_4, FREG),
9232 OPRND_SHIFT0 (16_20, FREG)),
9233 CSKY_ISA_FLOAT_7E60),
9234 OP32 ("fftoi.f16.s32.rn",
9235 OPCODE_INFO2 (0xf4001c00,
9236 OPRND_SHIFT0 (0_4, FREG),
9237 OPRND_SHIFT0 (16_20, FREG)),
9238 CSKY_ISA_FLOAT_7E60),
9239 OP32 ("fhtosi.rn",
9240 OPCODE_INFO2 (0xf4001c00,
9241 OPRND_SHIFT0 (0_4, FREG),
9242 OPRND_SHIFT0 (16_20, FREG)),
9243 CSKY_ISA_FLOAT_7E60),
9244 OP32 ("fftoi.f16.s32.rz",
9245 OPCODE_INFO2 (0xf4001c20,
9246 OPRND_SHIFT0 (0_4, FREG),
9247 OPRND_SHIFT0 (16_20, FREG)),
9248 CSKY_ISA_FLOAT_7E60),
9249 OP32 ("fhtosi.rz",
9250 OPCODE_INFO2 (0xf4001c20,
9251 OPRND_SHIFT0 (0_4, FREG),
9252 OPRND_SHIFT0 (16_20, FREG)),
9253 CSKY_ISA_FLOAT_7E60),
9254 OP32 ("fftoi.f16.s32.rpi",
9255 OPCODE_INFO2 (0xf4001c40,
9256 OPRND_SHIFT0 (0_4, FREG),
9257 OPRND_SHIFT0 (16_20, FREG)),
9258 CSKY_ISA_FLOAT_7E60),
9259 OP32 ("fhtosi.rpi",
9260 OPCODE_INFO2 (0xf4001c40,
9261 OPRND_SHIFT0 (0_4, FREG),
9262 OPRND_SHIFT0 (16_20, FREG)),
9263 CSKY_ISA_FLOAT_7E60),
9264 OP32 ("fftoi.f16.s32.rni",
9265 OPCODE_INFO2 (0xf4001c60,
9266 OPRND_SHIFT0 (0_4, FREG),
9267 OPRND_SHIFT0 (16_20, FREG)),
9268 CSKY_ISA_FLOAT_7E60),
9269 OP32 ("fhtosi.rni",
9270 OPCODE_INFO2 (0xf4001c60,
9271 OPRND_SHIFT0 (0_4, FREG),
9272 OPRND_SHIFT0 (16_20, FREG)),
9273 CSKY_ISA_FLOAT_7E60),
9274 OP32 ("fftoi.f16.u32.rn",
9275 OPCODE_INFO2 (0xf4001c80,
9276 OPRND_SHIFT0 (0_4, FREG),
9277 OPRND_SHIFT0 (16_20, FREG)),
9278 CSKY_ISA_FLOAT_7E60),
9279 OP32 ("fhtoui.rn",
9280 OPCODE_INFO2 (0xf4001c80,
9281 OPRND_SHIFT0 (0_4, FREG),
9282 OPRND_SHIFT0 (16_20, FREG)),
9283 CSKY_ISA_FLOAT_7E60),
9284 OP32 ("fftoi.f16.u32.rz",
9285 OPCODE_INFO2 (0xf4001ca0,
9286 OPRND_SHIFT0 (0_4, FREG),
9287 OPRND_SHIFT0 (16_20, FREG)),
9288 CSKY_ISA_FLOAT_7E60),
9289 OP32 ("fhtoui.rz",
9290 OPCODE_INFO2 (0xf4001ca0,
9291 OPRND_SHIFT0 (0_4, FREG),
9292 OPRND_SHIFT0 (16_20, FREG)),
9293 CSKY_ISA_FLOAT_7E60),
9294 OP32 ("fftoi.f16.u32.rpi",
9295 OPCODE_INFO2 (0xf4001cc0,
9296 OPRND_SHIFT0 (0_4, FREG),
9297 OPRND_SHIFT0 (16_20, FREG)),
9298 CSKY_ISA_FLOAT_7E60),
9299 OP32 ("fhtoui.rpi",
9300 OPCODE_INFO2 (0xf4001cc0,
9301 OPRND_SHIFT0 (0_4, FREG),
9302 OPRND_SHIFT0 (16_20, FREG)),
9303 CSKY_ISA_FLOAT_7E60),
9304 OP32 ("fftoi.f16.u32.rni",
9305 OPCODE_INFO2 (0xf4001ce0,
9306 OPRND_SHIFT0 (0_4, FREG),
9307 OPRND_SHIFT0 (16_20, FREG)),
9308 CSKY_ISA_FLOAT_7E60),
9309 OP32 ("fhtoui.rni",
9310 OPCODE_INFO2 (0xf4001ce0,
9311 OPRND_SHIFT0 (0_4, FREG),
9312 OPRND_SHIFT0 (16_20, FREG)),
9313 CSKY_ISA_FLOAT_7E60),
9314 OP32 ("fhtos",
9315 OPCODE_INFO2 (0xf4001a40,
9316 OPRND_SHIFT0 (0_4, FREG),
9317 OPRND_SHIFT0 (16_20, FREG)),
9318 CSKY_ISA_FLOAT_7E60),
9319 OP32 ("fhtos.f16",
9320 OPCODE_INFO2 (0xf4001a40,
9321 OPRND_SHIFT0 (0_4, FREG),
9322 OPRND_SHIFT0 (16_20, FREG)),
9323 CSKY_ISA_FLOAT_7E60),
9324 OP32 ("fstoh",
9325 OPCODE_INFO2 (0xf4001a60,
9326 OPRND_SHIFT0 (0_4, FREG),
9327 OPRND_SHIFT0 (16_20, FREG)),
9328 CSKY_ISA_FLOAT_7E60),
9329 OP32 ("fstoh.f32",
9330 OPCODE_INFO2 (0xf4001a60,
9331 OPRND_SHIFT0 (0_4, FREG),
9332 OPRND_SHIFT0 (16_20, FREG)),
9333 CSKY_ISA_FLOAT_7E60),
9334 OP32 ("fdtos",
9335 OPCODE_INFO2 (0xf4001ac0,
9336 OPRND_SHIFT0 (0_4, FREG),
9337 OPRND_SHIFT0 (16_20, FREG)),
9338 CSKY_ISA_FLOAT_7E60),
9339 OP32 ("fdtos.f64",
9340 OPCODE_INFO2 (0xf4001ac0,
9341 OPRND_SHIFT0 (0_4, FREG),
9342 OPRND_SHIFT0 (16_20, FREG)),
9343 CSKY_ISA_FLOAT_7E60),
9344 OP32 ("fstod",
9345 OPCODE_INFO2 (0xf4001ae0,
9346 OPRND_SHIFT0 (0_4, FREG),
9347 OPRND_SHIFT0 (16_20, FREG)),
9348 CSKY_ISA_FLOAT_7E60),
9349 OP32 ("fmfvrh",
9350 OPCODE_INFO2 (0xf4001b00,
9351 OPRND_SHIFT0 (0_4, AREG),
9352 OPRND_SHIFT0 (16_20, FREG)),
9353 CSKY_ISA_FLOAT_7E60),
9354 OP32 ("fmfvr.32.1",
9355 OPCODE_INFO2 (0xf4001b20,
9356 OPRND_SHIFT0 (0_4, AREG),
9357 OPRND_SHIFT0 (16_20, FREG)),
9358 CSKY_ISA_FLOAT_7E60),
9359 OP32 ("fmfvrl",
9360 OPCODE_INFO2 (0xf4001b20,
9361 OPRND_SHIFT0 (0_4, AREG),
9362 OPRND_SHIFT0 (16_20, FREG)),
9363 CSKY_ISA_FLOAT_7E60),
9364 OP32 ("fmtvr.16",
9365 OPCODE_INFO2 (0xf4001fa0,
9366 OPRND_SHIFT0 (0_4, FREG),
9367 OPRND_SHIFT0 (16_20, AREG)),
9368 CSKY_ISA_FLOAT_7E60),
9369 OP32 ("fmfvr.16",
9370 OPCODE_INFO2 (0xf4001f20,
9371 OPRND_SHIFT0 (0_4, AREG),
9372 OPRND_SHIFT0 (16_20, FREG)),
9373 CSKY_ISA_FLOAT_7E60),
9374 OP32 ("fmtvrh",
9375 OPCODE_INFO2 (0xf4001b40,
9376 OPRND_SHIFT0 (0_4, FREG),
9377 OPRND_SHIFT0 (16_20, AREG)),
9378 CSKY_ISA_FLOAT_7E60),
9379 OP32 ("fmtvr.32.1",
9380 OPCODE_INFO2 (0xf4001b60,
9381 OPRND_SHIFT0 (0_4, FREG),
9382 OPRND_SHIFT0 (16_20, AREG)),
9383 CSKY_ISA_FLOAT_7E60),
9384 OP32 ("fmtvrl",
9385 OPCODE_INFO2 (0xf4001b60,
9386 OPRND_SHIFT0 (0_4, FREG),
9387 OPRND_SHIFT0 (16_20, AREG)),
9388 CSKY_ISA_FLOAT_7E60),
9389 OP32 ("fmtvr.64",
9390 OPCODE_INFO3 (0xf4001f80,
9391 OPRND_SHIFT0 (0_4, FREG),
9392 OPRND_SHIFT0 (16_20, AREG),
9393 OPRND_SHIFT0 (21_25, AREG)),
9394 CSKY_ISA_FLOAT_7E60),
9395 OP32 ("fmfvr.64",
9396 OPCODE_INFO3 (0xf4001f00,
9397 OPRND_SHIFT0 (0_4, AREG),
9398 OPRND_SHIFT0 (21_25, AREG),
9399 OPRND_SHIFT0 (16_20, FREG)),
9400 CSKY_ISA_FLOAT_7E60),
9401 OP32 ("fmtvr.32.2",
9402 OPCODE_INFO3 (0xf4001fc0,
9403 OPRND_SHIFT0 (0_4, FREG),
9404 OPRND_SHIFT0 (16_20, AREG),
9405 OPRND_SHIFT0 (21_25, AREG)),
9406 CSKY_ISA_FLOAT_7E60),
9407 OP32 ("fmfvr.32.2",
9408 OPCODE_INFO3 (0xf4001f40,
9409 OPRND_SHIFT0 (0_4, AREG),
9410 OPRND_SHIFT0 (21_25, AREG),
9411 OPRND_SHIFT0 (16_20, FREG)),
9412 CSKY_ISA_FLOAT_7E60),
9413 /* flsu. */
9414 OP32 ("fld.16",
9415 SOPCODE_INFO2 (0xf4002300,
9416 (0_3or25, FREG, OPRND_SHIFT_0_BIT),
9417 BRACKET_OPRND ((16_20,
9418 AREG,
9419 OPRND_SHIFT_0_BIT),
9420 (4_7or21_24,
9421 IMM_FLDST,
9422 OPRND_SHIFT_1_BIT))),
9423 CSKY_ISA_FLOAT_7E60),
9424 OP32 ("fldh",
9425 SOPCODE_INFO2 (0xf4002300,
9426 (0_3or25, FREG, OPRND_SHIFT_0_BIT),
9427 BRACKET_OPRND ((16_20,
9428 AREG,
9429 OPRND_SHIFT_0_BIT),
9430 (4_7or21_24,
9431 IMM_FLDST,
9432 OPRND_SHIFT_1_BIT))),
9433 CSKY_ISA_FLOAT_7E60),
9434 OP32_WITH_WORK ("fst.16",
9435 SOPCODE_INFO2 (0xf4002700,
9436 (0_3or25, FREG, OPRND_SHIFT_0_BIT),
9437 BRACKET_OPRND ((16_20,
9438 AREG,
9439 OPRND_SHIFT_0_BIT),
9440 (4_7or21_24,
9441 IMM_FLDST,
9442 OPRND_SHIFT_1_BIT))),
9443 CSKY_ISA_FLOAT_7E60,
9444 float_work_fpuv3_fstore),
9445 OP32_WITH_WORK ("fsth",
9446 SOPCODE_INFO2 (0xf4002700,
9447 (0_3or25, FREG, OPRND_SHIFT_0_BIT),
9448 BRACKET_OPRND ((16_20,
9449 AREG,
9450 OPRND_SHIFT_0_BIT),
9451 (4_7or21_24,
9452 IMM_FLDST,
9453 OPRND_SHIFT_1_BIT))),
9454 CSKY_ISA_FLOAT_7E60,
9455 float_work_fpuv3_fstore),
9456 OP32 ("fldr16",
9457 SOPCODE_INFO2 (0xf4002b00,
9458 (0_4, FREG, OPRND_SHIFT_0_BIT),
9459 BRACKET_OPRND ((16_20,
9460 AREG,
9461 OPRND_SHIFT_0_BIT),
9462 (5_6or21_25,
9463 AREG_WITH_LSHIFT_FPU,
9464 OPRND_SHIFT_0_BIT))),
9465 CSKY_ISA_FLOAT_7E60),
9466 OP32 ("fldrh",
9467 SOPCODE_INFO2 (0xf4002b00,
9468 (0_4, FREG, OPRND_SHIFT_0_BIT),
9469 BRACKET_OPRND ((16_20,
9470 AREG,
9471 OPRND_SHIFT_0_BIT),
9472 (5_6or21_25,
9473 AREG_WITH_LSHIFT_FPU,
9474 OPRND_SHIFT_0_BIT))),
9475 CSKY_ISA_FLOAT_7E60),
9476 OP32_WITH_WORK ("fstr.16",
9477 SOPCODE_INFO2 (0xf4002f00,
9478 (0_4, FREG, OPRND_SHIFT_0_BIT),
9479 BRACKET_OPRND ((16_20,
9480 AREG,
9481 OPRND_SHIFT_0_BIT),
9482 (5_6or21_25,
9483 AREG_WITH_LSHIFT_FPU,
9484 OPRND_SHIFT_0_BIT))),
9485 CSKY_ISA_FLOAT_7E60,
9486 float_work_fpuv3_fstore),
9487 OP32_WITH_WORK ("fstrh",
9488 SOPCODE_INFO2 (0xf4002f00,
9489 (0_4, FREG, OPRND_SHIFT_0_BIT),
9490 BRACKET_OPRND ((16_20,
9491 AREG,
9492 OPRND_SHIFT_0_BIT),
9493 (5_6or21_25,
9494 AREG_WITH_LSHIFT_FPU,
9495 OPRND_SHIFT_0_BIT))),
9496 CSKY_ISA_FLOAT_7E60,
9497 float_work_fpuv3_fstore),
9498 OP32 ("fldm.16",
9499 OPCODE_INFO2 (0xf4003300,
9500 (0_4or21_24, FREGLIST_DASH, OPRND_SHIFT_0_BIT),
9501 (16_20, AREG_WITH_BRACKET,OPRND_SHIFT_0_BIT)),
9502 CSKY_ISA_FLOAT_7E60),
9503 OP32 ("fldmh",
9504 OPCODE_INFO2 (0xf4003300,
9505 (0_4or21_24, FREGLIST_DASH, OPRND_SHIFT_0_BIT),
9506 (16_20, AREG_WITH_BRACKET,OPRND_SHIFT_0_BIT)),
9507 CSKY_ISA_FLOAT_7E60),
9508 OP32_WITH_WORK ("fstm.16",
9509 OPCODE_INFO2 (0xf4003700,
9510 (0_4or21_24,
9511 FREGLIST_DASH,
9512 OPRND_SHIFT_0_BIT),
9513 (16_20,
9514 AREG_WITH_BRACKET,
9515 OPRND_SHIFT_0_BIT)),
9516 CSKY_ISA_FLOAT_7E60,
9517 float_work_fpuv3_fstore),
9518 OP32_WITH_WORK ("fstmh",
9519 OPCODE_INFO2 (0xf4003700,
9520 (0_4or21_24,
9521 FREGLIST_DASH,
9522 OPRND_SHIFT_0_BIT),
9523 (16_20,
9524 AREG_WITH_BRACKET,
9525 OPRND_SHIFT_0_BIT)),
9526 CSKY_ISA_FLOAT_7E60,
9527 float_work_fpuv3_fstore),
9528 OP32 ("fldmu.16",
9529 OPCODE_INFO2 (0xf4003380,
9530 OPRND_SHIFT0 (0_4or21_24, FREGLIST_DASH),
9531 OPRND_SHIFT0 (16_20, AREG_WITH_BRACKET)),
9532 CSKY_ISA_FLOAT_7E60),
9533 OP32 ("fldmu.h",
9534 OPCODE_INFO2 (0xf4003380,
9535 OPRND_SHIFT0 (0_4or21_24, FREGLIST_DASH),
9536 OPRND_SHIFT0 (16_20, AREG_WITH_BRACKET)),
9537 CSKY_ISA_FLOAT_7E60),
9538 OP32_WITH_WORK ("fstmu.16",
9539 OPCODE_INFO2 (0xf4003780,
9540 OPRND_SHIFT0 (0_4or21_24, FREGLIST_DASH),
9541 OPRND_SHIFT0 (16_20, AREG_WITH_BRACKET)),
9542 CSKY_ISA_FLOAT_7E60,
9543 float_work_fpuv3_fstore),
9544 OP32_WITH_WORK ("fstmu.h",
9545 OPCODE_INFO2 (0xf4003780,
9546 OPRND_SHIFT0 (0_4or21_24, FREGLIST_DASH),
9547 OPRND_SHIFT0 (16_20, AREG_WITH_BRACKET)),
9548 CSKY_ISA_FLOAT_7E60,
9549 float_work_fpuv3_fstore),
9550 OP32 ("fld.32",
9551 SOPCODE_INFO2 (0xf4002000,
9552 (0_3or25, FREG, OPRND_SHIFT_0_BIT),
9553 BRACKET_OPRND ((16_20,
9554 AREG,
9555 OPRND_SHIFT_0_BIT),
9556 (4_7or21_24,
9557 IMM_FLDST,
9558 OPRND_SHIFT_2_BIT))),
9559 CSKY_ISA_FLOAT_7E60),
9560 OP32 ("flds",
9561 SOPCODE_INFO2 (0xf4002000,
9562 (0_3or25, FREG, OPRND_SHIFT_0_BIT),
9563 BRACKET_OPRND ((16_20,
9564 AREG,
9565 OPRND_SHIFT_0_BIT),
9566 (4_7or21_24,
9567 IMM_FLDST,
9568 OPRND_SHIFT_2_BIT))),
9569 CSKY_ISA_FLOAT_7E60),
9570 OP32_WITH_WORK ("fst.32",
9571 SOPCODE_INFO2 (0xf4002400,
9572 (0_3or25, FREG, OPRND_SHIFT_0_BIT),
9573 BRACKET_OPRND ((16_20,
9574 AREG,
9575 OPRND_SHIFT_0_BIT),
9576 (4_7or21_24,
9577 IMM_FLDST,
9578 OPRND_SHIFT_2_BIT))),
9579 CSKY_ISA_FLOAT_7E60,
9580 float_work_fpuv3_fstore),
9581 OP32_WITH_WORK ("fsts",
9582 SOPCODE_INFO2 (0xf4002400,
9583 (0_3or25, FREG, OPRND_SHIFT_0_BIT),
9584 BRACKET_OPRND ((16_20,
9585 AREG,
9586 OPRND_SHIFT_0_BIT),
9587 (4_7or21_24,
9588 IMM_FLDST,
9589 OPRND_SHIFT_2_BIT))),
9590 CSKY_ISA_FLOAT_7E60,
9591 float_work_fpuv3_fstore),
9592 OP32 ("fldr.32",
9593 SOPCODE_INFO2 (0xf4002800,
9594 (0_4, FREG, OPRND_SHIFT_0_BIT),
9595 BRACKET_OPRND ((16_20,
9596 AREG,
9597 OPRND_SHIFT_0_BIT),
9598 (5_6or21_25,
9599 AREG_WITH_LSHIFT_FPU,
9600 OPRND_SHIFT_0_BIT))),
9601 CSKY_ISA_FLOAT_7E60),
9602 OP32 ("fldrs",
9603 SOPCODE_INFO2 (0xf4002800,
9604 (0_4, FREG, OPRND_SHIFT_0_BIT),
9605 BRACKET_OPRND ((16_20,
9606 AREG,
9607 OPRND_SHIFT_0_BIT),
9608 (5_6or21_25,
9609 AREG_WITH_LSHIFT_FPU,
9610 OPRND_SHIFT_0_BIT))),
9611 CSKY_ISA_FLOAT_7E60),
9612 OP32_WITH_WORK ("fstr.32",
9613 SOPCODE_INFO2 (0xf4002c00,
9614 (0_4, FREG, OPRND_SHIFT_0_BIT),
9615 BRACKET_OPRND ((16_20,
9616 AREG,
9617 OPRND_SHIFT_0_BIT),
9618 (5_6or21_25,
9619 AREG_WITH_LSHIFT_FPU,
9620 OPRND_SHIFT_0_BIT))),
9621 CSKY_ISA_FLOAT_7E60,
9622 float_work_fpuv3_fstore),
9623 OP32_WITH_WORK ("fstrs",
9624 SOPCODE_INFO2 (0xf4002c00,
9625 (0_4, FREG, OPRND_SHIFT_0_BIT),
9626 BRACKET_OPRND ((16_20,
9627 AREG,
9628 OPRND_SHIFT_0_BIT),
9629 (5_6or21_25,
9630 AREG_WITH_LSHIFT_FPU,
9631 OPRND_SHIFT_0_BIT))),
9632 CSKY_ISA_FLOAT_7E60,
9633 float_work_fpuv3_fstore),
9634 OP32 ("fldm.32",
9635 OPCODE_INFO2 (0xf4003000,
9636 OPRND_SHIFT0 (0_4or21_25, FREGLIST_DASH),
9637 OPRND_SHIFT0 (16_20, AREG_WITH_BRACKET)),
9638 CSKY_ISA_FLOAT_7E60),
9639 OP32 ("fldms",
9640 OPCODE_INFO2 (0xf4003000,
9641 OPRND_SHIFT0 (0_4or21_25, FREGLIST_DASH),
9642 OPRND_SHIFT0 (16_20, AREG_WITH_BRACKET)),
9643 CSKY_ISA_FLOAT_7E60),
9644 OP32_WITH_WORK ("fstm.32",
9645 OPCODE_INFO2 (0xf4003400,
9646 OPRND_SHIFT0 (0_4or21_25, FREGLIST_DASH),
9647 OPRND_SHIFT0 (16_20, AREG_WITH_BRACKET)),
9648 CSKY_ISA_FLOAT_7E60,
9649 float_work_fpuv3_fstore),
9650 OP32_WITH_WORK ("fstms",
9651 OPCODE_INFO2 (0xf4003400,
9652 OPRND_SHIFT0 (0_4or21_25, FREGLIST_DASH),
9653 OPRND_SHIFT0 (16_20, AREG_WITH_BRACKET)),
9654 CSKY_ISA_FLOAT_7E60,
9655 float_work_fpuv3_fstore),
9656 OP32 ("fldmu.32",
9657 OPCODE_INFO2 (0xf4003080,
9658 OPRND_SHIFT0 (0_4or21_25, FREGLIST_DASH),
9659 OPRND_SHIFT0 (16_20, AREG_WITH_BRACKET)),
9660 CSKY_ISA_FLOAT_7E60),
9661 OP32 ("fldmu.s",
9662 OPCODE_INFO2 (0xf4003080,
9663 OPRND_SHIFT0 (0_4or21_25, FREGLIST_DASH),
9664 OPRND_SHIFT0 (16_20, AREG_WITH_BRACKET)),
9665 CSKY_ISA_FLOAT_7E60),
9666 OP32_WITH_WORK ("fstmu.32",
9667 OPCODE_INFO2 (0xf4003480,
9668 OPRND_SHIFT0 (0_4or21_25, FREGLIST_DASH),
9669 OPRND_SHIFT0 (16_20, AREG_WITH_BRACKET)),
9670 CSKY_ISA_FLOAT_7E60,
9671 float_work_fpuv3_fstore),
9672 OP32_WITH_WORK ("fstmu.s",
9673 OPCODE_INFO2 (0xf4003480,
9674 OPRND_SHIFT0 (0_4or21_25, FREGLIST_DASH),
9675 OPRND_SHIFT0 (16_20, AREG_WITH_BRACKET)),
9676 CSKY_ISA_FLOAT_7E60,
9677 float_work_fpuv3_fstore),
9678 OP32 ("fld.64",
9679 SOPCODE_INFO2 (0xf4002100,
9680 (0_3or25, FREG, OPRND_SHIFT_0_BIT),
9681 BRACKET_OPRND ((16_20,
9682 AREG,
9683 OPRND_SHIFT_0_BIT),
9684 (4_7or21_24,
9685 IMM_FLDST,
9686 OPRND_SHIFT_2_BIT))),
9687 CSKY_ISA_FLOAT_7E60),
9688 OP32 ("fldd",
9689 SOPCODE_INFO2 (0xf4002100,
9690 (0_3or25, FREG, OPRND_SHIFT_0_BIT),
9691 BRACKET_OPRND ((16_20,
9692 AREG,
9693 OPRND_SHIFT_0_BIT),
9694 (4_7or21_24,
9695 IMM_FLDST,
9696 OPRND_SHIFT_2_BIT))),
9697 CSKY_ISA_FLOAT_7E60),
9698 OP32_WITH_WORK ("fst.64",
9699 SOPCODE_INFO2 (0xf4002500,
9700 (0_3or25, FREG, OPRND_SHIFT_0_BIT),
9701 BRACKET_OPRND ((16_20,
9702 AREG,
9703 OPRND_SHIFT_0_BIT),
9704 (4_7or21_24,
9705 IMM_FLDST,
9706 OPRND_SHIFT_2_BIT))),
9707 CSKY_ISA_FLOAT_7E60,
9708 float_work_fpuv3_fstore),
9709 OP32_WITH_WORK ("fstd",
9710 SOPCODE_INFO2 (0xf4002500,
9711 (0_3or25, FREG, OPRND_SHIFT_0_BIT),
9712 BRACKET_OPRND ((16_20,
9713 AREG,
9714 OPRND_SHIFT_0_BIT),
9715 (4_7or21_24,
9716 IMM_FLDST,
9717 OPRND_SHIFT_2_BIT))),
9718 CSKY_ISA_FLOAT_7E60,
9719 float_work_fpuv3_fstore),
9720 OP32 ("fldr.64",
9721 SOPCODE_INFO2 (0xf4002900,
9722 (0_4, FREG, OPRND_SHIFT_0_BIT),
9723 BRACKET_OPRND ((16_20,
9724 AREG,
9725 OPRND_SHIFT_0_BIT),
9726 (5_6or21_25,
9727 AREG_WITH_LSHIFT_FPU,
9728 OPRND_SHIFT_0_BIT))),
9729 CSKY_ISA_FLOAT_7E60),
9730 OP32 ("fldrd",
9731 SOPCODE_INFO2 (0xf4002900,
9732 (0_4, FREG, OPRND_SHIFT_0_BIT),
9733 BRACKET_OPRND ((16_20,
9734 AREG,
9735 OPRND_SHIFT_0_BIT),
9736 (5_6or21_25,
9737 AREG_WITH_LSHIFT_FPU,
9738 OPRND_SHIFT_0_BIT))),
9739 CSKY_ISA_FLOAT_7E60),
9740 OP32_WITH_WORK ("fstr.64",
9741 SOPCODE_INFO2 (0xf4002d00,
9742 (0_4, FREG, OPRND_SHIFT_0_BIT),
9743 BRACKET_OPRND ((16_20,
9744 AREG,
9745 OPRND_SHIFT_0_BIT),
9746 (5_6or21_25,
9747 AREG_WITH_LSHIFT_FPU,
9748 OPRND_SHIFT_0_BIT))),
9749 CSKY_ISA_FLOAT_7E60,
9750 float_work_fpuv3_fstore),
9751 OP32_WITH_WORK ("fstrd",
9752 SOPCODE_INFO2 (0xf4002d00,
9753 (0_4, FREG, OPRND_SHIFT_0_BIT),
9754 BRACKET_OPRND ((16_20,
9755 AREG,
9756 OPRND_SHIFT_0_BIT),
9757 (5_6or21_25,
9758 AREG_WITH_LSHIFT_FPU,
9759 OPRND_SHIFT_0_BIT))),
9760 CSKY_ISA_FLOAT_7E60,
9761 float_work_fpuv3_fstore),
9762 OP32 ("fldm.64",
9763 OPCODE_INFO2 (0xf4003100,
9764 OPRND_SHIFT0 (0_4or21_25, FREGLIST_DASH),
9765 OPRND_SHIFT0 (16_20, AREG_WITH_BRACKET)),
9766 CSKY_ISA_FLOAT_7E60),
9767 OP32 ("fldmd",
9768 OPCODE_INFO2 (0xf4003100,
9769 OPRND_SHIFT0 (0_4or21_25, FREGLIST_DASH),
9770 OPRND_SHIFT0 (16_20, AREG_WITH_BRACKET)),
9771 CSKY_ISA_FLOAT_7E60),
9772 OP32_WITH_WORK ("fstm.64",
9773 OPCODE_INFO2 (0xf4003500,
9774 OPRND_SHIFT0 (0_4or21_25, FREGLIST_DASH),
9775 OPRND_SHIFT0 (16_20, AREG_WITH_BRACKET)),
9776 CSKY_ISA_FLOAT_7E60,
9777 float_work_fpuv3_fstore),
9778 OP32_WITH_WORK ("fstmd",
9779 OPCODE_INFO2 (0xf4003500,
9780 OPRND_SHIFT0 (0_4or21_25, FREGLIST_DASH),
9781 OPRND_SHIFT0 (16_20, AREG_WITH_BRACKET)),
9782 CSKY_ISA_FLOAT_7E60,
9783 float_work_fpuv3_fstore),
9784 OP32 ("fldmu.64",
9785 OPCODE_INFO2 (0xf4003180,
9786 OPRND_SHIFT0 (0_4or21_25, FREGLIST_DASH),
9787 OPRND_SHIFT0 (16_20, AREG_WITH_BRACKET)),
9788 CSKY_ISA_FLOAT_7E60),
9789 OP32 ("fldmu.d",
9790 OPCODE_INFO2 (0xf4003180,
9791 OPRND_SHIFT0 (0_4or21_25, FREGLIST_DASH),
9792 OPRND_SHIFT0 (16_20, AREG_WITH_BRACKET)),
9793 CSKY_ISA_FLOAT_7E60),
9794 OP32_WITH_WORK ("fstmu.64",
9795 OPCODE_INFO2 (0xf4003580,
9796 OPRND_SHIFT0 (0_4or21_25, FREGLIST_DASH),
9797 OPRND_SHIFT0 (16_20, AREG_WITH_BRACKET)),
9798 CSKY_ISA_FLOAT_7E60,
9799 float_work_fpuv3_fstore),
9800 OP32_WITH_WORK ("fstmu.d",
9801 OPCODE_INFO2 (0xf4003580,
9802 OPRND_SHIFT0 (0_4or21_25, FREGLIST_DASH),
9803 OPRND_SHIFT0 (16_20, AREG_WITH_BRACKET)),
9804 CSKY_ISA_FLOAT_7E60,
9805 float_work_fpuv3_fstore),
9806 OP32 ("fldrm",
9807 SOPCODE_INFO2 (0xf4002a00,
9808 (0_4, FREG, OPRND_SHIFT_0_BIT),
9809 BRACKET_OPRND ((16_20,
9810 AREG,
9811 OPRND_SHIFT_0_BIT),
9812 (5_6or21_25,
9813 AREG_WITH_LSHIFT_FPU,
9814 OPRND_SHIFT_0_BIT))),
9815 CSKY_ISA_FLOAT_7E60),
9816 OP32_WITH_WORK ("fstrm",
9817 SOPCODE_INFO2 (0xf4002e00,
9818 (0_4, FREG, OPRND_SHIFT_0_BIT),
9819 BRACKET_OPRND ((16_20,
9820 AREG,
9821 OPRND_SHIFT_0_BIT),
9822 (5_6or21_25,
9823 AREG_WITH_LSHIFT_FPU,
9824 OPRND_SHIFT_0_BIT))),
9825 CSKY_ISA_FLOAT_7E60,
9826 float_work_fpuv3_fstore),
9827 OP32 ("fldmm",
9828 OPCODE_INFO2 (0xf4003200,
9829 (0_4or21_24, FREGLIST_DASH, OPRND_SHIFT_0_BIT),
9830 (16_20, AREG_WITH_BRACKET,OPRND_SHIFT_0_BIT)),
9831 CSKY_ISA_FLOAT_7E60),
9832 OP32_WITH_WORK ("fstmm",
9833 OPCODE_INFO2 (0xf4003600,
9834 (0_4or21_24, FREGLIST_DASH, OPRND_SHIFT_0_BIT),
9835 (16_20, AREG_WITH_BRACKET,OPRND_SHIFT_0_BIT)),
9836 CSKY_ISA_FLOAT_7E60,
9837 float_work_fpuv3_fstore),
9838 OP32 ("fftox.f16.u16",
9839 OPCODE_INFO2 (0xf4004000,
9840 OPRND_SHIFT0 (0_4, FREG),
9841 OPRND_SHIFT0 (16_20, FREG)),
9842 CSKY_ISA_FLOAT_7E60),
9843 OP32 ("fftox.f16.s16",
9844 OPCODE_INFO2 (0xf4004020,
9845 OPRND_SHIFT0 (0_4, FREG),
9846 OPRND_SHIFT0 (16_20, FREG)),
9847 CSKY_ISA_FLOAT_7E60),
9848 OP32 ("fftox.f16.u32",
9849 OPCODE_INFO2 (0xf4004100,
9850 OPRND_SHIFT0 (0_4, FREG),
9851 OPRND_SHIFT0 (16_20, FREG)),
9852 CSKY_ISA_FLOAT_7E60),
9853 OP32 ("fftox.f16.s32",
9854 OPCODE_INFO2 (0xf4004120,
9855 OPRND_SHIFT0 (0_4, FREG),
9856 OPRND_SHIFT0 (16_20, FREG)),
9857 CSKY_ISA_FLOAT_7E60),
9858 OP32 ("fftox.f32.u32",
9859 OPCODE_INFO2 (0xf4004140,
9860 OPRND_SHIFT0 (0_4, FREG),
9861 OPRND_SHIFT0 (16_20, FREG)),
9862 CSKY_ISA_FLOAT_7E60),
9863 OP32 ("fftox.f32.s32",
9864 OPCODE_INFO2 (0xf4004160,
9865 OPRND_SHIFT0 (0_4, FREG),
9866 OPRND_SHIFT0 (16_20, FREG)),
9867 CSKY_ISA_FLOAT_7E60),
9868 OP32 ("fftox.f64.u32",
9869 OPCODE_INFO2 (0xf4004180,
9870 OPRND_SHIFT0 (0_4, FREG),
9871 OPRND_SHIFT0 (16_20, FREG)),
9872 CSKY_ISA_FLOAT_7E60),
9873 OP32 ("fftox.f64.s32",
9874 OPCODE_INFO2 (0xf40041a0,
9875 OPRND_SHIFT0 (0_4, FREG),
9876 OPRND_SHIFT0 (16_20, FREG)),
9877 CSKY_ISA_FLOAT_7E60),
9878 OP32 ("fxtof.u16.f16",
9879 OPCODE_INFO2 (0xf4004800,
9880 OPRND_SHIFT0 (0_4, FREG),
9881 OPRND_SHIFT0 (16_20, FREG)),
9882 CSKY_ISA_FLOAT_7E60),
9883 OP32 ("fxtof.s16.f16",
9884 OPCODE_INFO2 (0xf4004820,
9885 OPRND_SHIFT0 (0_4, FREG),
9886 OPRND_SHIFT0 (16_20, FREG)),
9887 CSKY_ISA_FLOAT_7E60),
9888 OP32 ("fxtof.u32.f16",
9889 OPCODE_INFO2 (0xf4004900,
9890 OPRND_SHIFT0 (0_4, FREG),
9891 OPRND_SHIFT0 (16_20, FREG)),
9892 CSKY_ISA_FLOAT_7E60),
9893 OP32 ("fxtof.s32.f16",
9894 OPCODE_INFO2 (0xf4004920,
9895 OPRND_SHIFT0 (0_4, FREG),
9896 OPRND_SHIFT0 (16_20, FREG)),
9897 CSKY_ISA_FLOAT_7E60),
9898 OP32 ("fxtof.u32.f32",
9899 OPCODE_INFO2 (0xf4004940,
9900 OPRND_SHIFT0 (0_4, FREG),
9901 OPRND_SHIFT0 (16_20, FREG)),
9902 CSKY_ISA_FLOAT_7E60),
9903 OP32 ("fxtof.s32.f32",
9904 OPCODE_INFO2 (0xf4004960,
9905 OPRND_SHIFT0 (0_4, FREG),
9906 OPRND_SHIFT0 (16_20, FREG)),
9907 CSKY_ISA_FLOAT_7E60),
9908 OP32 ("fxtof.u32.f64",
9909 OPCODE_INFO2 (0xf4004980,
9910 OPRND_SHIFT0 (0_4, FREG),
9911 OPRND_SHIFT0 (16_20, FREG)),
9912 CSKY_ISA_FLOAT_7E60),
9913 OP32 ("fxtof.s32.f64",
9914 OPCODE_INFO2 (0xf40049a0,
9915 OPRND_SHIFT0 (0_4, FREG),
9916 OPRND_SHIFT0 (16_20, FREG)),
9917 CSKY_ISA_FLOAT_7E60),
9918 OP32 ("fftoi.f16.s16",
9919 OPCODE_INFO2 (0xf4004220,
9920 OPRND_SHIFT0 (0_4, FREG),
9921 OPRND_SHIFT0 (16_20, FREG)),
9922 CSKY_ISA_FLOAT_7E60),
9923 OP32 ("fftoi.f16.u16",
9924 OPCODE_INFO2 (0xf4004200,
9925 OPRND_SHIFT0 (0_4, FREG),
9926 OPRND_SHIFT0 (16_20, FREG)),
9927 CSKY_ISA_FLOAT_7E60),
9928 OP32 ("fftoi.f16.s32",
9929 OPCODE_INFO2 (0xf4004320,
9930 OPRND_SHIFT0 (0_4, FREG),
9931 OPRND_SHIFT0 (16_20, FREG)),
9932 CSKY_ISA_FLOAT_7E60),
9933 OP32 ("fftoi.f16.u32",
9934 OPCODE_INFO2 (0xf4004300,
9935 OPRND_SHIFT0 (0_4, FREG),
9936 OPRND_SHIFT0 (16_20, FREG)),
9937 CSKY_ISA_FLOAT_7E60),
9938 OP32 ("fftoi.f32.s32",
9939 OPCODE_INFO2 (0xf4004360,
9940 OPRND_SHIFT0 (0_4, FREG),
9941 OPRND_SHIFT0 (16_20, FREG)),
9942 CSKY_ISA_FLOAT_7E60),
9943 OP32 ("fftoi.f32.u32",
9944 OPCODE_INFO2 (0xf4004340,
9945 OPRND_SHIFT0 (0_4, FREG),
9946 OPRND_SHIFT0 (16_20, FREG)),
9947 CSKY_ISA_FLOAT_7E60),
9948 OP32 ("fftoi.f64.s32",
9949 OPCODE_INFO2 (0xf40043a0,
9950 OPRND_SHIFT0 (0_4, FREG),
9951 OPRND_SHIFT0 (16_20, FREG)),
9952 CSKY_ISA_FLOAT_7E60),
9953 OP32 ("fftoi.f64.u32",
9954 OPCODE_INFO2 (0xf4004380,
9955 OPRND_SHIFT0 (0_4, FREG),
9956 OPRND_SHIFT0 (16_20, FREG)),
9957 CSKY_ISA_FLOAT_7E60),
9958 OP32 ("fitof.s16.f16",
9959 OPCODE_INFO2 (0xf4004a20,
9960 OPRND_SHIFT0 (0_4, FREG),
9961 OPRND_SHIFT0 (16_20, FREG)),
9962 CSKY_ISA_FLOAT_7E60),
9963 OP32 ("fitof.u16.f16",
9964 OPCODE_INFO2 (0xf4004a00,
9965 OPRND_SHIFT0 (0_4, FREG),
9966 OPRND_SHIFT0 (16_20, FREG)),
9967 CSKY_ISA_FLOAT_7E60),
9968 OP32 ("fitof.s32.f16",
9969 OPCODE_INFO2 (0xf4004b20,
9970 OPRND_SHIFT0 (0_4, FREG),
9971 OPRND_SHIFT0 (16_20, FREG)),
9972 CSKY_ISA_FLOAT_7E60),
9973 OP32 ("fitof.u32.f16",
9974 OPCODE_INFO2 (0xf4004b00,
9975 OPRND_SHIFT0 (0_4, FREG),
9976 OPRND_SHIFT0 (16_20, FREG)),
9977 CSKY_ISA_FLOAT_7E60),
9978 OP32 ("fitof.s32.f32",
9979 OPCODE_INFO2 (0xf4004b60,
9980 OPRND_SHIFT0 (0_4, FREG),
9981 OPRND_SHIFT0 (16_20, FREG)),
9982 CSKY_ISA_FLOAT_7E60),
9983 OP32 ("fsitos",
9984 OPCODE_INFO2 (0xf4004b60,
9985 OPRND_SHIFT0 (0_4, FREG),
9986 OPRND_SHIFT0 (16_20, FREG)),
9987 CSKY_ISA_FLOAT_7E60),
9988 OP32 ("fitof.u32.f32",
9989 OPCODE_INFO2 (0xf4004b40,
9990 OPRND_SHIFT0 (0_4, FREG),
9991 OPRND_SHIFT0 (16_20, FREG)),
9992 CSKY_ISA_FLOAT_7E60),
9993 OP32 ("fuitos",
9994 OPCODE_INFO2 (0xf4004b40,
9995 OPRND_SHIFT0 (0_4, FREG),
9996 OPRND_SHIFT0 (16_20, FREG)),
9997 CSKY_ISA_FLOAT_7E60),
9998 OP32 ("fitof.s32.f64",
9999 OPCODE_INFO2 (0xf4004ba0,
10000 OPRND_SHIFT0 (0_4, FREG),
10001 OPRND_SHIFT0 (16_20, FREG)),
10002 CSKY_ISA_FLOAT_7E60),
10003 OP32 ("fsitod",
10004 OPCODE_INFO2 (0xf4004ba0,
10005 OPRND_SHIFT0 (0_4, FREG),
10006 OPRND_SHIFT0 (16_20, FREG)),
10007 CSKY_ISA_FLOAT_7E60),
10008 OP32 ("fitof.u32.f64",
10009 OPCODE_INFO2 (0xf4004b80,
10010 OPRND_SHIFT0 (0_4, FREG),
10011 OPRND_SHIFT0 (16_20, FREG)),
10012 CSKY_ISA_FLOAT_7E60),
10013 OP32 ("fuitod",
10014 OPCODE_INFO2 (0xf4004b80,
10015 OPRND_SHIFT0 (0_4, FREG),
10016 OPRND_SHIFT0 (16_20, FREG)),
10017 CSKY_ISA_FLOAT_7E60),
10018 OP32 ("fftofi.f16.rn",
10019 OPCODE_INFO2 (0xf4004400,
10020 OPRND_SHIFT0 (0_4, FREG),
10021 OPRND_SHIFT0 (16_20, FREG)),
10022 CSKY_ISA_FLOAT_7E60),
10023 OP32 ("fftofi.f16.rz",
10024 OPCODE_INFO2 (0xf4004420,
10025 OPRND_SHIFT0 (0_4, FREG),
10026 OPRND_SHIFT0 (16_20, FREG)),
10027 CSKY_ISA_FLOAT_7E60),
10028 OP32 ("fftofi.f16.rpi",
10029 OPCODE_INFO2 (0xf4004440,
10030 OPRND_SHIFT0 (0_4, FREG),
10031 OPRND_SHIFT0 (16_20, FREG)),
10032 CSKY_ISA_FLOAT_7E60),
10033 OP32 ("fftofi.f16.rni",
10034 OPCODE_INFO2 (0xf4004460,
10035 OPRND_SHIFT0 (0_4, FREG),
10036 OPRND_SHIFT0 (16_20, FREG)),
10037 CSKY_ISA_FLOAT_7E60),
10038 OP32 ("fftofi.f32.rn",
10039 OPCODE_INFO2 (0xf4004480,
10040 OPRND_SHIFT0 (0_4, FREG),
10041 OPRND_SHIFT0 (16_20, FREG)),
10042 CSKY_ISA_FLOAT_7E60),
10043 OP32 ("fftofi.f32.rz",
10044 OPCODE_INFO2 (0xf40044a0,
10045 OPRND_SHIFT0 (0_4, FREG),
10046 OPRND_SHIFT0 (16_20, FREG)),
10047 CSKY_ISA_FLOAT_7E60),
10048 OP32 ("fftofi.f32.rpi",
10049 OPCODE_INFO2 (0xf40044c0,
10050 OPRND_SHIFT0 (0_4, FREG),
10051 OPRND_SHIFT0 (16_20, FREG)),
10052 CSKY_ISA_FLOAT_7E60),
10053 OP32 ("fftofi.f32.rni",
10054 OPCODE_INFO2 (0xf40044e0,
10055 OPRND_SHIFT0 (0_4, FREG),
10056 OPRND_SHIFT0 (16_20, FREG)),
10057 CSKY_ISA_FLOAT_7E60),
10058 OP32 ("fftofi.f64.rn",
10059 OPCODE_INFO2 (0xf4004500,
10060 OPRND_SHIFT0 (0_4, FREG),
10061 OPRND_SHIFT0 (16_20, FREG)),
10062 CSKY_ISA_FLOAT_7E60),
10063 OP32 ("fftofi.f64.rz",
10064 OPCODE_INFO2 (0xf4004520,
10065 OPRND_SHIFT0 (0_4, FREG),
10066 OPRND_SHIFT0 (16_20, FREG)),
10067 CSKY_ISA_FLOAT_7E60),
10068 OP32 ("fftofi.f64.rpi",
10069 OPCODE_INFO2 (0xf4004540,
10070 OPRND_SHIFT0 (0_4, FREG),
10071 OPRND_SHIFT0 (16_20, FREG)),
10072 CSKY_ISA_FLOAT_7E60),
10073 OP32 ("fftofi.f64.rni",
10074 OPCODE_INFO2 (0xf4004560,
10075 OPRND_SHIFT0 (0_4, FREG),
10076 OPRND_SHIFT0 (16_20, FREG)),
10077 CSKY_ISA_FLOAT_7E60),
10078 DOP32_WITH_WORK ("fmovi.16",
10079 OPCODE_INFO2 (0xf400e400,
10080 OPRND_SHIFT0 (0_4, FREG),
10081 OPRND_SHIFT0 (5or8_9or16_25, HFLOAT_FMOVI)),
10082 OPCODE_INFO3 (0xf400e400,
10083 OPRND_SHIFT0 (0_4, FREG),
10084 OPRND_SHIFT0 (5or8_9or20_25, IMM9b),
10085 OPRND_SHIFT0 (16_19, IMM4b)),
10086 CSKY_ISA_FLOAT_7E60,
10087 float_work_fpuv3_fmovi),
10088 DOP32_WITH_WORK ("fmovi.32",
10089 OPCODE_INFO2 (0xf400e440,
10090 OPRND_SHIFT0 (0_4, FREG),
10091 OPRND_SHIFT0 (5or8_9or16_25, SFLOAT_FMOVI)),
10092 OPCODE_INFO3 (0xf400e440,
10093 OPRND_SHIFT0 (0_4, FREG),
10094 OPRND_SHIFT0 (5or8_9or20_25, IMM9b),
10095 OPRND_SHIFT0 (16_19, IMM4b)),
10096 CSKY_ISA_FLOAT_7E60,
10097 float_work_fpuv3_fmovi),
10098 DOP32_WITH_WORK ("fmovi.64",
10099 OPCODE_INFO2 (0xf400e480,
10100 OPRND_SHIFT0 (0_4, FREG),
10101 OPRND_SHIFT0 (5or8_9or16_25, DFLOAT_FMOVI)),
10102 OPCODE_INFO3 (0xf400e480,
10103 OPRND_SHIFT0 (0_4, FREG),
10104 OPRND_SHIFT0 (5or8_9or20_25, IMM9b),
10105 OPRND_SHIFT0 (16_19, IMM4b)),
10106 CSKY_ISA_FLOAT_7E60,
10107 float_work_fpuv3_fmovi),
10108 #undef _RELOC32
10109 #define _RELOC32 BFD_RELOC_CKCORE_PCREL_FLRW_IMM8BY4
10110 OP32 ("flrw.32",
10111 OPCODE_INFO2 (0xf4003800,
10112 (0_3or25, FREG, OPRND_SHIFT_0_BIT),
10113 (4_7or21_24, FCONSTANT, OPRND_SHIFT_2_BIT)),
10114 CSKY_ISA_FLOAT_7E60),
10115 OP32 ("flrws",
10116 OPCODE_INFO2 (0xf4003800,
10117 (0_3or25, FREG, OPRND_SHIFT_0_BIT),
10118 (4_7or21_24, FCONSTANT, OPRND_SHIFT_2_BIT)),
10119 CSKY_ISA_FLOAT_7E60),
10120 OP32 ("flrw.64",
10121 OPCODE_INFO2 (0xf4003900,
10122 (0_3or25, FREG, OPRND_SHIFT_0_BIT),
10123 (4_7or21_24, FCONSTANT, OPRND_SHIFT_2_BIT)),
10124 CSKY_ISA_FLOAT_7E60),
10125 OP32 ("flrwd",
10126 OPCODE_INFO2 (0xf4003900,
10127 (0_3or25, FREG, OPRND_SHIFT_0_BIT),
10128 (4_7or21_24, FCONSTANT, OPRND_SHIFT_2_BIT)),
10129 CSKY_ISA_FLOAT_7E60),
10130 #undef _RELOC32
10131 #define _RELOC32 0
10132
10133 /* The following are aliases for other instructions. */
10134 /* setc -> cmphs r0, r0 */
10135 OP16 ("setc",
10136 OPCODE_INFO0 (0x6400),
10137 CSKYV2_ISA_E1),
10138 /* clrc -> cmpne r0, r0 */
10139 OP16 ("clrc",
10140 OPCODE_INFO0 (0x6402),
10141 CSKYV2_ISA_E1),
10142 /* tstlt rd -> btsti rd,31 */
10143 OP32 ("tstlt",
10144 OPCODE_INFO1 (0xc7e02880,
10145 (16_20, AREG, OPRND_SHIFT_0_BIT)),
10146 CSKYV2_ISA_1E2),
10147 /* idly4 -> idly 4 */
10148 OP32 ("idly4",
10149 OPCODE_INFO0 (0xc0601c20),
10150 CSKYV2_ISA_E1),
10151 /* rsub rz, ry, rx -> subu rz, rx, ry */
10152 DOP32 ("rsub",
10153 OPCODE_INFO3 (0xc4000080,
10154 (0_4, AREG, OPRND_SHIFT_0_BIT),
10155 (21_25, AREG, OPRND_SHIFT_0_BIT),
10156 (16_20, AREG, OPRND_SHIFT_0_BIT)),
10157 OPCODE_INFO2 (0xc4000080,
10158 (0_4or21_25, DUP_AREG, OPRND_SHIFT_0_BIT),
10159 (16_20, AREG, OPRND_SHIFT_0_BIT)), CSKYV2_ISA_1E2),
10160 /* cmplei rd,X -> cmplti rd,X+1 */
10161 OP16_OP32 ("cmplei",
10162 OPCODE_INFO2 (0x3820,
10163 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
10164 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
10165 CSKYV2_ISA_E1,
10166 OPCODE_INFO2 (0xeb200000,
10167 (16_20, AREG, OPRND_SHIFT_0_BIT),
10168 (0_15, IMM16b, OPRND_SHIFT_0_BIT)),
10169 CSKYV2_ISA_1E2),
10170 /* cmpls -> cmphs */
10171 OP16_OP32 ("cmpls",
10172 OPCODE_INFO2 (0x6400,
10173 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
10174 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
10175 CSKYV2_ISA_E1,
10176 OPCODE_INFO2 (0xc4000420,
10177 (21_25, AREG, OPRND_SHIFT_0_BIT),
10178 (16_20, AREG, OPRND_SHIFT_0_BIT)),
10179 CSKYV2_ISA_2E3),
10180 /* cmpgt -> cmplt */
10181 OP16_OP32 ("cmpgt",
10182 OPCODE_INFO2 (0x6401,
10183 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
10184 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
10185 CSKYV2_ISA_E1,
10186 OPCODE_INFO2 (0xc4000440,
10187 (21_25, AREG, OPRND_SHIFT_0_BIT),
10188 (16_20, AREG, OPRND_SHIFT_0_BIT)),
10189 CSKYV2_ISA_2E3),
10190 /* tstle rd -> cmplti rd,1 */
10191 OP16_OP32 ("tstle",
10192 OPCODE_INFO1 (0x3820,
10193 (8_10, GREG0_7, OPRND_SHIFT_0_BIT)),
10194 CSKYV2_ISA_E1,
10195 OPCODE_INFO1 (0xeb200000,
10196 (16_20, AREG, OPRND_SHIFT_0_BIT)),
10197 CSKYV2_ISA_1E2),
10198 /* tstne rd -> cmpnei rd,0 */
10199 OP16_OP32 ("tstne",
10200 OPCODE_INFO1 (0x3840,
10201 (8_10, GREG0_7, OPRND_SHIFT_0_BIT)),
10202 CSKYV2_ISA_E1,
10203 OPCODE_INFO1 (0xeb400000,
10204 (16_20, AREG, OPRND_SHIFT_0_BIT)),
10205 CSKYV2_ISA_1E2),
10206 /* rotri rz, rx, imm5 -> rotli rz, rx, 32-imm5 */
10207 DOP32 ("rotri",
10208 OPCODE_INFO3 (0xc4004900,
10209 (0_4, AREG, OPRND_SHIFT_0_BIT),
10210 (16_20, AREG, OPRND_SHIFT_0_BIT),
10211 (21_25, IMM5b_RORI, OPRND_SHIFT_0_BIT)),
10212 OPCODE_INFO2 (0xc4004900,
10213 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
10214 (21_25, IMM5b_RORI, OPRND_SHIFT_0_BIT)),
10215 CSKYV2_ISA_2E3),
10216 DOP32 ("rori",
10217 OPCODE_INFO3 (0xc4004900,
10218 (0_4, AREG, OPRND_SHIFT_0_BIT),
10219 (16_20, AREG, OPRND_SHIFT_0_BIT),
10220 (21_25, IMM5b_RORI, OPRND_SHIFT_0_BIT)),
10221 OPCODE_INFO2 (0xc4004900,
10222 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
10223 (21_25, IMM5b_RORI, OPRND_SHIFT_0_BIT)),
10224 CSKYV2_ISA_2E3),
10225
10226 /* rotlc rd -> addc rd, rd/ addc rd, rd, rd */
10227 OP16_OP32_WITH_WORK ("rotlc",
10228 OPCODE_INFO2 (0x6001,
10229 (NONE, GREG0_15, OPRND_SHIFT_0_BIT),
10230 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
10231 CSKYV2_ISA_E1,
10232 OPCODE_INFO2 (0xc4000040,
10233 (NONE, AREG, OPRND_SHIFT_0_BIT),
10234 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
10235 CSKYV2_ISA_2E3,
10236 v2_work_rotlc),
10237 /* not rd -> nor rd, rd, not rz, rx -> nor rz, rx, rx */
10238 OP16_OP32_WITH_WORK ("not",
10239 OPCODE_INFO1 (0x6c02,
10240 (NONE, AREG, OPRND_SHIFT_0_BIT)),
10241 CSKYV2_ISA_E1,
10242 OPCODE_INFO2 (0xc4002480,
10243 (NONE, AREG, OPRND_SHIFT_0_BIT),
10244 (NONE, AREG, OPRND_SHIFT_0_BIT)),
10245 CSKYV2_ISA_E1, v2_work_not),
10246
10247 /* Special force 32 bits instruction. */
10248 OP32 ("xtrb0.32",
10249 OPCODE_INFO2 (0xc4007020,
10250 (0_4, AREG, OPRND_SHIFT_0_BIT),
10251 (16_20, AREG, OPRND_SHIFT_0_BIT)),
10252 CSKYV2_ISA_1E2),
10253 OP32 ("xtrb1.32",
10254 OPCODE_INFO2 (0xc4007040,
10255 (0_4, AREG, OPRND_SHIFT_0_BIT),
10256 (16_20, AREG, OPRND_SHIFT_0_BIT)),
10257 CSKYV2_ISA_1E2),
10258 OP32 ("xtrb2.32",
10259 OPCODE_INFO2 (0xc4007080,
10260 (0_4, AREG, OPRND_SHIFT_0_BIT),
10261 (16_20, AREG, OPRND_SHIFT_0_BIT)),
10262 CSKYV2_ISA_1E2),
10263 OP32 ("xtrb3.32",
10264 OPCODE_INFO2 (0xc4007100,
10265 (0_4, AREG, OPRND_SHIFT_0_BIT),
10266 (16_20, AREG, OPRND_SHIFT_0_BIT)),
10267 CSKYV2_ISA_1E2),
10268 OP32 ("ff0.32",
10269 OPCODE_INFO2 (0xc4007c20,
10270 (0_4, AREG, OPRND_SHIFT_0_BIT),
10271 (16_20, AREG, OPRND_SHIFT_0_BIT)),
10272 CSKYV2_ISA_1E2),
10273 DOP32 ("ff1.32",
10274 OPCODE_INFO2 (0xc4007c40,
10275 (0_4, AREG, OPRND_SHIFT_0_BIT),
10276 (16_20, AREG, OPRND_SHIFT_0_BIT)),
10277 OPCODE_INFO1 (0xc4007c40,
10278 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT)),
10279 CSKYV2_ISA_1E2),
10280
10281 {NULL, 0, {}, {}, 0, 0, 0, 0, 0, NULL}
10282 };
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