pending-4.9/pwm-tiehrpwm-update-shadow-register-for-disabling-pw.patch

   1 From 6f1a8ffffc4940e07babe63f76f0ac3f5981d518 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Christoph=20Vogtl=C3=A4nder?=
   3  <c.vogtlaender@sigma-surface-science.com>
   4 Date: Tue, 12 Mar 2019 14:38:46 +0530
   5 Subject: pwm: tiehrpwm: Update shadow register for disabling PWMs
   6 MIME-Version: 1.0
   7 Content-Type: text/plain; charset=UTF-8
   8 Content-Transfer-Encoding: 8bit
   9
  10 [ Upstream commit b00ef53053191d3025c15e8041699f8c9d132daf ]
  11
  12 It must be made sure that immediate mode is not already set, when
  13 modifying shadow register value in ehrpwm_pwm_disable(). Otherwise
  14 modifications to the action-qualifier continuous S/W force
  15 register(AQSFRC) will be done in the active register.
  16 This may happen when both channels are being disabled. In this case,
  17 only the first channel state will be recorded as disabled in the shadow
  18 register. Later, when enabling the first channel again, the second
  19 channel would be enabled as well. Setting RLDCSF to zero, first, ensures
  20 that the shadow register is updated as desired.
  21
  22 Fixes: 38dabd91ff0b ("pwm: tiehrpwm: Fix disabling of output of PWMs")
  23 Signed-off-by: Christoph Vogtländer <c.vogtlaender@sigma-surface-science.com>
  24 [vigneshr@ti.com: Improve commit message]
  25 Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
  26 Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
  27 Signed-off-by: Sasha Levin <sashal@kernel.org>
  28 ---
  29  drivers/pwm/pwm-tiehrpwm.c | 2 ++
  30  1 file changed, 2 insertions(+)
  31
  32 diff --git a/drivers/pwm/pwm-tiehrpwm.c b/drivers/pwm/pwm-tiehrpwm.c
  33 index c0e06f0c19d1..9a232ebbbf96 100644
  34 --- a/drivers/pwm/pwm-tiehrpwm.c
  35 +++ b/drivers/pwm/pwm-tiehrpwm.c
  36 @@ -383,6 +383,8 @@ static void ehrpwm_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
  37         }
  38
  39         /* Update shadow register first before modifying active register */
  40 +       ehrpwm_modify(pc->mmio_base, AQSFRC, AQSFRC_RLDCSF_MASK,
  41 +                     AQSFRC_RLDCSF_ZRO);
  42         ehrpwm_modify(pc->mmio_base, AQCSFRC, aqcsfrc_mask, aqcsfrc_val);
  43         /*
  44          * Changes to immediate action on Action Qualifier. This puts
  45 --
  46 2.20.1
  47