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git.ipfire.org Git - people/ms/u-boot.git/blob - post/lib_powerpc/b.c
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * Branch instructions: b, bl, bc
30 * The first 2 instructions (b, bl) are verified by jumping
31 * to a fixed address and checking whether control was transfered
32 * to that very point. For the bl instruction the value of the
33 * link register is checked as well (using mfspr).
34 * To verify the bc instruction various combinations of the BI/BO
35 * fields, the CTR and the condition register values are
36 * checked. The list of such combinations is pre-built and
37 * linked in U-Boot at build time.
43 #if CONFIG_POST & CONFIG_SYS_POST_CPU
45 extern void cpu_post_exec_11 (ulong
*code
, ulong
*res
, ulong op1
);
46 extern void cpu_post_exec_31 (ulong
*code
, ulong
*ctr
, ulong
*lr
, ulong
*jump
,
49 static int cpu_post_test_bc (ulong cmd
, ulong bo
, ulong bi
,
50 int pjump
, int decr
, int link
, ulong pctr
, ulong cr
)
57 unsigned long code
[] =
64 ASM_3O(cmd
, bo
, bi
, 8),
72 cpu_post_exec_31 (code
, &ctr
, &lr
, &jump
, cr
);
75 ret
= pjump
== jump
? 0 : -1;
79 ret
= pctr
== ctr
+ 1 ? 0 : -1;
81 ret
= pctr
== ctr
? 0 : -1;
86 ret
= lr
== (ulong
) code
+ 24 ? 0 : -1;
88 ret
= lr
== 0 ? 0 : -1;
94 int cpu_post_test_b (void)
98 int flag
= disable_interrupts();
113 cpu_post_exec_11 (code
, &res
, 0);
115 ret
= res
== 0 ? 0 : -1;
119 post_log ("Error at b1 test !\n");
136 cpu_post_exec_11 (code
, &res
, 0);
138 ret
= res
== (ulong
)code
+ 12 ? 0 : -1;
142 post_log ("Error at b2 test !\n");
155 for (cc
= 0; cc
< 4 && ret
== 0; cc
++)
157 for (cd
= 0; cd
< 4 && ret
== 0; cd
++)
159 for (link
= 0; link
<= 1 && ret
== 0; link
++)
161 for (cond
= 0; cond
<= 1 && ret
== 0; cond
++)
163 for (ctr
= 1; ctr
<= 2 && ret
== 0; ctr
++)
166 int cr
= cond
? 0x80000000 : 0x00000000;
167 int jumpc
= cc
>= 2 ||
168 (cc
== 0 && !cond
) ||
170 int jumpd
= cd
>= 2 ||
171 (cd
== 0 && ctr
!= 1) ||
172 (cd
== 1 && ctr
== 1);
173 int jump
= jumpc
&& jumpd
;
175 ret
= cpu_post_test_bc (link
? OP_BCL
: OP_BC
,
176 (cc
<< 3) + (cd
<< 1), 0, jump
, decr
, link
,
181 post_log ("Error at b3 test %d !\n", i
);