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git.ipfire.org Git - people/ms/u-boot.git/blob - post/lib_powerpc/three.c
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
12 * Ternary instructions instr rD,rA,rB
14 * Arithmetic instructions: add, addc, adde, subf, subfc, subfe,
15 * mullw, mulhw, mulhwu, divw, divwu
17 * The test contains a pre-built table of instructions, operands and
18 * expected results. For each table entry, the test will cyclically use
19 * different sets of operand registers and result registers.
25 #if CONFIG_POST & CONFIG_SYS_POST_CPU
27 extern void cpu_post_exec_22 (ulong
*code
, ulong
*cr
, ulong
*res
, ulong op1
,
29 extern ulong
cpu_post_makecr (long v
);
31 static struct cpu_post_three_s
37 } cpu_post_three_table
[] =
142 static unsigned int cpu_post_three_size
= ARRAY_SIZE(cpu_post_three_table
);
144 int cpu_post_test_three (void)
148 int flag
= disable_interrupts();
150 for (i
= 0; i
< cpu_post_three_size
&& ret
== 0; i
++)
152 struct cpu_post_three_s
*test
= cpu_post_three_table
+ i
;
154 for (reg
= 0; reg
< 32 && ret
== 0; reg
++)
156 unsigned int reg0
= (reg
+ 0) % 32;
157 unsigned int reg1
= (reg
+ 1) % 32;
158 unsigned int reg2
= (reg
+ 2) % 32;
159 unsigned int stk
= reg
< 16 ? 31 : 15;
160 unsigned long code
[] =
163 ASM_ADDI(stk
, 1, -24),
166 ASM_STW(reg0
, stk
, 8),
167 ASM_STW(reg1
, stk
, 4),
168 ASM_STW(reg2
, stk
, 0),
169 ASM_LWZ(reg1
, stk
, 12),
170 ASM_LWZ(reg0
, stk
, 16),
171 ASM_12(test
->cmd
, reg2
, reg1
, reg0
),
172 ASM_STW(reg2
, stk
, 12),
173 ASM_LWZ(reg2
, stk
, 0),
174 ASM_LWZ(reg1
, stk
, 4),
175 ASM_LWZ(reg0
, stk
, 8),
177 ASM_ADDI(1, stk
, 24),
181 unsigned long codecr
[] =
184 ASM_ADDI(stk
, 1, -24),
187 ASM_STW(reg0
, stk
, 8),
188 ASM_STW(reg1
, stk
, 4),
189 ASM_STW(reg2
, stk
, 0),
190 ASM_LWZ(reg1
, stk
, 12),
191 ASM_LWZ(reg0
, stk
, 16),
192 ASM_12(test
->cmd
, reg2
, reg1
, reg0
) | BIT_C
,
193 ASM_STW(reg2
, stk
, 12),
194 ASM_LWZ(reg2
, stk
, 0),
195 ASM_LWZ(reg1
, stk
, 4),
196 ASM_LWZ(reg0
, stk
, 8),
198 ASM_ADDI(1, stk
, 24),
208 cpu_post_exec_22 (code
, & cr
, & res
, test
->op1
, test
->op2
);
210 ret
= res
== test
->res
&& cr
== 0 ? 0 : -1;
214 post_log ("Error at three test %d !\n", i
);
220 cpu_post_exec_22 (codecr
, & cr
, & res
, test
->op1
, test
->op2
);
222 ret
= res
== test
->res
&&
223 (cr
& 0xe0000000) == cpu_post_makecr (res
) ? 0 : -1;
227 post_log ("Error at three test %d !\n", i
);