queue-4.14/asoc-fsl_esai-fix-register-setting-issue-in-right_j-mode.patch

   1 From cc29ea007347f39f4c5a4d27b0b555955a0277f9 Mon Sep 17 00:00:00 2001
   2 From: "S.j. Wang" <shengjiu.wang@nxp.com>
   3 Date: Mon, 18 Feb 2019 08:29:11 +0000
   4 Subject: ASoC: fsl_esai: fix register setting issue in RIGHT_J mode
   5
   6 From: S.j. Wang <shengjiu.wang@nxp.com>
   7
   8 commit cc29ea007347f39f4c5a4d27b0b555955a0277f9 upstream.
   9
  10 The ESAI_xCR_xWA is xCR's bit, not the xCCR's bit, driver set it to
  11 wrong register, correct it.
  12
  13 Fixes 43d24e76b698 ("ASoC: fsl_esai: Add ESAI CPU DAI driver")
  14 Cc: <stable@vger.kernel.org>
  15 Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
  16 Reviewed-by: Fabio Estevam <festevam@gmail.com>
  17 Ackedy-by: Nicolin Chen <nicoleotsuka@gmail.com>
  18 Signed-off-by: Mark Brown <broonie@kernel.org>
  19 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  20
  21 ---
  22  sound/soc/fsl/fsl_esai.c |    7 ++++---
  23  1 file changed, 4 insertions(+), 3 deletions(-)
  24
  25 --- a/sound/soc/fsl/fsl_esai.c
  26 +++ b/sound/soc/fsl/fsl_esai.c
  27 @@ -395,7 +395,8 @@ static int fsl_esai_set_dai_fmt(struct s
  28                 break;
  29         case SND_SOC_DAIFMT_RIGHT_J:
  30                 /* Data on rising edge of bclk, frame high, right aligned */
  31 -               xccr |= ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP | ESAI_xCR_xWA;
  32 +               xccr |= ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP;
  33 +               xcr  |= ESAI_xCR_xWA;
  34                 break;
  35         case SND_SOC_DAIFMT_DSP_A:
  36                 /* Data on rising edge of bclk, frame high, 1clk before data */
  37 @@ -452,12 +453,12 @@ static int fsl_esai_set_dai_fmt(struct s
  38                 return -EINVAL;
  39         }
  40
  41 -       mask = ESAI_xCR_xFSL | ESAI_xCR_xFSR;
  42 +       mask = ESAI_xCR_xFSL | ESAI_xCR_xFSR | ESAI_xCR_xWA;
  43         regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR, mask, xcr);
  44         regmap_update_bits(esai_priv->regmap, REG_ESAI_RCR, mask, xcr);
  45
  46         mask = ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP | ESAI_xCCR_xFSP |
  47 -               ESAI_xCCR_xFSD | ESAI_xCCR_xCKD | ESAI_xCR_xWA;
  48 +               ESAI_xCCR_xFSD | ESAI_xCCR_xCKD;
  49         regmap_update_bits(esai_priv->regmap, REG_ESAI_TCCR, mask, xccr);
  50         regmap_update_bits(esai_priv->regmap, REG_ESAI_RCCR, mask, xccr);
  51