queue-4.14/mips-ralink-select-config_cpu_mipsr2_irq_vi-on-mt762.patch

   1 From a6aa36108c8a9839a5ae57cc165492693dcee47d Mon Sep 17 00:00:00 2001
   2 From: Stefan Roese <sr@denx.de>
   3 Date: Mon, 17 Dec 2018 10:47:48 +0100
   4 Subject: MIPS: ralink: Select CONFIG_CPU_MIPSR2_IRQ_VI on MT7620/8
   5
   6 [ Upstream commit 0b15394475e3bcaf35ca4bf22fc55d56df67224e ]
   7
   8 Testing has shown, that when using mainline U-Boot on MT7688 based
   9 boards, the system may hang or crash while mounting the root-fs. The
  10 main issue here is that mainline U-Boot configures EBase to a value
  11 near the end of system memory. And with CONFIG_CPU_MIPSR2_IRQ_VI
  12 disabled, trap_init() will not allocate a new area to place the
  13 exception handler. The original value will be used and the handler
  14 will be copied to this location, which might already be used by some
  15 userspace application.
  16
  17 The MT7688 supports VI - its config3 register is 0x00002420, so VInt
  18 (Bit 5) is set. But without setting CONFIG_CPU_MIPSR2_IRQ_VI this
  19 bit will not be evaluated to result in "cpu_has_vi" being set. This
  20 patch now selects CONFIG_CPU_MIPSR2_IRQ_VI on MT7620/8 which results
  21 trap_init() to allocate some memory for the exception handler.
  22
  23 Please note that this issue was not seen with the Mediatek U-Boot
  24 version, as it does not touch EBase (stays at default of 0x8000.0000).
  25 This is strictly also not correct as the kernel (_text) resides
  26 here.
  27
  28 Signed-off-by: Stefan Roese <sr@denx.de>
  29 [paul.burton@mips.com: s/beeing/being/]
  30 Signed-off-by: Paul Burton <paul.burton@mips.com>
  31 Cc: John Crispin <blogic@openwrt.org>
  32 Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
  33 Cc: Ralf Baechle <ralf@linux-mips.org>
  34 Cc: linux-mips@linux-mips.org
  35 Signed-off-by: Sasha Levin <sashal@kernel.org>
  36 ---
  37  arch/mips/ralink/Kconfig | 1 +
  38  1 file changed, 1 insertion(+)
  39
  40 diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
  41 index f26736b7080b..fae36f0371d3 100644
  42 --- a/arch/mips/ralink/Kconfig
  43 +++ b/arch/mips/ralink/Kconfig
  44 @@ -39,6 +39,7 @@ choice
  45
  46         config SOC_MT7620
  47                 bool "MT7620/8"
  48 +               select CPU_MIPSR2_IRQ_VI
  49                 select HW_HAS_PCI
  50
  51         config SOC_MT7621
  52 --
  53 2.19.1
  54