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[thirdparty/kernel/stable-queue.git] / queue-4.19 / arcv2-don-t-assume-core-0x54-has-dual-issue.patch
1 From f13974aca313083542ea0f95d4a7b8abcdb2face Mon Sep 17 00:00:00 2001
2 From: Vineet Gupta <vgupta@synopsys.com>
3 Date: Thu, 21 Feb 2019 13:44:49 -0800
4 Subject: ARCv2: don't assume core 0x54 has dual issue
5
6 [ Upstream commit 7b2e932f633bcb7b190fc7031ce6dac75f8c3472 ]
7
8 The first release of core4 (0x54) was dual issue only (HS4x).
9 Newer releases allow hardware to be configured as single issue (HS3x)
10 or dual issue.
11
12 Prevent accessing a HS4x only aux register in HS3x, which otherwise
13 leads to illegal instruction exceptions
14
15 Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
16 Signed-off-by: Sasha Levin <sashal@kernel.org>
17 ---
18 arch/arc/include/asm/arcregs.h | 8 ++++++++
19 arch/arc/kernel/setup.c | 26 +++++++++++++++++++++-----
20 2 files changed, 29 insertions(+), 5 deletions(-)
21
22 diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
23 index 49bfbd879caa..bdbdaef902eb 100644
24 --- a/arch/arc/include/asm/arcregs.h
25 +++ b/arch/arc/include/asm/arcregs.h
26 @@ -151,6 +151,14 @@ struct bcr_isa_arcv2 {
27 #endif
28 };
29
30 +struct bcr_uarch_build_arcv2 {
31 +#ifdef CONFIG_CPU_BIG_ENDIAN
32 + unsigned int pad:8, prod:8, maj:8, min:8;
33 +#else
34 + unsigned int min:8, maj:8, prod:8, pad:8;
35 +#endif
36 +};
37 +
38 struct bcr_mpy {
39 #ifdef CONFIG_CPU_BIG_ENDIAN
40 unsigned int pad:8, x1616:8, dsp:4, cycles:2, type:2, ver:8;
41 diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
42 index 62a30e58441c..3320ca2fe20f 100644
43 --- a/arch/arc/kernel/setup.c
44 +++ b/arch/arc/kernel/setup.c
45 @@ -196,13 +196,29 @@ static void read_arc_build_cfg_regs(void)
46 cpu->bpu.num_pred = 2048 << bpu.pte;
47
48 if (cpu->core.family >= 0x54) {
49 - unsigned int exec_ctrl;
50
51 - READ_BCR(AUX_EXEC_CTRL, exec_ctrl);
52 - cpu->extn.dual_enb = !(exec_ctrl & 1);
53 + struct bcr_uarch_build_arcv2 uarch;
54
55 - /* dual issue always present for this core */
56 - cpu->extn.dual = 1;
57 + /*
58 + * The first 0x54 core (uarch maj:min 0:1 or 0:2) was
59 + * dual issue only (HS4x). But next uarch rev (1:0)
60 + * allows it be configured for single issue (HS3x)
61 + * Ensure we fiddle with dual issue only on HS4x
62 + */
63 + READ_BCR(ARC_REG_MICRO_ARCH_BCR, uarch);
64 +
65 + if (uarch.prod == 4) {
66 + unsigned int exec_ctrl;
67 +
68 + /* dual issue hardware always present */
69 + cpu->extn.dual = 1;
70 +
71 + READ_BCR(AUX_EXEC_CTRL, exec_ctrl);
72 +
73 + /* dual issue hardware enabled ? */
74 + cpu->extn.dual_enb = !(exec_ctrl & 1);
75 +
76 + }
77 }
78 }
79
80 --
81 2.19.1
82