queue-4.19/arm-mmp-mmp2-dt-enable-the-clock.patch

   1 From 598c978ea6ed63a729eea356b420a965cbc1a3ea Mon Sep 17 00:00:00 2001
   2 From: Lubomir Rintel <lkundrak@v3.sk>
   3 Date: Wed, 28 Nov 2018 18:53:20 +0100
   4 Subject: ARM: mmp/mmp2: dt: enable the clock
   5
   6 [ Upstream commit f36797ee43802b367e59f0f9a9805304a4ff0c98 ]
   7
   8 The device-tree booted MMP2 needs to enable the timer clock, otherwise
   9 it would stop ticking when the boot finishes.
  10
  11 It can also use the clock rate from the clk, the non-DT boards need to
  12 keep using the hardcoded rates.
  13
  14 Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
  15 Acked-by: Pavel Machek <pavel@ucw.cz>
  16 Signed-off-by: Olof Johansson <olof@lixom.net>
  17 Signed-off-by: Sasha Levin <sashal@kernel.org>
  18 ---
  19  arch/arm/mach-mmp/common.h |  2 +-
  20  arch/arm/mach-mmp/mmp2.c   |  2 +-
  21  arch/arm/mach-mmp/pxa168.c |  2 +-
  22  arch/arm/mach-mmp/time.c   | 32 ++++++++++++++++++++------------
  23  4 files changed, 23 insertions(+), 15 deletions(-)
  24
  25 diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h
  26 index 7e284d9c429f..5ac2851ef5d3 100644
  27 --- a/arch/arm/mach-mmp/common.h
  28 +++ b/arch/arm/mach-mmp/common.h
  29 @@ -2,7 +2,7 @@
  30  #include <linux/reboot.h>
  31  #define ARRAY_AND_SIZE(x)      (x), ARRAY_SIZE(x)
  32
  33 -extern void timer_init(int irq);
  34 +extern void timer_init(int irq, unsigned long rate);
  35
  36  extern void __init mmp_map_io(void);
  37  extern void mmp_restart(enum reboot_mode, const char *);
  38 diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
  39 index afba5460cdaf..fb3e7e32c882 100644
  40 --- a/arch/arm/mach-mmp/mmp2.c
  41 +++ b/arch/arm/mach-mmp/mmp2.c
  42 @@ -134,7 +134,7 @@ void __init mmp2_timer_init(void)
  43         clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1);
  44         __raw_writel(clk_rst, APBC_TIMERS);
  45
  46 -       timer_init(IRQ_MMP2_TIMER1);
  47 +       timer_init(IRQ_MMP2_TIMER1, 6500000);
  48  }
  49
  50  /* on-chip devices */
  51 diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
  52 index 0f5f16fb8c66..77a358165a56 100644
  53 --- a/arch/arm/mach-mmp/pxa168.c
  54 +++ b/arch/arm/mach-mmp/pxa168.c
  55 @@ -79,7 +79,7 @@ void __init pxa168_timer_init(void)
  56         /* 3.25MHz, bus/functional clock enabled, release reset */
  57         __raw_writel(TIMER_CLK_RST, APBC_TIMERS);
  58
  59 -       timer_init(IRQ_PXA168_TIMER1);
  60 +       timer_init(IRQ_PXA168_TIMER1, 6500000);
  61  }
  62
  63  void pxa168_clear_keypad_wakeup(void)
  64 diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
  65 index 96ad1db0b04b..eab0fd8a7343 100644
  66 --- a/arch/arm/mach-mmp/time.c
  67 +++ b/arch/arm/mach-mmp/time.c
  68 @@ -22,6 +22,7 @@
  69  #include <linux/kernel.h>
  70  #include <linux/interrupt.h>
  71  #include <linux/clockchips.h>
  72 +#include <linux/clk.h>
  73
  74  #include <linux/io.h>
  75  #include <linux/irq.h>
  76 @@ -38,12 +39,6 @@
  77  #include "cputype.h"
  78  #include "clock.h"
  79
  80 -#ifdef CONFIG_CPU_MMP2
  81 -#define MMP_CLOCK_FREQ         6500000
  82 -#else
  83 -#define MMP_CLOCK_FREQ         3250000
  84 -#endif
  85 -
  86  #define TIMERS_VIRT_BASE       TIMERS1_VIRT_BASE
  87
  88  #define MAX_DELTA              (0xfffffffe)
  89 @@ -189,19 +184,18 @@ static struct irqaction timer_irq = {
  90         .dev_id         = &ckevt,
  91  };
  92
  93 -void __init timer_init(int irq)
  94 +void __init timer_init(int irq, unsigned long rate)
  95  {
  96         timer_config();
  97
  98 -       sched_clock_register(mmp_read_sched_clock, 32, MMP_CLOCK_FREQ);
  99 +       sched_clock_register(mmp_read_sched_clock, 32, rate);
 100
 101         ckevt.cpumask = cpumask_of(0);
 102
 103         setup_irq(irq, &timer_irq);
 104
 105 -       clocksource_register_hz(&cksrc, MMP_CLOCK_FREQ);
 106 -       clockevents_config_and_register(&ckevt, MMP_CLOCK_FREQ,
 107 -                                       MIN_DELTA, MAX_DELTA);
 108 +       clocksource_register_hz(&cksrc, rate);
 109 +       clockevents_config_and_register(&ckevt, rate, MIN_DELTA, MAX_DELTA);
 110  }
 111
 112  #ifdef CONFIG_OF
 113 @@ -213,7 +207,9 @@ static const struct of_device_id mmp_timer_dt_ids[] = {
 114  void __init mmp_dt_init_timer(void)
 115  {
 116         struct device_node *np;
 117 +       struct clk *clk;
 118         int irq, ret;
 119 +       unsigned long rate;
 120
 121         np = of_find_matching_node(NULL, mmp_timer_dt_ids);
 122         if (!np) {
 123 @@ -221,6 +217,18 @@ void __init mmp_dt_init_timer(void)
 124                 goto out;
 125         }
 126
 127 +       clk = of_clk_get(np, 0);
 128 +       if (!IS_ERR(clk)) {
 129 +               ret = clk_prepare_enable(clk);
 130 +               if (ret)
 131 +                       goto out;
 132 +               rate = clk_get_rate(clk) / 2;
 133 +       } else if (cpu_is_pj4()) {
 134 +               rate = 6500000;
 135 +       } else {
 136 +               rate = 3250000;
 137 +       }
 138 +
 139         irq = irq_of_parse_and_map(np, 0);
 140         if (!irq) {
 141                 ret = -EINVAL;
 142 @@ -231,7 +239,7 @@ void __init mmp_dt_init_timer(void)
 143                 ret = -ENOMEM;
 144                 goto out;
 145         }
 146 -       timer_init(irq);
 147 +       timer_init(irq, rate);
 148         return;
 149  out:
 150         pr_err("Failed to get timer from device tree with error:%d\n", ret);
 151 --
 152 2.19.1
 153