queue-4.19/clk-ingenic-fix-doc-of-ingenic_cgu_div_info.patch

   1 From 7ca4c922aad2e3c46767a12f80d01c6b25337b59 Mon Sep 17 00:00:00 2001
   2 From: Paul Cercueil <paul@crapouillou.net>
   3 Date: Sun, 27 Jan 2019 23:09:21 -0300
   4 Subject: clk: ingenic: Fix doc of ingenic_cgu_div_info
   5
   6 From: Paul Cercueil <paul@crapouillou.net>
   7
   8 commit 7ca4c922aad2e3c46767a12f80d01c6b25337b59 upstream.
   9
  10 The 'div' field does not represent a number of bits used to divide
  11 (understand: right-shift) the divider, but a number itself used to
  12 divide the divider.
  13
  14 Signed-off-by: Paul Cercueil <paul@crapouillou.net>
  15 Signed-off-by: Maarten ter Huurne <maarten@treewalker.org>
  16 Cc: <stable@vger.kernel.org>
  17 Signed-off-by: Stephen Boyd <sboyd@kernel.org>
  18 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  19
  20 ---
  21  drivers/clk/ingenic/cgu.h |    2 +-
  22  1 file changed, 1 insertion(+), 1 deletion(-)
  23
  24 --- a/drivers/clk/ingenic/cgu.h
  25 +++ b/drivers/clk/ingenic/cgu.h
  26 @@ -80,7 +80,7 @@ struct ingenic_cgu_mux_info {
  27   * @reg: offset of the divider control register within the CGU
  28   * @shift: number of bits to left shift the divide value by (ie. the index of
  29   *         the lowest bit of the divide value within its control register)
  30 - * @div: number of bits to divide the divider value by (i.e. if the
  31 + * @div: number to divide the divider value by (i.e. if the
  32   *      effective divider value is the value written to the register
  33   *      multiplied by some constant)
  34   * @bits: the size of the divide value in bits