queue-4.19/dmaengine-xilinx_dma-remove-__aligned-attribute-on-z.patch

   1 From a30c3205d5ca78aa1c8d20b288e2a4a50a8f7837 Mon Sep 17 00:00:00 2001
   2 From: Nathan Chancellor <natechancellor@gmail.com>
   3 Date: Thu, 25 Oct 2018 11:05:25 -0700
   4 Subject: dmaengine: xilinx_dma: Remove __aligned attribute on
   5  zynqmp_dma_desc_ll
   6
   7 [ Upstream commit aeaebcc17cdf37065d2693865eeb1ff1c7dc5bf3 ]
   8
   9 Clang warns:
  10
  11 drivers/dma/xilinx/zynqmp_dma.c:166:4: warning: attribute 'aligned' is
  12 ignored, place it after "struct" to apply attribute to type declaration
  13 [-Wignored-attributes]
  14 }; __aligned(64)
  15    ^
  16 ./include/linux/compiler_types.h:200:38: note: expanded from macro
  17 '__aligned'
  18                                                ^
  19 1 warning generated.
  20
  21 As Nick pointed out in the previous version of this patch, the author
  22 likely intended for this struct to be 8-byte (64-bit) aligned, not
  23 64-byte, which is the default. Remove the hanging __aligned attribute.
  24
  25 Fixes: b0cc417c1637 ("dmaengine: Add Xilinx zynqmp dma engine driver support")
  26 Reported-by: Nick Desaulniers <ndesaulniers@google.com>
  27 Suggested-by: Nick Desaulniers <ndesaulniers@google.com>
  28 Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
  29 Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
  30 Signed-off-by: Vinod Koul <vkoul@kernel.org>
  31 Signed-off-by: Sasha Levin <sashal@kernel.org>
  32 ---
  33  drivers/dma/xilinx/zynqmp_dma.c | 2 +-
  34  1 file changed, 1 insertion(+), 1 deletion(-)
  35
  36 diff --git a/drivers/dma/xilinx/zynqmp_dma.c b/drivers/dma/xilinx/zynqmp_dma.c
  37 index c74a88b65039..73de6a6179fc 100644
  38 --- a/drivers/dma/xilinx/zynqmp_dma.c
  39 +++ b/drivers/dma/xilinx/zynqmp_dma.c
  40 @@ -163,7 +163,7 @@ struct zynqmp_dma_desc_ll {
  41         u32 ctrl;
  42         u64 nxtdscraddr;
  43         u64 rsvd;
  44 -}; __aligned(64)
  45 +};
  46
  47  /**
  48   * struct zynqmp_dma_desc_sw - Per Transaction structure
  49 --
  50 2.19.1
  51