queue-4.20/drm-amdgpu-implement-doorbell-self-ring-for-nbio-7.4.patch

   1 From a32cf1349cbab8279e90a7713fb05ad154bcb380 Mon Sep 17 00:00:00 2001
   2 From: Jay Cornwall <Jay.Cornwall@amd.com>
   3 Date: Wed, 30 Jan 2019 12:53:29 -0600
   4 Subject: drm/amdgpu: Implement doorbell self-ring for NBIO 7.4
   5
   6 [ Upstream commit 12292519d919ecde92e7e7c8acbcdb9f0c7c6013 ]
   7
   8 Fixes doorbell reflection on Vega20.
   9
  10 Change-Id: I0495139d160a9032dff5977289b1eec11c16f781
  11 Signed-off-by: Jay Cornwall <Jay.Cornwall@amd.com>
  12 Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
  13 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
  14 Signed-off-by: Sasha Levin <sashal@kernel.org>
  15 ---
  16  drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 13 +++++++++++++
  17  1 file changed, 13 insertions(+)
  18
  19 diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
  20 index f8cee95d61cc..7d5cbadbe1cb 100644
  21 --- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
  22 +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
  23 @@ -92,7 +92,20 @@ static void nbio_v7_4_enable_doorbell_aperture(struct amdgpu_device *adev,
  24  static void nbio_v7_4_enable_doorbell_selfring_aperture(struct amdgpu_device *adev,
  25                                                         bool enable)
  26  {
  27 +       u32 tmp = 0;
  28
  29 +       if (enable) {
  30 +               tmp = REG_SET_FIELD(tmp, DOORBELL_SELFRING_GPA_APER_CNTL, DOORBELL_SELFRING_GPA_APER_EN, 1) |
  31 +                     REG_SET_FIELD(tmp, DOORBELL_SELFRING_GPA_APER_CNTL, DOORBELL_SELFRING_GPA_APER_MODE, 1) |
  32 +                     REG_SET_FIELD(tmp, DOORBELL_SELFRING_GPA_APER_CNTL, DOORBELL_SELFRING_GPA_APER_SIZE, 0);
  33 +
  34 +               WREG32_SOC15(NBIO, 0, mmDOORBELL_SELFRING_GPA_APER_BASE_LOW,
  35 +                            lower_32_bits(adev->doorbell.base));
  36 +               WREG32_SOC15(NBIO, 0, mmDOORBELL_SELFRING_GPA_APER_BASE_HIGH,
  37 +                            upper_32_bits(adev->doorbell.base));
  38 +       }
  39 +
  40 +       WREG32_SOC15(NBIO, 0, mmDOORBELL_SELFRING_GPA_APER_CNTL, tmp);
  41  }
  42
  43  static void nbio_v7_4_ih_doorbell_range(struct amdgpu_device *adev,
  44 --
  45 2.19.1
  46